2.1

### uVision Project, (C) Keil Software

Debug 0x4 ARM-ADS 6160000::V6.16::ARMCLANG 1 MIMXRT1064DVL6A NXP NXP.MIMXRT1064_DFP.14.0.0 https://mcuxpresso.nxp.com/cmsis_pack/repo/ IRAM(0x20000000,0x020000) IRAM2(0x00000000,0x020000) IROM(0x70000000,0x400000) XRAM(0x20200000,0x0c0000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0MIMXRT1064_QSPI_4KB_SEC -FS070000000 -FL0400000 -FP0($$Device:MIMXRT1064DVL6A$arm\MIMXRT1064_QSPI_4KB_SEC.FLM)) 0 $$Device:MIMXRT1064DVL6A$fsl_device_registers.h $$Device:MIMXRT1064DVL6A$MIMXRT1064.xml 0 0 0 0 0 0 1 .\Debug\ CMSIS_DV 1 0 0 1 0 .\Debug\ 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 3 1 SARMCM3.DLL -REMAP -MPU DCM.DLL -pCM7 SARMCM3.DLL -MPU TCM.DLL -pCM7 1 0 0 0 16 1 0 0 1 1 4096 1 BIN\UL2CM3.DLL "" () 0 0 1 1 1 1 1 1 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 1 1 1 0 0 "Cortex-M7" 1 0 0 1 1 1 0 3 0 0 1 0 8 1 0 0 0 3 4 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x20000 1 0x70000000 0x400000 1 0x20200000 0xc0000 1 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x70000000 0x400000 1 0x200000 0x20000 0 0x20280000 0x40000 0 0x20200000 0x80000 0 0x80000000 0x2000000 0 0x20000000 0x20000 0 0x0 0x20000 1 1 0 0 1 0 0 0 0 0 3 0 0 1 0 0 3 3 1 1 0 0 0 FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL SKIP_SYSCLK_INIT XIP_BOOT_HEADER_DCD_ENABLE=1 XIP_BOOT_HEADER_ENABLE=1 XIP_EXTERNAL_FLASH=1 1 0 0 0 0 0 0 0 0 1 FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL SKIP_SYSCLK_INIT XIP_BOOT_HEADER_DCD_ENABLE=1 XIP_BOOT_HEADER_ENABLE=1 XIP_EXTERNAL_FLASH=1 0 0 0 0 1 0 0x70000000 0x20000000 .\RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx.scf --predefine="-DXIP_BOOT_HEADER_ENABLE=1" --summary_stderr --info summarysizes --load_addr_map_info --entry=Reset_Handler 6314,6329 Source main.c 1 .\main.c retarget_user.c 1 .\retarget_user.c lpuart.c 1 .\lpuart.c Documentation Abstract.txt 5 .\Abstract.txt ::Board Support ::CMSIS ::CMSIS Driver ::CMSIS Driver Validation ::Compiler ::Device Release 0x4 ARM-ADS 6160000::V6.16::ARMCLANG 1 MIMXRT1064DVL6A NXP NXP.MIMXRT1064_DFP.14.0.0 https://mcuxpresso.nxp.com/cmsis_pack/repo/ IRAM(0x20000000,0x020000) IRAM2(0x00000000,0x020000) IROM(0x70000000,0x400000) XRAM(0x20200000,0x0c0000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0MIMXRT1064_QSPI_4KB_SEC -FS070000000 -FL0400000 -FP0($$Device:MIMXRT1064DVL6A$arm\MIMXRT1064_QSPI_4KB_SEC.FLM)) 0 $$Device:MIMXRT1064DVL6A$fsl_device_registers.h $$Device:MIMXRT1064DVL6A$MIMXRT1064.xml 0 0 0 0 0 0 1 .\Release\ CMSIS_DV 1 0 0 1 0 .\Release\ 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 3 1 SARMCM3.DLL -REMAP -MPU DCM.DLL -pCM7 SARMCM3.DLL -MPU TCM.DLL -pCM7 1 0 0 0 16 1 0 0 1 1 4096 1 BIN\UL2CM3.DLL "" () 0 0 1 1 1 1 1 1 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 1 1 1 0 0 "Cortex-M7" 1 0 0 1 1 1 0 3 0 0 1 0 8 1 0 0 0 3 4 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x20000 1 0x70000000 0x400000 1 0x20200000 0xc0000 1 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x70000000 0x400000 1 0x200000 0x20000 0 0x20280000 0x40000 0 0x20200000 0x80000 0 0x80000000 0x2000000 0 0x20000000 0x20000 0 0x0 0x20000 1 7 0 0 1 0 0 0 0 0 3 0 0 1 0 0 3 3 1 1 0 0 0 FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL SKIP_SYSCLK_INIT XIP_BOOT_HEADER_DCD_ENABLE=1 XIP_BOOT_HEADER_ENABLE=1 XIP_EXTERNAL_FLASH=1 1 0 0 0 0 0 0 0 0 1 FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL SKIP_SYSCLK_INIT XIP_BOOT_HEADER_DCD_ENABLE=1 XIP_BOOT_HEADER_ENABLE=1 XIP_EXTERNAL_FLASH=1 0 0 0 0 1 0 0x70000000 0x20000000 .\RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx.scf --predefine="-DXIP_BOOT_HEADER_ENABLE=1" --summary_stderr --info summarysizes --load_addr_map_info --entry=Reset_Handler 6314,6329 Source main.c 1 .\main.c retarget_user.c 1 .\retarget_user.c lpuart.c 1 .\lpuart.c Documentation Abstract.txt 5 .\Abstract.txt ::Board Support ::CMSIS ::CMSIS Driver ::CMSIS Driver Validation ::Compiler ::Device 2 __MCUXPRESSO __MCUXPRESSO RTE\Board_Support\MIMXRT1064DVL6A\board.c RTE\Board_Support\MIMXRT1064DVL6A\board.h RTE\Board_Support\MIMXRT1064DVL6A\clock_config.c RTE\Board_Support\MIMXRT1064DVL6A\clock_config.h RTE\Board_Support\MIMXRT1064DVL6A\dcd.c RTE\Board_Support\MIMXRT1064DVL6A\dcd.h RTE\Board_Support\MIMXRT1064DVL6A\peripherals.c RTE\Board_Support\MIMXRT1064DVL6A\peripherals.h RTE\Board_Support\MIMXRT1064DVL6A\pin_mux.c RTE\Board_Support\MIMXRT1064DVL6A\pin_mux.h RTE\CMSIS\RTX_Config.c RTE\CMSIS\RTX_Config.h RTE\CMSIS_Driver\WiFi_ESP32_Config.h RTE\CMSIS_Driver_Validation\DV_Config.h RTE\CMSIS_Driver_Validation\DV_WiFi_Config.h RTE\Compiler\EventRecorderConf.h RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx_flexspi_nor.scf RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx_flexspi_nor_sdram.scf RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx_ram.scf RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx_sdram.scf RTE\Device\MIMXRT1064DVL6A\MIMXRT1064xxxxx_sdram_txt.scf RTE\Device\MIMXRT1064DVL6A\RTE_Device.h RTE\Device\MIMXRT1064DVL6A\startup_MIMXRT1064.S RTE\Device\MIMXRT1064DVL6A\system_MIMXRT1064.c RTE\Device\MIMXRT1064DVL6A\system_MIMXRT1064.h