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CMSIS-Core(M): Add missing registers to core_cm55.h
authorMartin Günther <martin.guenther@arm.com>
Wed, 16 Mar 2022 14:09:29 +0000 (15:09 +0100)
committerGitHub <noreply@github.com>
Wed, 16 Mar 2022 14:09:29 +0000 (15:09 +0100)
commit5593c06d4dc24f424a05b24db4618da31862d932
treeb87d87194471d0a5b393fac24e885a34b9b65dd2tree | snapshot
parent7d22e7b6c059b23b3e659693d7e70656f3dc07a5commit | diff
CMSIS-Core(M): Add missing registers to core_cm55.h

- Memory System Control Registers
- External Wakeup Interrupt Controller Registers
- Error Banking Registers
- Processor Configuration Information Registers
CMSIS/Core/Include/core_cm55.h diff | blob | history
CMSIS/DoxyGen/Core/src/Ref_DataStructs.txt diff | blob | history
https://github.com/ARM-software/CMSIS_6.git