1 var group__CMSIS__core__register =
3 [ "Auxiliary Control Register (ACTLR)", "group__CMSIS__ACTLR.html", "group__CMSIS__ACTLR" ],
4 [ "Cache and branch predictor maintenance operations", "group__CMSIS__CBPM.html", "group__CMSIS__CBPM" ],
5 [ "Configuration Base Address Register (CBAR)", "group__CMSIS__CBAR.html", "group__CMSIS__CBAR" ],
6 [ "Coprocessor Access Control Register (CPACR)", "group__CMSIS__CPACR.html", "group__CMSIS__CPACR" ],
7 [ "Current Program Status Register (CPSR)", "group__CMSIS__CPSR.html", "group__CMSIS__CPSR" ],
8 [ "Data Fault Status Register (DFSR)", "group__CMSIS__DFSR.html", "group__CMSIS__DFSR" ],
9 [ "Domain Access Control Register (DACR)", "group__CMSIS__DACR.html", "group__CMSIS__DACR" ],
10 [ "Floating-Point Exception Control register (FPEXC)", "group__CMSIS__FPEXC.html", null ],
11 [ "Floating-point Status and Control Register (FPSCR)", "group__CMSIS__FPSCR.html", "group__CMSIS__FPSCR" ],
12 [ "Instruction Fault Status Register (IFSR)", "group__CMSIS__IFSR.html", "group__CMSIS__IFSR" ],
13 [ "Interrupt Status Register (ISR)", "group__CMSIS__ISR.html", "group__CMSIS__ISR" ],
14 [ "Multiprocessor Affinity Register (MPIDR)", "group__CMSIS__MPIDR.html", "group__CMSIS__MPIDR" ],
15 [ "Counter Frequency register (CNTFRQ)", "group__CMSIS__CNTFRQ.html", "group__CMSIS__CNTFRQ" ],
16 [ "PL1 Physical Timer Control register (CNTP_CTL)", "group__CMSIS__CNTP__CTL.html", "group__CMSIS__CNTP__CTL" ],
17 [ "PL1 Physical Timer Compare Value register (CNTP_CVAL)", "group__CMSIS__CNTP__CVAL.html", "group__CMSIS__CNTP__CVAL" ],
18 [ "PL1 Physical Timer Value register (CNTP_TVAL)", "group__CMSIS__CNTP__TVAL.html", "group__CMSIS__CNTP__TVAL" ],
19 [ "PL1 Physical Count register (CNTPCT)", "group__CMSIS__CNTPCT.html", "group__CMSIS__CNTPCT" ],
20 [ "Stack Pointer (SP/R13)", "group__CMSIS__SP.html", null ],
21 [ "System Control Register (SCTLR)", "group__CMSIS__SCTLR.html", "group__CMSIS__SCTLR" ],
22 [ "TLB maintenance operations", "group__CMSIS__TLB.html", "group__CMSIS__TLB" ],
23 [ "Translation Table Base Registers (TTBR0/TTBR1)", "group__CMSIS__TTBR.html", "group__CMSIS__TTBR" ],
24 [ "Vector Base Address Register (VBAR)", "group__CMSIS__VBAR.html", "group__CMSIS__VBAR" ],
25 [ "Monitor Vector Base Address Register (MVBAR)", "group__CMSIS__MVBAR.html", "group__CMSIS__MVBAR" ]