CMSIS-Core (Cortex-A)  
CMSIS-Core support for Cortex-A processor-based devices
 
Loading...
Searching...
No Matches
Configuration Base Address Register (CBAR)

Takes the physical base address value of the memory-mapped SCU peripherals at reset from the external signal PERIPHBASE[31:13]. More...

Content

 CBAR Bits
 Bit position and mask macros.
 

Description

Bits Name Function
[31:13] PERIPHBASE Peripheral base address.
[12:0] - Read as zero.

Consider __get_CBAR to access this register.