CMSIS-Core (Cortex-A)  
CMSIS-Core support for Cortex-A processor-based devices
 
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Domain Access Control Register (DACR)

DACR defines the access permission for each of the sixteen memory domains. More...

Content

 DACR Bits
 Bit position and mask macros.
 
 DACR Dn field values
 Valid values for DACR Dn field.
 

Description

Bits Name Function
[31:30] D15 Domain 15 access permission.
[29:28] D14 Domain 14 access permission.
[27:26] D13 Domain 13 access permission.
[25:24] D12 Domain 12 access permission.
[23:22] D11 Domain 11 access permission.
[21:20] D10 Domain 10 access permission.
[19:18] D9 Domain 9 access permission.
[17:16] D8 Domain 8 access permission.
[15:14] D7 Domain 7 access permission.
[13:12] D6 Domain 6 access permission.
[11:10] D5 Domain 5 access permission.
[9:8] D4 Domain 4 access permission.
[7:6] D3 Domain 3 access permission.
[5:4] D2 Domain 2 access permission.
[3:2] D1 Domain 1 access permission.
[1:0] D0 Domain 0 access permission.

Consider __get_DACR and __set_DACR to access this register.