CMSIS-Core (Cortex-A) implements the basic run-time system for a Cortex-A device and gives the user access to the processor core and the device peripherals. In detail it defines:

Hardware Abstraction Layer (HAL) for Cortex-A processor registers with standardized definitions for the GIC, FPU, MMU, Cache, and core access functions.
System exception names to interface to system exceptions without having compatibility issues.
Methods to organize header files that makes it easy to learn new Cortex-A microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.
Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.
Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.
A variable to determine the system clock frequency which simplifies the setup of the system timers.

The following sections provide details about the CMSIS-Core (Cortex-A):

Using CMSIS in Embedded Applications describes the project setup and shows a simple program example.
CMSIS-Core Device Templates describes the files of the CMSIS-Core (Cortex-A) in detail and explains how to adapt template files provided by Arm to silicon vendor devices.
MISRA-C Deviations describes the violations to the MISRA standard.
Reference describe the features and functions of the Device Header File <device.h> in detail.
Data Structures describe the data structures of the Device Header File <device.h> in detail.

CMSIS-Core (Cortex-A) in ARM::CMSIS Pack

Files relevant to CMSIS-Core (Cortex-A) are present in the following ARM::CMSIS directories:

File/Folder	Content
CMSIS\Documentation\Core_A	This documentation
CMSIS\Core_A\Include	CMSIS-Core (Cortex-A) header files (for example core_ca.h, etc.)
Device	Arm reference implementations of Cortex-A devices
Device\_Template_Vendor	CMSIS-Core Device Templates for extension by silicon vendors

Processor Support

CMSIS supports a selected subset of Cortex-A processors.

Cortex-A Technical Reference Manuals

The following Technical Reference Manuals describe the various Arm Cortex-A processors:

Cortex-A5 (Armv7-A architecture)
Cortex-A7 (Armv7-A architecture)
Cortex-A9 (Armv7-A architecture)

Tested and Verified Toolchains

The CMSIS-Core Device Templates supplied by Arm have been tested and verified with the following toolchains:

Arm: Arm Compiler 5.06 update 7
Arm: Arm Compiler 6.16
Arm: Arm Compiler 6.6.4
GNU: GNU Arm Embedded Toolchain 10-2020-q4-major (10.2.1 20201103)
IAR: IAR ANSI C/C++ Compiler for Arm 8.20.1.14183