/*-----------------------------------------------------------------------------
* Name: CV_Config.h
* Purpose: CV Config header
*----------------------------------------------------------------------------
* Copyright (c) 2017 ARM Limited. All rights reserved.
*----------------------------------------------------------------------------*/
#ifndef __CV_CONFIG_H
#define __CV_CONFIG_H
#include "RTE_Components.h"
#include CMSIS_device_header
#define RTE_CV_COREINSTR 1
#define RTE_CV_COREFUNC 1
#define RTE_CV_L1CACHE 1
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
// Common Test Settings
// Print Output Format <0=> Plain Text <1=> XML
// Set the test results output format to plain text or XML
#ifndef PRINT_XML_REPORT
#define PRINT_XML_REPORT 1
#endif
// Buffer size for assertions results
// Set the buffer size for assertions results buffer
#define BUFFER_ASSERTIONS 128U
//
// Disable Test Cases
// Uncheck to disable an individual test case
// TC_CoreInstr_NOP
// TC_CoreInstr_REV
// TC_CoreInstr_REV16
// TC_CoreInstr_REVSH
// TC_CoreInstr_ROR
// TC_CoreInstr_RBIT
// TC_CoreInstr_CLZ
// TC_CoreInstr_SSAT
// TC_CoreInstr_USAT
#define TC_COREINSTR_NOP_EN 1
#define TC_COREINSTR_REV_EN 1
#define TC_COREINSTR_REV16_EN 1
#define TC_COREINSTR_REVSH_EN 1
#define TC_COREINSTR_ROR_EN 1
#define TC_COREINSTR_RBIT_EN 1
#define TC_COREINSTR_CLZ_EN 1
#define TC_COREINSTR_SSAT_EN 1
#define TC_COREINSTR_USAT_EN 1
// TC_CoreAFunc_FPSCR
// TC_CoreAFunc_CPSR
// TC_CoreAFunc_Mode
// TC_CoreAFunc_SP
// TC_CoreAFunc_SP_usr
// TC_CoreAFunc_FPEXC
// TC_CoreAFunc_ACTLR
// TC_CoreAFunc_CPACR
// TC_CoreAFunc_DFSR
// TC_CoreAFunc_IFSR
// TC_CoreAFunc_ISR
// TC_CoreAFunc_CBAR
// TC_CoreAFunc_TTBR0
// TC_CoreAFunc_DACR
// TC_CoreAFunc_SCTLR
// TC_CoreAFunc_ACTRL
// TC_CoreAFunc_MPIDR
// TC_CoreAFunc_VBAR
// TC_CoreAFunc_MVBAR
#define TC_COREAFUNC_IRQ 1
#define TC_COREAFUNC_FPSCR 1
#define TC_COREAFUNC_CPSR 1
#define TC_COREAFUNC_MODE 1
#define TC_COREAFUNC_SP 1
#define TC_COREAFUNC_SP_USR 1
#define TC_COREAFUNC_FPEXC 1
#define TC_COREAFUNC_ACTLR 1
#define TC_COREAFUNC_CPACR 1
#define TC_COREAFUNC_DFSR 1
#define TC_COREAFUNC_IFSR 1
#define TC_COREAFUNC_ISR 1
#define TC_COREAFUNC_CBAR 1
#define TC_COREAFUNC_TTBR0 1
#define TC_COREAFUNC_DACR 1
#define TC_COREAFUNC_SCTLR 1
#define TC_COREAFUNC_ACTRL 1
#define TC_COREAFUNC_MPIDR 1
#define TC_COREAFUNC_VBAR 1
#define TC_COREAFUNC_MVBAR 1
// TC_GenTimer_CNTFRQ
// TC_GenTimer_CNTP_TVAL
// TC_GenTimer_CNTP_CTL
// TC_GenTimer_CNTPCT
// TC_GenTimer_CNTP_CVAL
#define TC_GENTIMER_CNTFRQ 1
#define TC_GENTIMER_CNTP_TVAL 1
#define TC_GENTIMER_CNTP_CTL 1
#define TC_GENTIMER_CNTPCT 1
#define TC_GENTIMER_CNTP_CVAL 1
// TC_L1Cache_EnDisable
// TC_L1Cache_EnDisableBTAC
// TC_L1Cache_log2_up
// TC_L1Cache_InvalidateDCacheAll
// TC_L1Cache_CleanDCacheAll
// TC_L1Cache_CleanInvalidateDCacheAll
#define TC_L1CACHE_ENDISABLE 1
#define TC_L1CACHE_ENDISABLEBTAC 1
#define TC_L1CACHE_LOG2_UP 1
#define TC_L1CACHE_INVALIDATEDCACHEALL 1
#define TC_L1CACHE_CLEANDCACHEALL 1
#define TC_L1CACHE_CLEANINVALIDATEDCACHEALL 1
//
#endif /* __CV_CONFIG_H */