A typical example for using the CMSIS layer is provided below. The example is based on an unspecific Cortex-A9 Device.
#include <ARMCA9.h>
static const uint32_t TICK_RATE_HZ = 1000U;
uint32_t volatile msTicks;
static void SysTick_Handler( void )
{
msTicks++;
}
void private_timer_init(void) {
}
void Delay(uint32_t ticks) {
uint32_t tgtTicks = msTicks + ticks;
while (msTicks == tgtTicks) {
}
}
int main(void)
{
private_timer_init();
static uint8_t ledState = 0;
while (1)
{
ledState = !ledState;
Delay(500);
}
}
#define __WFE
Wait For Event.
__STATIC_INLINE uint32_t GIC_GetPriority(IRQn_Type IRQn)
Read the current interrupt priority from GIC's IPRIORITYR register.
Definition: core_ca.h:1668
__STATIC_INLINE void PTIM_SetLoadValue(uint32_t value)
Set the load value to timers LOAD register.
Definition: core_ca.h:1949
__STATIC_INLINE uint32_t PTIM_GetControl(void)
Definition: core_ca.h:1988
__STATIC_INLINE void PTIM_SetControl(uint32_t value)
Configure the timer using its CONTROL register.
Definition: core_ca.h:1980
int32_t IRQ_Enable(IRQn_ID_t irqn)
Enable interrupt.
int32_t IRQ_SetPriority(IRQn_ID_t irqn, uint32_t priority)
Set interrupt priority value.
int32_t IRQ_SetHandler(IRQn_ID_t irqn, IRQHandler_t handler)
Register interrupt handler.
#define IRQ_PRIORITY_Msk
Interrupt priority value bit-mask.
uint32_t SystemCoreClock
Variable to hold the system core clock value.
Definition: Ref_SystemAndClock.txt:67
int32_t IRQn_ID_t
Interrupt ID number data type.
Definition: irq_ctrl.h:45