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(parent: b4e65f2) | patch

author	GuentherMartin <martin.guenther@arm.com>
	Mon, 29 Mar 2021 10:22:24 +0000 (12:22 +0200)
committer	GuentherMartin <martin.guenther@arm.com>
	Mon, 29 Mar 2021 10:22:24 +0000 (12:22 +0200)
commit	4480664c091ffbff06a64f045d3478a8cbaf791d
tree	bdacdbd5fe735779bcea23f89a938273d7dc8bcf	tree \| snapshot
parent	b4e65f2f0cf2d7226e6a7e53adf429ac34076c9c	commit \| diff

CoreValidation:
-removed warning for Cortex-A devices.
- reworked test settings.

13 files changed:

CMSIS/CoreValidation/Tests/ac5.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/ac6.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/ac6ltm.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/bootloader/ac6.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/bootloader/ac6ltm.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/bootloader/gcc.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/build.py		diff \| blob \| history
CMSIS/CoreValidation/Tests/config/core_a/mmu.c		diff \| blob \| history
CMSIS/CoreValidation/Tests/config/core_a/rtebuild_ac5.sct	[moved from CMSIS/CoreValidation/Tests/config/core_a/rtebuild_armcc.sct with 100% similarity]	blob \| history
CMSIS/CoreValidation/Tests/config/core_a/rtebuild_armclang.sct	[deleted file]	blob \| history
CMSIS/CoreValidation/Tests/gcc.rtebuild		diff \| blob \| history
CMSIS/CoreValidation/Tests/main.c		diff \| blob \| history
CMSIS/Core_A/Source/irq_ctrl_gic.c		diff \| blob \| history

https://github.com/ARM-software/CMSIS_6.git