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CMSIS-Core(M): Fixed ARM MPU implementation for Cortex-M0+.
authorJonatan Antoni <jonatan.antoni@arm.com>
Thu, 27 Jul 2017 09:55:34 +0000 (11:55 +0200)
committerJonatan Antoni <jonatan.antoni@arm.com>
Thu, 27 Jul 2017 09:55:34 +0000 (11:55 +0200)
commit528805d0f2f6548fec5cec15a7d50c120f954847
tree6714e2a8a136e9533ec218843d7c76ce140be5e7tree | snapshot
parentfe9b4660d0a57008bd48201d2287e9deb86ac223commit | diff
CMSIS-Core(M): Fixed ARM MPU implementation for Cortex-M0+.

Cortex-M0+ does not have a dedicated memory fault and used hard fault instead.
CMSIS/Core/Include/mpu_armv7.h diff | blob | history
https://github.com/ARM-software/CMSIS_6.git