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CMSIS-Core(M): M55/M85 : add CPPWR SU10/11 defines
authorSudhir Sreedharan <sudhir@alifsemi.com>
Tue, 9 Jul 2024 14:09:14 +0000 (19:39 +0530)
committerJonatan Antoni <jonatan.antoni@arm.com>
Tue, 3 Sep 2024 14:46:49 +0000 (16:46 +0200)
commit5893c3da4b0cce8c493e964bfcbb9c13461d6250
tree845bd0baaf7ca98d18f5007314389d6f8b81fcd8tree | snapshot
parent07f9827eef7233cba35741b35724f3f9785b73c1commit | diff
CMSIS-Core(M): M55/M85 : add CPPWR SU10/11 defines

FP & MVE requires the SU10 to be modified while transitioning
to low power state.

Signed-off-by: Sudhir Sreedharan <sudhir@alifsemi.com>
CMSIS/Core/Include/core_cm55.h diff | blob | history
CMSIS/Core/Include/core_cm85.h diff | blob | history
https://github.com/ARM-software/CMSIS_6.git