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Modified Cortex-M7 SCB_*Cache_by_Addr functions (#280).
[cmsis] / CMSIS / CoreValidation / Include /
2018-07-24 Jonatan AntoniCoreValidation: Added test cases for unaligned half... tree | commitdiff
2018-06-19 GuentherMartinAdded SIMD tests for Cortex-M devices. tree | commitdiff
2018-05-08 Jonatan AntoniCoreValidation: Fixed/enhanced test cases. tree | commitdiff
2018-05-07 Jonatan AntoniCoreValidation: Fixed/enhanced core and intrinsic funct... tree | commitdiff
2018-01-08 Jonatan AntoniCore(A): Fixed VBAR cp15 register access functions... tree | commitdiff
2017-12-11 Jonatan AntoniCore(A): Refactored L1 Cache maintenance to be compiler... tree | commitdiff
2017-12-08 Jonatan AntoniCore(M): Aligned PSPLIM and MSPLIM access functions... tree | commitdiff
2017-11-09 Jonatan AntoniCoreValidation: Added test functions for MSPLIM and... tree | commitdiff
2017-10-27 Daniel BrondaniMerge branch 'develop' of https://github.com/ARM-softwa... tree | commitdiff
2017-10-27 Jonatan AntoniCoreValidation: Fixed test projects for Cortex-M0+ tree | commitdiff
2017-10-16 Jonatan AntoniCore-A: Add 64bit Generic Counter registers access... tree | commitdiff
2017-09-11 Jonatan AntoniCoreValidation: Fixed compiler and MISRA warnings. tree | commitdiff
2017-09-11 Jonatan AntoniCoreValidation: Initial contribution of a test suite... tree | commitdiff
https://github.com/ARM-software/CMSIS_6.git