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| 2018-01-08 | Jonatan Antoni | Core(A): Fixed VBAR cp15 register access functions... | tree | commitdiff |
| 2017-12-11 | Jonatan Antoni | Core(A): Refactored L1 Cache maintenance to be compiler... | tree | commitdiff |
| 2017-12-08 | Jonatan Antoni | Core(M): Aligned PSPLIM and MSPLIM access functions... | tree | commitdiff |
| 2017-11-09 | Jonatan Antoni | CoreValidation: Added test functions for MSPLIM and... | tree | commitdiff |
| 2017-10-27 | Daniel Brondani | Merge branch 'develop' of https://github.com/ARM-softwa... | tree | commitdiff |
| 2017-10-27 | Jonatan Antoni | CoreValidation: Fixed test projects for Cortex-M0+ | tree | commitdiff |
| 2017-10-16 | Jonatan Antoni | Core-A: Add 64bit Generic Counter registers access... | tree | commitdiff |
| 2017-09-11 | Jonatan Antoni | CoreValidation: Fixed compiler and MISRA warnings. | tree | commitdiff |
| 2017-09-11 | Jonatan Antoni | CoreValidation: Initial contribution of a test suite... | tree | commitdiff |