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RISC-V: Add RV32E / FPU support for GCC (#140)
authorEmmanuel Puerto <50575011+e-puerto@users.noreply.github.com>
Wed, 9 Sep 2020 18:06:16 +0000 (20:06 +0200)
committerGitHub <noreply@github.com>
Wed, 9 Sep 2020 18:06:16 +0000 (11:06 -0700)
commit0037a6c574f43937d181d4d47fdc2bdd562bbcc3
tree4561d5a5882a6656c878a9bc5f15bed9ed699490tree | snapshot
parent524e78d58b6ee60f74e9b7028f266c5722bf4c24commit | diff
RISC-V: Add RV32E / FPU support for GCC (#140)

* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64

* Support RV32E - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>
* Support FPU - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>
* Fix interrupt managment and FPU initialization
portable/GCC/RISC-V/port.c diff | blob | history
portable/GCC/RISC-V/portASM.S diff | blob | history
https://github.com/FreeRTOS/FreeRTOS-Kernel.git