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(parent: b11eb3a) | patch
RISC-V:
authorRichard Barry <ribarry@amazon.com>
Wed, 12 Sep 2018 16:33:05 +0000 (16:33 +0000)
committerRichard Barry <ribarry@amazon.com>
Wed, 12 Sep 2018 16:33:05 +0000 (16:33 +0000)
commit32f35e91304feaa5b5aea4a45e7ce268d2644c38
tree319344ec0b73a2c0c9d25bf4c7ade3f7eae29bbftree | snapshot
parentb11eb3a59ca3f83cbc133ff63ae76d53b63831d9commit | diff
RISC-V:
Added code to setup the timer interrupt - not tested yet.
Added the taskYIELD() implementation - so far just checked it generates an interrupt.
FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c diff | blob | history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h diff | blob | history
https://github.com/FreeRTOS/FreeRTOS-Kernel.git