]> begriffs open source - freertos/commit
Add Cortex-A53 port with system register interface for CPU interface access (#357)
authorGaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Wed, 23 Jun 2021 01:51:58 +0000 (18:51 -0700)
committerGitHub <noreply@github.com>
Wed, 23 Jun 2021 01:51:58 +0000 (18:51 -0700)
commit4e3bf0f5c0efecf731c4e562defdba8aa01c15cb
treefa8ffb2e1378f768da5e2c1ff992d4884d735a02
parent56428a9831775a202a21a00ddf9be84ddcc1c4e2
Add Cortex-A53 port with system register interface for CPU interface access (#357)

The difference between this port and portable/GCC/ARM_CA53_64_BIT is
that this port uses System Register interface to access CPU interface
while the other one uses Memory-mapped interface.

Signed-off-by: Gaurav Aggarwal
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
portable/GCC/ARM_CA53_64_BIT_SRE/port.c [new file with mode: 0644]
portable/GCC/ARM_CA53_64_BIT_SRE/portASM.S [new file with mode: 0644]
portable/GCC/ARM_CA53_64_BIT_SRE/portmacro.h [new file with mode: 0644]