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(parent: 818eecc) | patch

author	Richard Barry <ribarry@amazon.com>
	Sun, 30 Dec 2018 23:53:47 +0000 (23:53 +0000)
committer	Richard Barry <ribarry@amazon.com>
	Sun, 30 Dec 2018 23:53:47 +0000 (23:53 +0000)
commit	e2af102c80b1436cc23e3e38b2c65d49caa49a3d
tree	3037d894090dcb479f7c9ec166e7c177dd99f497	tree \| snapshot
parent	818eeccc0c4121c13c5cbf3f44fc5b0635c9b2a0	commit \| diff

Re-org of RISC-V file structure and naming step 2.

FreeRTOS/Demo/RISC-V-Qemu-sifive_e-FreedomStudio/.cproject		diff \| blob \| history
FreeRTOS/Demo/RISC-V_Renode_Emulator_SoftConsole/.cproject		diff \| blob \| history
FreeRTOS/Demo/RISC-V_Renode_Emulator_SoftConsole/Microsemi_Code/riscv_hal/entry.S		diff \| blob \| history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_chip_specific_extensions.h	[moved from FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/Pulpino_Vega_RV32M1RM/freertos_risc_v_port_specific_extensions.h with 70% similarity]	diff \| blob \| history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/chip_specific_extensions/readme.txt	[new file with mode: 0644]	blob
FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_chip_specific_extensions.h	[moved from FreeRTOS/Source/portable/GCC/RISC-V-RV32/freertos_risc_v_port_specific_extensions.h with 58% similarity]	diff \| blob \| history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S		diff \| blob \| history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/readme.txt		diff \| blob \| history

https://github.com/FreeRTOS/FreeRTOS-Kernel.git