]> begriffs open source - freertos/commit
Ensure interrupts are enabled at first task start (#214)
authorGaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
Thu, 5 Nov 2020 17:26:56 +0000 (09:26 -0800)
committerGitHub <noreply@github.com>
Thu, 5 Nov 2020 17:26:56 +0000 (09:26 -0800)
commitebbe2cf854ea0eb147b7a78445472353fe2e5dc3
treed17814949e30ed540daa9d9394cbf135286d19da
parent1431b65110a294720b75af2f80b0f6465220a90f
Ensure interrupts are enabled at first task start (#214)

Critical sections in FreeRTOS are implemented using the following two
functions:

void vPortEnterCritical( void )
{
    portDISABLE_INTERRUPTS();
    uxCriticalNesting++;
}

void vPortExitCritical( void )
{
    uxCriticalNesting--;

    if( uxCriticalNesting == 0 )
    {
        portENABLE_INTERRUPTS();
    }
}

uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.

Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
16 files changed:
portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c
portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c
portable/ARMv8M/non_secure/portable/IAR/ARM_CM33/portasm.s
portable/ARMv8M/non_secure/portable/IAR/ARM_CM33_NTZ/portasm.s
portable/GCC/ARM_CM23/non_secure/port.c
portable/GCC/ARM_CM23_NTZ/non_secure/port.c
portable/GCC/ARM_CM33/non_secure/port.c
portable/GCC/ARM_CM33/non_secure/portasm.c
portable/GCC/ARM_CM33_NTZ/non_secure/port.c
portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
portable/IAR/ARM_CM23/non_secure/port.c
portable/IAR/ARM_CM23_NTZ/non_secure/port.c
portable/IAR/ARM_CM33/non_secure/port.c
portable/IAR/ARM_CM33/non_secure/portasm.s
portable/IAR/ARM_CM33_NTZ/non_secure/port.c
portable/IAR/ARM_CM33_NTZ/non_secure/portasm.s