#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H

// NDEBUG ("not debug"), can be specified by the
// programmer. It's honored by the C standard
// library, and by us
#ifndef NDEBUG
	// "not not debug" mode is...debug mode
	#include <assert.h>
	/* FreeRTOS internals call configASSERT() if it's
	 * defined. We'll delegate to picolibc assert(),
	 * and also disable interrupts on failure so it's
	 * clear in a debugger how the assert() function
	 * was reached. */
	#define configASSERT(x) ((x) \
			? ((void)0) \
			: (taskDISABLE_INTERRUPTS(), assert(x)))
	// also detect stack overflow in debug mode,
	// which adds a little overhead
	#define configCHECK_FOR_STACK_OVERFLOW 2
#endif

/* Size of stack for the idle task.
 *
 * Quite honestly, I don't know the optimal value
 * for this. I copied the following from the most
 * similar FreeRTOS demo: CORTEX_M4F_STM32F407ZG-SK.
 * Many other demos use 128, so we should be safe. */
#define configMINIMAL_STACK_SIZE @MIN_STACK_SIZE@

#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configSUPPORT_STATIC_ALLOCATION 0

// We'll use only one task, and it constantly yields
// by calling a delay function, so no need to involve
// a preemptive scheduler on each tick interrupt
#define configUSE_PREEMPTION @USE_PREEMPTION@
// Our app doesn't need callbacks for these events
#define configUSE_IDLE_HOOK @USE_IDLE_HOOK@
#define configUSE_TICK_HOOK @USE_TICK_HOOK@
// the linker will remove it if not needed
#define INCLUDE_vTaskDelay 1

/* Record the frequency of the peripheral used to
 * generate the SysTick interrupt.
 *
 * Our chosen port, GCC/ARM_CM4F/port.c, sets
 * the CLKSOURCE bit in the STK_CTL register, meaning
 * the processor clock (AHB) is the source for SysTick,
 * as described in PM0214 §4.5.1.
 *
 * If the processor clock and systick clock differ,
 * FreeRTOS provides configSYSTICK_CLOCK_HZ that you
 * can set independently of configCPU_CLOCK_HZ.
 *
 * We can use the global variable SystemCoreClock
 * managed by CMSIS, rather than hard-coding a value
 * in this header file. */
#include <stdint.h>
extern uint32_t SystemCoreClock;
#define configCPU_CLOCK_HZ (SystemCoreClock)

/* Set the time slice size of the scheduler. We'll
 * choose 10 ms, using a 100 Hz tick rate. The time
 * slice determines the resolution of pdMS_TO_TICKS(),
 * and a value greater than 1000 breaks that macro. */
#define configTICK_RATE_HZ @TICK_RATE_HZ@
// we're not on a restrictive 8- or 16-bit chip
#define configUSE_16_BIT_TICKS 0

/* The three interrupts used by FreeRTOS on Cortex-M4.
 *
 * Map the FreeRTOS interrupt handlers to the names set
 * up by picolibc in its interrupt vector table. */

// used to start the scheduler
#define vPortSVCHandler arm_svc_isr
// used for context switches
#define xPortPendSVHandler arm_pendsv_isr
// used as time base
#define xPortSysTickHandler arm_systick_isr

/*****************************************************
 * Interrupt priority details below.
 *
 * Macros required by our FreeRTOS GCC/ARM_CM4F port.
 *****************************************************/

/* Number of bits available to express interrupt
 * priority on our MCU. ARMv7-M chips support between
 * 3 and 8 priority bits (Architecture Reference Manual
 * §B1.5.4). We'll get the value from CMSIS.
 *
 * FreeRTOS consults this macro to do internal sanity
 * checks using configASSERT(), and we use it below */
#include CMSIS_device_header
#define configPRIO_BITS __NVIC_PRIO_BITS

// Tasks can be assigned a priority from zero, which is
// most urgent, to (configMAX_PRIORITIES - 1), which is
// least urgent.
#define configMAX_PRIORITIES (1 << configPRIO_BITS)

/* Set priority for interrupts used by the kernel port.
 *
 * We're using the highest value (lowest urgency),
 * shifted to the most significant bits of the byte.
 */
#define configKERNEL_INTERRUPT_PRIORITY \
	( (configMAX_PRIORITIES - 1) << (8 - configPRIO_BITS) )

/* Divide interrupts into two kinds based on priority:
 *
 * 1. Those which can call FreeRTOS functions, and
 * which FreeRTOS critical sections can mask.
 * 2. Those which can't call FreeRTOS, and whose
 * latency is essentially unaffected by FreeRTOS.
 *
 * We pick a dividing line, a "max interrupt priority
 * for FreeRTOS API calls," where interrupts with
 * greater or equal priority to the divider (less or
 * equal urgency) become type 1, and lower priority
 * valued (more urgent) interrupts become type 2.
 *
 * We pick priority 5, because even the most limited
 * Cortex-M has 3 prio bits, giving at least the ranges
 * (0-4) and (5-7) in each category. Our MCU, the
 * Cortex-M4F, has more: 4 prio bits (RM0383 §10.1.1). */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY \
	( 5 << (8 - configPRIO_BITS) )

#endif