begriffs open source - cmsis-dfp-stm32f4/blob - Source/Templates/arm/startup_stm32f412rx.s

   1 ;*******************************************************************************
   2 ;* File Name          : startup_stm32f412rx.s
   3 ;* Author             : MCD Application Team
   4 ;* Description        : STM32F412Rx devices vector table for MDK-ARM toolchain.
   5 ;*                      This module performs:
   6 ;*                      - Set the initial SP
   7 ;*                      - Set the initial PC == Reset_Handler
   8 ;*                      - Set the vector table entries with the exceptions ISR address
   9 ;*                      - Branches to __main in the C library (which eventually
  10 ;*                        calls main()).
  11 ;*                      After Reset the CortexM4 processor is in Thread mode,
  12 ;*                      priority is Privileged, and the Stack is set to Main.
  13 ;********************************************************************************
  14 ;* @attention
  15 ;*
  16 ;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  17 ;* All rights reserved.</center></h2>
  18 ;*
  19 ;* This software component is licensed by ST under BSD 3-Clause license,
  20 ;* the "License"; You may not use this file except in compliance with the
  21 ;* License. You may obtain a copy of the License at:
  22 ;*                        opensource.org/licenses/BSD-3-Clause
  23 ;*
  24 ;*******************************************************************************
  25 ;* <<< Use Configuration Wizard in Context Menu >>>
  26 ;
  27 ; Amount of memory (in bytes) allocated for Stack
  28 ; Tailor this value to your application needs
  29 ; <h> Stack Configuration
  30 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  31 ; </h>
  32
  33 Stack_Size      EQU     0x00000400
  34
  35                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  36 Stack_Mem       SPACE   Stack_Size
  37 __initial_sp
  38
  39
  40 ; <h> Heap Configuration
  41 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  42 ; </h>
  43
  44 Heap_Size       EQU     0x00000200
  45
  46                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  47 __heap_base
  48 Heap_Mem        SPACE   Heap_Size
  49 __heap_limit
  50
  51                 PRESERVE8
  52                 THUMB
  53
  54
  55 ; Vector Table Mapped to Address 0 at Reset
  56                 AREA    RESET, DATA, READONLY
  57                 EXPORT  __Vectors
  58                 EXPORT  __Vectors_End
  59                 EXPORT  __Vectors_Size
  60
  61 __Vectors       DCD     __initial_sp               ; Top of Stack
  62                 DCD     Reset_Handler              ; Reset Handler
  63                 DCD     NMI_Handler                ; NMI Handler
  64                 DCD     HardFault_Handler          ; Hard Fault Handler
  65                 DCD     MemManage_Handler          ; MPU Fault Handler
  66                 DCD     BusFault_Handler           ; Bus Fault Handler
  67                 DCD     UsageFault_Handler         ; Usage Fault Handler
  68                 DCD     0                          ; Reserved
  69                 DCD     0                          ; Reserved
  70                 DCD     0                          ; Reserved
  71                 DCD     0                          ; Reserved
  72                 DCD     SVC_Handler                ; SVCall Handler
  73                 DCD     DebugMon_Handler           ; Debug Monitor Handler
  74                 DCD     0                          ; Reserved
  75                 DCD     PendSV_Handler             ; PendSV Handler
  76                 DCD     SysTick_Handler            ; SysTick Handler
  77
  78                 ; External Interrupts
  79                 DCD     WWDG_IRQHandler                   ; Window WatchDog
  80                 DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
  81                 DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
  82                 DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
  83                 DCD     FLASH_IRQHandler                  ; FLASH
  84                 DCD     RCC_IRQHandler                    ; RCC
  85                 DCD     EXTI0_IRQHandler                  ; EXTI Line0
  86                 DCD     EXTI1_IRQHandler                  ; EXTI Line1
  87                 DCD     EXTI2_IRQHandler                  ; EXTI Line2
  88                 DCD     EXTI3_IRQHandler                  ; EXTI Line3
  89                 DCD     EXTI4_IRQHandler                  ; EXTI Line4
  90                 DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
  91                 DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1
  92                 DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2
  93                 DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3
  94                 DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4
  95                 DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5
  96                 DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6
  97                 DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s
  98                 DCD     CAN1_TX_IRQHandler                ; CAN1 TX
  99                 DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
 100                 DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
 101                 DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
 102                 DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
 103                 DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9
 104                 DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10
 105                 DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
 106                 DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
 107                 DCD     TIM2_IRQHandler                   ; TIM2
 108                 DCD     TIM3_IRQHandler                   ; TIM3
 109                 DCD     TIM4_IRQHandler                   ; TIM4
 110                 DCD     I2C1_EV_IRQHandler                ; I2C1 Event
 111                 DCD     I2C1_ER_IRQHandler                ; I2C1 Error
 112                 DCD     I2C2_EV_IRQHandler                ; I2C2 Event
 113                 DCD     I2C2_ER_IRQHandler                ; I2C2 Error
 114                 DCD     SPI1_IRQHandler                   ; SPI1
 115                 DCD     SPI2_IRQHandler                   ; SPI2
 116                 DCD     USART1_IRQHandler                 ; USART1
 117                 DCD     USART2_IRQHandler                 ; USART2
 118                 DCD     USART3_IRQHandler                 ; USART3
 119                 DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
 120                 DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
 121                 DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line
 122                 DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12
 123                 DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13
 124                 DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
 125                 DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare
 126                 DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7
 127                 DCD     0                                 ; Reserved
 128                 DCD     SDIO_IRQHandler                   ; SDIO
 129                 DCD     TIM5_IRQHandler                   ; TIM5
 130                 DCD     SPI3_IRQHandler                   ; SPI3
 131                 DCD     0                                 ; Reserved
 132                 DCD     0                                 ; Reserved
 133                 DCD     TIM6_IRQHandler                   ; TIM6
 134                 DCD     TIM7_IRQHandler                   ; TIM7
 135                 DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0
 136                 DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1
 137                 DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2
 138                 DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3
 139                 DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4
 140                 DCD     DFSDM1_FLT0_IRQHandler            ; DFSDM1 Filter 0 global interrupt
 141                 DCD     DFSDM1_FLT1_IRQHandler            ; DFSDM1 Filter 1 global interrupt
 142                 DCD     CAN2_TX_IRQHandler                ; CAN2 TX
 143                 DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0
 144                 DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1
 145                 DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE
 146                 DCD     OTG_FS_IRQHandler                 ; USB OTG FS
 147                 DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5
 148                 DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6
 149                 DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7
 150                 DCD     USART6_IRQHandler                 ; USART6
 151                 DCD     I2C3_EV_IRQHandler                ; I2C3 event
 152                 DCD     I2C3_ER_IRQHandler                ; I2C3 error
 153                 DCD     0                                 ; Reserved
 154                 DCD     0                                 ; Reserved
 155                 DCD     0                                 ; Reserved
 156                 DCD     0                                 ; Reserved
 157                 DCD     0                                 ; Reserved
 158                 DCD     0                                 ; Reserved
 159                 DCD     RNG_IRQHandler                    ; RNG
 160                 DCD     FPU_IRQHandler                    ; FPU
 161                 DCD     0                                 ; Reserved
 162                 DCD     0                                 ; Reserved
 163                 DCD     SPI4_IRQHandler                   ; SPI4
 164                 DCD     SPI5_IRQHandler                   ; SPI5
 165                 DCD     0                                 ; Reserved
 166                 DCD     0                                 ; Reserved
 167                 DCD     0                                 ; Reserved
 168                 DCD     0                                 ; Reserved
 169                 DCD     0                                 ; Reserved
 170                 DCD     0                                 ; Reserved
 171                 DCD     QUADSPI_IRQHandler                ; QuadSPI
 172                 DCD     0                                 ; Reserved
 173                 DCD     0                                 ; Reserved
 174                 DCD     FMPI2C1_EV_IRQHandler             ; FMPI2C1 Event
 175                 DCD     FMPI2C1_ER_IRQHandler             ; FMPI2C1 Error
 176
 177 __Vectors_End
 178
 179 __Vectors_Size  EQU  __Vectors_End - __Vectors
 180
 181                 AREA    |.text|, CODE, READONLY
 182
 183 ; Reset handler
 184 Reset_Handler    PROC
 185                  EXPORT  Reset_Handler             [WEAK]
 186         IMPORT  SystemInit
 187         IMPORT  __main
 188
 189                  LDR     R0, =SystemInit
 190                  BLX     R0
 191                  LDR     R0, =__main
 192                  BX      R0
 193                  ENDP
 194
 195 ; Dummy Exception Handlers (infinite loops which can be modified)
 196
 197 NMI_Handler     PROC
 198                 EXPORT  NMI_Handler                [WEAK]
 199                 B       .
 200                 ENDP
 201 HardFault_Handler\
 202                 PROC
 203                 EXPORT  HardFault_Handler          [WEAK]
 204                 B       .
 205                 ENDP
 206 MemManage_Handler\
 207                 PROC
 208                 EXPORT  MemManage_Handler          [WEAK]
 209                 B       .
 210                 ENDP
 211 BusFault_Handler\
 212                 PROC
 213                 EXPORT  BusFault_Handler           [WEAK]
 214                 B       .
 215                 ENDP
 216 UsageFault_Handler\
 217                 PROC
 218                 EXPORT  UsageFault_Handler         [WEAK]
 219                 B       .
 220                 ENDP
 221 SVC_Handler     PROC
 222                 EXPORT  SVC_Handler                [WEAK]
 223                 B       .
 224                 ENDP
 225 DebugMon_Handler\
 226                 PROC
 227                 EXPORT  DebugMon_Handler           [WEAK]
 228                 B       .
 229                 ENDP
 230 PendSV_Handler  PROC
 231                 EXPORT  PendSV_Handler             [WEAK]
 232                 B       .
 233                 ENDP
 234 SysTick_Handler PROC
 235                 EXPORT  SysTick_Handler            [WEAK]
 236                 B       .
 237                 ENDP
 238
 239 Default_Handler PROC
 240
 241                 EXPORT  WWDG_IRQHandler                   [WEAK]
 242                 EXPORT  PVD_IRQHandler                    [WEAK]
 243                 EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
 244                 EXPORT  RTC_WKUP_IRQHandler               [WEAK]
 245                 EXPORT  FLASH_IRQHandler                  [WEAK]
 246                 EXPORT  RCC_IRQHandler                    [WEAK]
 247                 EXPORT  EXTI0_IRQHandler                  [WEAK]
 248                 EXPORT  EXTI1_IRQHandler                  [WEAK]
 249                 EXPORT  EXTI2_IRQHandler                  [WEAK]
 250                 EXPORT  EXTI3_IRQHandler                  [WEAK]
 251                 EXPORT  EXTI4_IRQHandler                  [WEAK]
 252                 EXPORT  DMA1_Stream0_IRQHandler           [WEAK]
 253                 EXPORT  DMA1_Stream1_IRQHandler           [WEAK]
 254                 EXPORT  DMA1_Stream2_IRQHandler           [WEAK]
 255                 EXPORT  DMA1_Stream3_IRQHandler           [WEAK]
 256                 EXPORT  DMA1_Stream4_IRQHandler           [WEAK]
 257                 EXPORT  DMA1_Stream5_IRQHandler           [WEAK]
 258                 EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
 259                 EXPORT  ADC_IRQHandler                    [WEAK]
 260                 EXPORT  CAN1_TX_IRQHandler                [WEAK]
 261                 EXPORT  CAN1_RX0_IRQHandler               [WEAK]
 262                 EXPORT  CAN1_RX1_IRQHandler               [WEAK]
 263                 EXPORT  CAN1_SCE_IRQHandler               [WEAK]
 264                 EXPORT  EXTI9_5_IRQHandler                [WEAK]
 265                 EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]
 266                 EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]
 267                 EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK]
 268                 EXPORT  TIM1_CC_IRQHandler                [WEAK]
 269                 EXPORT  TIM2_IRQHandler                   [WEAK]
 270                 EXPORT  TIM3_IRQHandler                   [WEAK]
 271                 EXPORT  TIM4_IRQHandler                   [WEAK]
 272                 EXPORT  I2C1_EV_IRQHandler                [WEAK]
 273                 EXPORT  I2C1_ER_IRQHandler                [WEAK]
 274                 EXPORT  I2C2_EV_IRQHandler                [WEAK]
 275                 EXPORT  I2C2_ER_IRQHandler                [WEAK]
 276                 EXPORT  SPI1_IRQHandler                   [WEAK]
 277                 EXPORT  SPI2_IRQHandler                   [WEAK]
 278                 EXPORT  USART1_IRQHandler                 [WEAK]
 279                 EXPORT  USART2_IRQHandler                 [WEAK]
 280                 EXPORT  USART3_IRQHandler                 [WEAK]
 281                 EXPORT  EXTI15_10_IRQHandler              [WEAK]
 282                 EXPORT  RTC_Alarm_IRQHandler              [WEAK]
 283                 EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]
 284                                 EXPORT  OTG_FS_IRQHandler                 [WEAK]
 285                 EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]
 286                 EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]
 287                 EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK]
 288                 EXPORT  TIM8_CC_IRQHandler                [WEAK]
 289                 EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
 290                 EXPORT  SDIO_IRQHandler                   [WEAK]
 291                 EXPORT  TIM5_IRQHandler                   [WEAK]
 292                 EXPORT  SPI3_IRQHandler                   [WEAK]
 293                 EXPORT  TIM6_IRQHandler                   [WEAK]
 294                 EXPORT  TIM7_IRQHandler                   [WEAK]
 295                 EXPORT  DMA2_Stream0_IRQHandler           [WEAK]
 296                 EXPORT  DMA2_Stream1_IRQHandler           [WEAK]
 297                 EXPORT  DMA2_Stream2_IRQHandler           [WEAK]
 298                 EXPORT  DMA2_Stream3_IRQHandler           [WEAK]
 299                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 300                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 301                 EXPORT  DFSDM1_FLT0_IRQHandler            [WEAK]
 302                 EXPORT  DFSDM1_FLT1_IRQHandler            [WEAK]
 303                 EXPORT  CAN2_TX_IRQHandler                [WEAK]
 304                 EXPORT  CAN2_RX0_IRQHandler               [WEAK]
 305                 EXPORT  CAN2_RX1_IRQHandler               [WEAK]
 306                 EXPORT  CAN2_SCE_IRQHandler               [WEAK]
 307                 EXPORT  DMA2_Stream5_IRQHandler           [WEAK]
 308                 EXPORT  DMA2_Stream6_IRQHandler           [WEAK]
 309                 EXPORT  DMA2_Stream7_IRQHandler           [WEAK]
 310                 EXPORT  USART6_IRQHandler                 [WEAK]
 311                 EXPORT  I2C3_EV_IRQHandler                [WEAK]
 312                 EXPORT  I2C3_ER_IRQHandler                [WEAK]
 313                 EXPORT  RNG_IRQHandler                    [WEAK]
 314                 EXPORT  FPU_IRQHandler                    [WEAK]
 315                 EXPORT  SPI4_IRQHandler                   [WEAK]
 316                 EXPORT  SPI5_IRQHandler                   [WEAK]
 317                 EXPORT  QUADSPI_IRQHandler                [WEAK]
 318                 EXPORT  FMPI2C1_EV_IRQHandler             [WEAK]
 319                 EXPORT  FMPI2C1_ER_IRQHandler             [WEAK]
 320
 321 WWDG_IRQHandler
 322 PVD_IRQHandler
 323 TAMP_STAMP_IRQHandler
 324 RTC_WKUP_IRQHandler
 325 FLASH_IRQHandler
 326 RCC_IRQHandler
 327 EXTI0_IRQHandler
 328 EXTI1_IRQHandler
 329 EXTI2_IRQHandler
 330 EXTI3_IRQHandler
 331 EXTI4_IRQHandler
 332 DMA1_Stream0_IRQHandler
 333 DMA1_Stream1_IRQHandler
 334 DMA1_Stream2_IRQHandler
 335 DMA1_Stream3_IRQHandler
 336 DMA1_Stream4_IRQHandler
 337 DMA1_Stream5_IRQHandler
 338 DMA1_Stream6_IRQHandler
 339 ADC_IRQHandler
 340 CAN1_TX_IRQHandler
 341 CAN1_RX0_IRQHandler
 342 CAN1_RX1_IRQHandler
 343 CAN1_SCE_IRQHandler
 344 EXTI9_5_IRQHandler
 345 TIM1_BRK_TIM9_IRQHandler
 346 TIM1_UP_TIM10_IRQHandler
 347 TIM1_TRG_COM_TIM11_IRQHandler
 348 TIM1_CC_IRQHandler
 349 TIM2_IRQHandler
 350 TIM3_IRQHandler
 351 TIM4_IRQHandler
 352 I2C1_EV_IRQHandler
 353 I2C1_ER_IRQHandler
 354 I2C2_EV_IRQHandler
 355 I2C2_ER_IRQHandler
 356 SPI1_IRQHandler
 357 SPI2_IRQHandler
 358 USART1_IRQHandler
 359 USART2_IRQHandler
 360 USART3_IRQHandler
 361 EXTI15_10_IRQHandler
 362 RTC_Alarm_IRQHandler
 363 OTG_FS_WKUP_IRQHandler
 364 TIM8_BRK_TIM12_IRQHandler
 365 TIM8_UP_TIM13_IRQHandler
 366 TIM8_TRG_COM_TIM14_IRQHandler
 367 TIM8_CC_IRQHandler
 368 DMA1_Stream7_IRQHandler
 369 SDIO_IRQHandler
 370 TIM5_IRQHandler
 371 SPI3_IRQHandler
 372 TIM6_IRQHandler
 373 TIM7_IRQHandler
 374 DMA2_Stream0_IRQHandler
 375 DMA2_Stream1_IRQHandler
 376 DMA2_Stream2_IRQHandler
 377 DMA2_Stream3_IRQHandler
 378 DMA2_Stream4_IRQHandler
 379 DFSDM1_FLT0_IRQHandler
 380 DFSDM1_FLT1_IRQHandler
 381 CAN2_TX_IRQHandler
 382 CAN2_RX0_IRQHandler
 383 CAN2_RX1_IRQHandler
 384 CAN2_SCE_IRQHandler
 385 OTG_FS_IRQHandler
 386 DMA2_Stream5_IRQHandler
 387 DMA2_Stream6_IRQHandler
 388 DMA2_Stream7_IRQHandler
 389 USART6_IRQHandler
 390 I2C3_EV_IRQHandler
 391 I2C3_ER_IRQHandler
 392 RNG_IRQHandler
 393 FPU_IRQHandler
 394 SPI4_IRQHandler
 395 SPI5_IRQHandler
 396 QUADSPI_IRQHandler
 397 FMPI2C1_EV_IRQHandler
 398 FMPI2C1_ER_IRQHandler
 399
 400                 B       .
 401
 402                 ENDP
 403
 404                 ALIGN
 405
 406 ;*******************************************************************************
 407 ; User Stack and Heap initialization
 408 ;*******************************************************************************
 409                  IF      :DEF:__MICROLIB
 410
 411                  EXPORT  __initial_sp
 412                  EXPORT  __heap_base
 413                  EXPORT  __heap_limit
 414
 415                  ELSE
 416
 417                  IMPORT  __use_two_region_memory
 418                  EXPORT  __user_initial_stackheap
 419
 420 __user_initial_stackheap
 421
 422                  LDR     R0, =  Heap_Mem
 423                  LDR     R1, =(Stack_Mem + Stack_Size)
 424                  LDR     R2, = (Heap_Mem +  Heap_Size)
 425                  LDR     R3, = Stack_Mem
 426                  BX      LR
 427
 428                  ALIGN
 429
 430                  ENDIF
 431
 432                  END
 433
 434 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****