begriffs open source - cmsis-dfp-stm32f4/blob - Source/Templates/gcc/startup_stm32f401xe.s

   1 /**
   2   ******************************************************************************
   3   * @file      startup_stm32f401xe.s
   4   * @author    MCD Application Team
   5   * @brief     STM32F401xExx Devices vector table for GCC based toolchains.
   6   *            This module performs:
   7   *                - Set the initial SP
   8   *                - Set the initial PC == Reset_Handler,
   9   *                - Set the vector table entries with the exceptions ISR address
  10   *                - Branches to main in the C library (which eventually
  11   *                  calls main()).
  12   *            After Reset the Cortex-M4 processor is in Thread mode,
  13   *            priority is Privileged, and the Stack is set to Main.
  14   ******************************************************************************
  15   * @attention
  16   *
  17   * Copyright (c) 2017 STMicroelectronics.
  18   * All rights reserved.
  19   *
  20   * This software is licensed under terms that can be found in the LICENSE file
  21   * in the root directory of this software component.
  22   * If no LICENSE file comes with this software, it is provided AS-IS.
  23   *
  24   ******************************************************************************
  25   */
  26
  27   .syntax unified
  28   .cpu cortex-m4
  29   .fpu softvfp
  30   .thumb
  31
  32 .global  g_pfnVectors
  33 .global  Default_Handler
  34
  35 /* start address for the initialization values of the .data section.
  36 defined in linker script */
  37 .word  _sidata
  38 /* start address for the .data section. defined in linker script */
  39 .word  _sdata
  40 /* end address for the .data section. defined in linker script */
  41 .word  _edata
  42 /* start address for the .bss section. defined in linker script */
  43 .word  _sbss
  44 /* end address for the .bss section. defined in linker script */
  45 .word  _ebss
  46 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  47
  48 /**
  49  * @brief  This is the code that gets called when the processor first
  50  *          starts execution following a reset event. Only the absolutely
  51  *          necessary set is performed, after which the application
  52  *          supplied main() routine is called.
  53  * @param  None
  54  * @retval : None
  55 */
  56
  57     .section  .text.Reset_Handler
  58   .weak  Reset_Handler
  59   .type  Reset_Handler, %function
  60 Reset_Handler:
  61   ldr   sp, =_estack                     /* set stack pointer */
  62
  63 /* Copy the data segment initializers from flash to SRAM */
  64   ldr r0, =_sdata
  65   ldr r1, =_edata
  66   ldr r2, =_sidata
  67   movs r3, #0
  68   b LoopCopyDataInit
  69
  70 CopyDataInit:
  71   ldr r4, [r2, r3]
  72   str r4, [r0, r3]
  73   adds r3, r3, #4
  74
  75 LoopCopyDataInit:
  76   adds r4, r0, r3
  77   cmp r4, r1
  78   bcc CopyDataInit
  79
  80 /* Zero fill the bss segment. */
  81   ldr r2, =_sbss
  82   ldr r4, =_ebss
  83   movs r3, #0
  84   b LoopFillZerobss
  85
  86 FillZerobss:
  87   str  r3, [r2]
  88   adds r2, r2, #4
  89
  90 LoopFillZerobss:
  91   cmp r2, r4
  92   bcc FillZerobss
  93
  94 /* Call the clock system initialization function.*/
  95   bl  SystemInit
  96 /* Call static constructors */
  97     bl __libc_init_array
  98 /* Call the application's entry point.*/
  99   bl  main
 100   bx  lr
 101 .size  Reset_Handler, .-Reset_Handler
 102
 103 /**
 104  * @brief  This is the code that gets called when the processor receives an
 105  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 106  *         the system state for examination by a debugger.
 107  * @param  None
 108  * @retval None
 109 */
 110     .section  .text.Default_Handler,"ax",%progbits
 111 Default_Handler:
 112 Infinite_Loop:
 113   b  Infinite_Loop
 114   .size  Default_Handler, .-Default_Handler
 115 /******************************************************************************
 116 *
 117 * The minimal vector table for a Cortex M3. Note that the proper constructs
 118 * must be placed on this to ensure that it ends up at physical address
 119 * 0x0000.0000.
 120 *
 121 *******************************************************************************/
 122    .section  .isr_vector,"a",%progbits
 123   .type  g_pfnVectors, %object
 124   .size  g_pfnVectors, .-g_pfnVectors
 125
 126 g_pfnVectors:
 127   .word  _estack
 128   .word  Reset_Handler
 129   .word  NMI_Handler
 130   .word  HardFault_Handler
 131   .word  MemManage_Handler
 132   .word  BusFault_Handler
 133   .word  UsageFault_Handler
 134   .word  0
 135   .word  0
 136   .word  0
 137   .word  0
 138   .word  SVC_Handler
 139   .word  DebugMon_Handler
 140   .word  0
 141   .word  PendSV_Handler
 142   .word  SysTick_Handler
 143
 144   /* External Interrupts */
 145   .word     WWDG_IRQHandler                   /* Window WatchDog              */
 146   .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
 147   .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
 148   .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */
 149   .word     FLASH_IRQHandler                  /* FLASH                        */
 150   .word     RCC_IRQHandler                    /* RCC                          */
 151   .word     EXTI0_IRQHandler                  /* EXTI Line0                   */
 152   .word     EXTI1_IRQHandler                  /* EXTI Line1                   */
 153   .word     EXTI2_IRQHandler                  /* EXTI Line2                   */
 154   .word     EXTI3_IRQHandler                  /* EXTI Line3                   */
 155   .word     EXTI4_IRQHandler                  /* EXTI Line4                   */
 156   .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */
 157   .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */
 158   .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */
 159   .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */
 160   .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */
 161   .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */
 162   .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */
 163   .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s         */
 164   .word     0                                             /* Reserved                      */
 165   .word     0                                                     /* Reserved                     */
 166   .word     0                                 /* Reserved                     */
 167   .word     0                                 /* Reserved                     */
 168   .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */
 169   .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9          */
 170   .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10        */
 171   .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11 */
 172   .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
 173   .word     TIM2_IRQHandler                   /* TIM2                         */
 174   .word     TIM3_IRQHandler                   /* TIM3                         */
 175   .word     TIM4_IRQHandler                   /* TIM4                         */
 176   .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */
 177   .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */
 178   .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */
 179   .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */
 180   .word     SPI1_IRQHandler                   /* SPI1                         */
 181   .word     SPI2_IRQHandler                   /* SPI2                         */
 182   .word     USART1_IRQHandler                 /* USART1                       */
 183   .word     USART2_IRQHandler                 /* USART2                       */
 184   .word     0                                             /* Reserved                       */
 185   .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */
 186   .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */
 187   .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line */
 188   .word     0                                 /* Reserved                                 */
 189   .word     0                                 /* Reserved                                 */
 190   .word     0                                 /* Reserved                                         */
 191   .word     0                                 /* Reserved                     */
 192   .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */
 193   .word     0                                 /* Reserved                     */
 194   .word     SDIO_IRQHandler                   /* SDIO                         */
 195   .word     TIM5_IRQHandler                   /* TIM5                         */
 196   .word     SPI3_IRQHandler                   /* SPI3                         */
 197   .word     0                                 /* Reserved                     */
 198   .word     0                                 /* Reserved                     */
 199   .word     0                                 /* Reserved                     */
 200   .word     0                                 /* Reserved                     */
 201   .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */
 202   .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */
 203   .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */
 204   .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */
 205   .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */
 206   .word     0                                             /* Reserved                     */
 207   .word     0                                                     /* Reserved                     */
 208   .word     0                                                     /* Reserved                     */
 209   .word     0                                                     /* Reserved                     */
 210   .word     0                                                     /* Reserved                     */
 211   .word     0                                                     /* Reserved                     */
 212   .word     OTG_FS_IRQHandler                 /* USB OTG FS                   */
 213   .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */
 214   .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */
 215   .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */
 216   .word     USART6_IRQHandler                 /* USART6                       */
 217   .word     I2C3_EV_IRQHandler                /* I2C3 event                   */
 218   .word     I2C3_ER_IRQHandler                /* I2C3 error                   */
 219   .word     0                                 /* Reserved                     */
 220   .word     0                                 /* Reserved                     */
 221   .word     0                                 /* Reserved                     */
 222   .word     0                                 /* Reserved                     */
 223   .word     0                                 /* Reserved                     */
 224   .word     0                                 /* Reserved                     */
 225   .word     0                                 /* Reserved                     */
 226   .word     FPU_IRQHandler                    /* FPU                          */
 227   .word     0                                 /* Reserved                     */
 228   .word     0                                 /* Reserved                     */
 229   .word     SPI4_IRQHandler                   /* SPI4                         */
 230
 231 /*******************************************************************************
 232 *
 233 * Provide weak aliases for each Exception handler to the Default_Handler.
 234 * As they are weak aliases, any function with the same name will override
 235 * this definition.
 236 *
 237 *******************************************************************************/
 238    .weak      NMI_Handler
 239    .thumb_set NMI_Handler,Default_Handler
 240
 241    .weak      HardFault_Handler
 242    .thumb_set HardFault_Handler,Default_Handler
 243
 244    .weak      MemManage_Handler
 245    .thumb_set MemManage_Handler,Default_Handler
 246
 247    .weak      BusFault_Handler
 248    .thumb_set BusFault_Handler,Default_Handler
 249
 250    .weak      UsageFault_Handler
 251    .thumb_set UsageFault_Handler,Default_Handler
 252
 253    .weak      SVC_Handler
 254    .thumb_set SVC_Handler,Default_Handler
 255
 256    .weak      DebugMon_Handler
 257    .thumb_set DebugMon_Handler,Default_Handler
 258
 259    .weak      PendSV_Handler
 260    .thumb_set PendSV_Handler,Default_Handler
 261
 262    .weak      SysTick_Handler
 263    .thumb_set SysTick_Handler,Default_Handler
 264
 265    .weak      WWDG_IRQHandler
 266    .thumb_set WWDG_IRQHandler,Default_Handler
 267
 268    .weak      PVD_IRQHandler
 269    .thumb_set PVD_IRQHandler,Default_Handler
 270
 271    .weak      TAMP_STAMP_IRQHandler
 272    .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
 273
 274    .weak      RTC_WKUP_IRQHandler
 275    .thumb_set RTC_WKUP_IRQHandler,Default_Handler
 276
 277    .weak      FLASH_IRQHandler
 278    .thumb_set FLASH_IRQHandler,Default_Handler
 279
 280    .weak      RCC_IRQHandler
 281    .thumb_set RCC_IRQHandler,Default_Handler
 282
 283    .weak      EXTI0_IRQHandler
 284    .thumb_set EXTI0_IRQHandler,Default_Handler
 285
 286    .weak      EXTI1_IRQHandler
 287    .thumb_set EXTI1_IRQHandler,Default_Handler
 288
 289    .weak      EXTI2_IRQHandler
 290    .thumb_set EXTI2_IRQHandler,Default_Handler
 291
 292    .weak      EXTI3_IRQHandler
 293    .thumb_set EXTI3_IRQHandler,Default_Handler
 294
 295    .weak      EXTI4_IRQHandler
 296    .thumb_set EXTI4_IRQHandler,Default_Handler
 297
 298    .weak      DMA1_Stream0_IRQHandler
 299    .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
 300
 301    .weak      DMA1_Stream1_IRQHandler
 302    .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
 303
 304    .weak      DMA1_Stream2_IRQHandler
 305    .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
 306
 307    .weak      DMA1_Stream3_IRQHandler
 308    .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
 309
 310    .weak      DMA1_Stream4_IRQHandler
 311    .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
 312
 313    .weak      DMA1_Stream5_IRQHandler
 314    .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
 315
 316    .weak      DMA1_Stream6_IRQHandler
 317    .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
 318
 319    .weak      ADC_IRQHandler
 320    .thumb_set ADC_IRQHandler,Default_Handler
 321
 322    .weak      EXTI9_5_IRQHandler
 323    .thumb_set EXTI9_5_IRQHandler,Default_Handler
 324
 325    .weak      TIM1_BRK_TIM9_IRQHandler
 326    .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
 327
 328    .weak      TIM1_UP_TIM10_IRQHandler
 329    .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
 330
 331    .weak      TIM1_TRG_COM_TIM11_IRQHandler
 332    .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
 333
 334    .weak      TIM1_CC_IRQHandler
 335    .thumb_set TIM1_CC_IRQHandler,Default_Handler
 336
 337    .weak      TIM2_IRQHandler
 338    .thumb_set TIM2_IRQHandler,Default_Handler
 339
 340    .weak      TIM3_IRQHandler
 341    .thumb_set TIM3_IRQHandler,Default_Handler
 342
 343    .weak      TIM4_IRQHandler
 344    .thumb_set TIM4_IRQHandler,Default_Handler
 345
 346    .weak      I2C1_EV_IRQHandler
 347    .thumb_set I2C1_EV_IRQHandler,Default_Handler
 348
 349    .weak      I2C1_ER_IRQHandler
 350    .thumb_set I2C1_ER_IRQHandler,Default_Handler
 351
 352    .weak      I2C2_EV_IRQHandler
 353    .thumb_set I2C2_EV_IRQHandler,Default_Handler
 354
 355    .weak      I2C2_ER_IRQHandler
 356    .thumb_set I2C2_ER_IRQHandler,Default_Handler
 357
 358    .weak      SPI1_IRQHandler
 359    .thumb_set SPI1_IRQHandler,Default_Handler
 360
 361    .weak      SPI2_IRQHandler
 362    .thumb_set SPI2_IRQHandler,Default_Handler
 363
 364    .weak      USART1_IRQHandler
 365    .thumb_set USART1_IRQHandler,Default_Handler
 366
 367    .weak      USART2_IRQHandler
 368    .thumb_set USART2_IRQHandler,Default_Handler
 369
 370    .weak      EXTI15_10_IRQHandler
 371    .thumb_set EXTI15_10_IRQHandler,Default_Handler
 372
 373    .weak      RTC_Alarm_IRQHandler
 374    .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 375
 376    .weak      OTG_FS_WKUP_IRQHandler
 377    .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
 378
 379    .weak      DMA1_Stream7_IRQHandler
 380    .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
 381
 382    .weak      SDIO_IRQHandler
 383    .thumb_set SDIO_IRQHandler,Default_Handler
 384
 385    .weak      TIM5_IRQHandler
 386    .thumb_set TIM5_IRQHandler,Default_Handler
 387
 388    .weak      SPI3_IRQHandler
 389    .thumb_set SPI3_IRQHandler,Default_Handler
 390
 391    .weak      DMA2_Stream0_IRQHandler
 392    .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
 393
 394    .weak      DMA2_Stream1_IRQHandler
 395    .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
 396
 397    .weak      DMA2_Stream2_IRQHandler
 398    .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
 399
 400    .weak      DMA2_Stream3_IRQHandler
 401    .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
 402
 403    .weak      DMA2_Stream4_IRQHandler
 404    .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
 405
 406    .weak      OTG_FS_IRQHandler
 407    .thumb_set OTG_FS_IRQHandler,Default_Handler
 408
 409    .weak      DMA2_Stream5_IRQHandler
 410    .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
 411
 412    .weak      DMA2_Stream6_IRQHandler
 413    .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
 414
 415    .weak      DMA2_Stream7_IRQHandler
 416    .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
 417
 418    .weak      USART6_IRQHandler
 419    .thumb_set USART6_IRQHandler,Default_Handler
 420
 421    .weak      I2C3_EV_IRQHandler
 422    .thumb_set I2C3_EV_IRQHandler,Default_Handler
 423
 424    .weak      I2C3_ER_IRQHandler
 425    .thumb_set I2C3_ER_IRQHandler,Default_Handler
 426
 427    .weak      FPU_IRQHandler
 428    .thumb_set FPU_IRQHandler,Default_Handler
 429
 430    .weak      SPI4_IRQHandler
 431    .thumb_set SPI4_IRQHandler,Default_Handler