begriffs open source - cmsis-dfp-stm32f4/blob - Source/Templates/arm/startup_stm32f410rx.s

   1 ;*******************************************************************************
   2 ;* File Name          : startup_stm32f410rx.s
   3 ;* Author             : MCD Application Team
   4 ;* Description        : STM32F410Rx devices vector table for MDK-ARM toolchain.
   5 ;*                      This module performs:
   6 ;*                      - Set the initial SP
   7 ;*                      - Set the initial PC == Reset_Handler
   8 ;*                      - Set the vector table entries with the exceptions ISR address
   9 ;*                      - Branches to __main in the C library (which eventually
  10 ;*                        calls main()).
  11 ;*                      After Reset the CortexM4 processor is in Thread mode,
  12 ;*                      priority is Privileged, and the Stack is set to Main.
  13 ;*******************************************************************************
  14 ;* @attention
  15 ;*
  16 ;* Copyright (c) 2017 STMicroelectronics.
  17 ;* All rights reserved.
  18 ;*
  19 ;* This software is licensed under terms that can be found in the LICENSE file
  20 ;* in the root directory of this software component.
  21 ;* If no LICENSE file comes with this software, it is provided AS-IS.
  22 ;*
  23 ;*******************************************************************************
  24 ;* <<< Use Configuration Wizard in Context Menu >>>
  25 ;
  26 ; Amount of memory (in bytes) allocated for Stack
  27 ; Tailor this value to your application needs
  28 ; <h> Stack Configuration
  29 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30 ; </h>
  31
  32 Stack_Size      EQU     0x00000400
  33
  34                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  35 Stack_Mem       SPACE   Stack_Size
  36 __initial_sp
  37
  38
  39 ; <h> Heap Configuration
  40 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  41 ; </h>
  42
  43 Heap_Size       EQU     0x00000200
  44
  45                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  46 __heap_base
  47 Heap_Mem        SPACE   Heap_Size
  48 __heap_limit
  49
  50                 PRESERVE8
  51                 THUMB
  52
  53
  54 ; Vector Table Mapped to Address 0 at Reset
  55                 AREA    RESET, DATA, READONLY
  56                 EXPORT  __Vectors
  57                 EXPORT  __Vectors_End
  58                 EXPORT  __Vectors_Size
  59
  60 __Vectors       DCD     __initial_sp               ; Top of Stack
  61                 DCD     Reset_Handler              ; Reset Handler
  62                 DCD     NMI_Handler                ; NMI Handler
  63                 DCD     HardFault_Handler          ; Hard Fault Handler
  64                 DCD     MemManage_Handler          ; MPU Fault Handler
  65                 DCD     BusFault_Handler           ; Bus Fault Handler
  66                 DCD     UsageFault_Handler         ; Usage Fault Handler
  67                 DCD     0                          ; Reserved
  68                 DCD     0                          ; Reserved
  69                 DCD     0                          ; Reserved
  70                 DCD     0                          ; Reserved
  71                 DCD     SVC_Handler                ; SVCall Handler
  72                 DCD     DebugMon_Handler           ; Debug Monitor Handler
  73                 DCD     0                          ; Reserved
  74                 DCD     PendSV_Handler             ; PendSV Handler
  75                 DCD     SysTick_Handler            ; SysTick Handler
  76
  77                 ; External Interrupts
  78                 DCD     WWDG_IRQHandler                   ; Window WatchDog
  79                 DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
  80                 DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
  81                 DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
  82                 DCD     FLASH_IRQHandler                  ; FLASH
  83                 DCD     RCC_IRQHandler                    ; RCC
  84                 DCD     EXTI0_IRQHandler                  ; EXTI Line0
  85                 DCD     EXTI1_IRQHandler                  ; EXTI Line1
  86                 DCD     EXTI2_IRQHandler                  ; EXTI Line2
  87                 DCD     EXTI3_IRQHandler                  ; EXTI Line3
  88                 DCD     EXTI4_IRQHandler                  ; EXTI Line4
  89                 DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
  90                 DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1
  91                 DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2
  92                 DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3
  93                 DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4
  94                 DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5
  95                 DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6
  96                 DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s
  97                 DCD     0                                 ; Reserved
  98                 DCD     0                                 ; Reserved
  99                 DCD     0                                 ; Reserved
 100                 DCD     0                                 ; Reserved
 101                 DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
 102                 DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9
 103                 DCD     TIM1_UP_IRQHandler                ; TIM1 Update
 104                 DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
 105                 DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
 106                 DCD     0                                 ; Reserved
 107                 DCD     0                                 ; Reserved
 108                 DCD     0                                 ; Reserved
 109                 DCD     I2C1_EV_IRQHandler                ; I2C1 Event
 110                 DCD     I2C1_ER_IRQHandler                ; I2C1 Error
 111                 DCD     I2C2_EV_IRQHandler                ; I2C2 Event
 112                 DCD     I2C2_ER_IRQHandler                ; I2C2 Error
 113                 DCD     SPI1_IRQHandler                   ; SPI1
 114                 DCD     SPI2_IRQHandler                   ; SPI2
 115                 DCD     USART1_IRQHandler                 ; USART1
 116                 DCD     USART2_IRQHandler                 ; USART2
 117                 DCD     0                                 ; Reserved
 118                 DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
 119                 DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
 120                 DCD     0                                 ; Reserved
 121                 DCD     0                                 ; Reserved
 122                 DCD     0                                 ; Reserved
 123                 DCD     0                                 ; Reserved
 124                 DCD     0                                 ; Reserved
 125                 DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7
 126                 DCD     0                                 ; Reserved
 127                 DCD     0                                 ; Reserved
 128                 DCD     TIM5_IRQHandler                   ; TIM5
 129                 DCD     0                                 ; Reserved
 130                 DCD     0                                 ; Reserved
 131                 DCD     0                                 ; Reserved
 132                 DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC
 133                 DCD     0                                 ; Reserved
 134                 DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0
 135                 DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1
 136                 DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2
 137                 DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3
 138                 DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4
 139                 DCD     0                                 ; Reserved
 140                 DCD     0                                 ; Reserved
 141                 DCD     0                                 ; Reserved
 142                 DCD     0                                 ; Reserved
 143                 DCD     0                                 ; Reserved
 144                 DCD     0                                 ; Reserved
 145                 DCD     0                                 ; Reserved
 146                 DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5
 147                 DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6
 148                 DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7
 149                 DCD     USART6_IRQHandler                 ; USART6
 150                 DCD     0                                 ; Reserved
 151                 DCD     0                                 ; Reserved
 152                 DCD     0                                 ; Reserved
 153                 DCD     0                                 ; Reserved
 154                 DCD     0                                 ; Reserved
 155                 DCD     0                                 ; Reserved
 156                 DCD     0                                 ; Reserved
 157                 DCD     0                                 ; Reserved
 158                 DCD     RNG_IRQHandler                    ; RNG
 159                 DCD     FPU_IRQHandler                    ; FPU
 160                 DCD     0                                 ; Reserved
 161                 DCD     0                                 ; Reserved
 162                 DCD     0                                 ; Reserved
 163                 DCD     SPI5_IRQHandler                   ; SPI5
 164                 DCD     0                                 ; Reserved
 165                 DCD     0                                 ; Reserved
 166                 DCD     0                                 ; Reserved
 167                 DCD     0                                 ; Reserved
 168                 DCD     0                                 ; Reserved
 169                 DCD     0                                 ; Reserved
 170                 DCD     0                                 ; Reserved
 171                 DCD     0                                 ; Reserved
 172                 DCD     0                                 ; Reserved
 173                 DCD     FMPI2C1_EV_IRQHandler             ; FMPI2C1 Event
 174                 DCD     FMPI2C1_ER_IRQHandler             ; FMPI2C1 Error
 175                 DCD     LPTIM1_IRQHandler                 ; LP TIM1
 176
 177 __Vectors_End
 178
 179 __Vectors_Size  EQU  __Vectors_End - __Vectors
 180
 181                 AREA    |.text|, CODE, READONLY
 182
 183 ; Reset handler
 184 Reset_Handler    PROC
 185                  EXPORT  Reset_Handler             [WEAK]
 186         IMPORT  SystemInit
 187         IMPORT  __main
 188
 189                  LDR     R0, =SystemInit
 190                  BLX     R0
 191                  LDR     R0, =__main
 192                  BX      R0
 193                  ENDP
 194
 195 ; Dummy Exception Handlers (infinite loops which can be modified)
 196
 197 NMI_Handler     PROC
 198                 EXPORT  NMI_Handler                [WEAK]
 199                 B       .
 200                 ENDP
 201 HardFault_Handler\
 202                 PROC
 203                 EXPORT  HardFault_Handler          [WEAK]
 204                 B       .
 205                 ENDP
 206 MemManage_Handler\
 207                 PROC
 208                 EXPORT  MemManage_Handler          [WEAK]
 209                 B       .
 210                 ENDP
 211 BusFault_Handler\
 212                 PROC
 213                 EXPORT  BusFault_Handler           [WEAK]
 214                 B       .
 215                 ENDP
 216 UsageFault_Handler\
 217                 PROC
 218                 EXPORT  UsageFault_Handler         [WEAK]
 219                 B       .
 220                 ENDP
 221 SVC_Handler     PROC
 222                 EXPORT  SVC_Handler                [WEAK]
 223                 B       .
 224                 ENDP
 225 DebugMon_Handler\
 226                 PROC
 227                 EXPORT  DebugMon_Handler           [WEAK]
 228                 B       .
 229                 ENDP
 230 PendSV_Handler  PROC
 231                 EXPORT  PendSV_Handler             [WEAK]
 232                 B       .
 233                 ENDP
 234 SysTick_Handler PROC
 235                 EXPORT  SysTick_Handler            [WEAK]
 236                 B       .
 237                 ENDP
 238
 239 Default_Handler PROC
 240
 241                 EXPORT  WWDG_IRQHandler                   [WEAK]
 242                 EXPORT  PVD_IRQHandler                    [WEAK]
 243                 EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
 244                 EXPORT  RTC_WKUP_IRQHandler               [WEAK]
 245                 EXPORT  FLASH_IRQHandler                  [WEAK]
 246                 EXPORT  RCC_IRQHandler                    [WEAK]
 247                 EXPORT  EXTI0_IRQHandler                  [WEAK]
 248                 EXPORT  EXTI1_IRQHandler                  [WEAK]
 249                 EXPORT  EXTI2_IRQHandler                  [WEAK]
 250                 EXPORT  EXTI3_IRQHandler                  [WEAK]
 251                 EXPORT  EXTI4_IRQHandler                  [WEAK]
 252                 EXPORT  DMA1_Stream0_IRQHandler           [WEAK]
 253                 EXPORT  DMA1_Stream1_IRQHandler           [WEAK]
 254                 EXPORT  DMA1_Stream2_IRQHandler           [WEAK]
 255                 EXPORT  DMA1_Stream3_IRQHandler           [WEAK]
 256                 EXPORT  DMA1_Stream4_IRQHandler           [WEAK]
 257                 EXPORT  DMA1_Stream5_IRQHandler           [WEAK]
 258                 EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
 259                 EXPORT  ADC_IRQHandler                    [WEAK]
 260                 EXPORT  EXTI9_5_IRQHandler                [WEAK]
 261                 EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]
 262                 EXPORT  TIM1_UP_IRQHandler                [WEAK]
 263                 EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK]
 264                 EXPORT  TIM1_CC_IRQHandler                [WEAK]
 265                 EXPORT  I2C1_EV_IRQHandler                [WEAK]
 266                 EXPORT  I2C1_ER_IRQHandler                [WEAK]
 267                 EXPORT  I2C2_EV_IRQHandler                [WEAK]
 268                 EXPORT  I2C2_ER_IRQHandler                [WEAK]
 269                 EXPORT  SPI1_IRQHandler                   [WEAK]
 270                 EXPORT  SPI2_IRQHandler                   [WEAK]
 271                 EXPORT  USART1_IRQHandler                 [WEAK]
 272                 EXPORT  USART2_IRQHandler                 [WEAK]
 273                 EXPORT  EXTI15_10_IRQHandler              [WEAK]
 274                 EXPORT  RTC_Alarm_IRQHandler              [WEAK]
 275                 EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
 276                 EXPORT  TIM5_IRQHandler                   [WEAK]
 277                 EXPORT  TIM6_DAC_IRQHandler               [WEAK]
 278                 EXPORT  DMA2_Stream0_IRQHandler           [WEAK]
 279                 EXPORT  DMA2_Stream1_IRQHandler           [WEAK]
 280                 EXPORT  DMA2_Stream2_IRQHandler           [WEAK]
 281                 EXPORT  DMA2_Stream3_IRQHandler           [WEAK]
 282                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 283                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 284                 EXPORT  DMA2_Stream5_IRQHandler           [WEAK]
 285                 EXPORT  DMA2_Stream6_IRQHandler           [WEAK]
 286                 EXPORT  DMA2_Stream7_IRQHandler           [WEAK]
 287                 EXPORT  USART6_IRQHandler                 [WEAK]
 288                 EXPORT  RNG_IRQHandler                    [WEAK]
 289                 EXPORT  FPU_IRQHandler                    [WEAK]
 290                 EXPORT  SPI5_IRQHandler                   [WEAK]
 291                 EXPORT  FMPI2C1_EV_IRQHandler             [WEAK]
 292                 EXPORT  FMPI2C1_ER_IRQHandler             [WEAK]
 293                 EXPORT  LPTIM1_IRQHandler                 [WEAK]
 294
 295 WWDG_IRQHandler
 296 PVD_IRQHandler
 297 TAMP_STAMP_IRQHandler
 298 RTC_WKUP_IRQHandler
 299 FLASH_IRQHandler
 300 RCC_IRQHandler
 301 EXTI0_IRQHandler
 302 EXTI1_IRQHandler
 303 EXTI2_IRQHandler
 304 EXTI3_IRQHandler
 305 EXTI4_IRQHandler
 306 DMA1_Stream0_IRQHandler
 307 DMA1_Stream1_IRQHandler
 308 DMA1_Stream2_IRQHandler
 309 DMA1_Stream3_IRQHandler
 310 DMA1_Stream4_IRQHandler
 311 DMA1_Stream5_IRQHandler
 312 DMA1_Stream6_IRQHandler
 313 ADC_IRQHandler
 314 EXTI9_5_IRQHandler
 315 TIM1_BRK_TIM9_IRQHandler
 316 TIM1_UP_IRQHandler
 317 TIM1_TRG_COM_TIM11_IRQHandler
 318 TIM1_CC_IRQHandler
 319 I2C1_EV_IRQHandler
 320 I2C1_ER_IRQHandler
 321 I2C2_EV_IRQHandler
 322 I2C2_ER_IRQHandler
 323 SPI1_IRQHandler
 324 SPI2_IRQHandler
 325 USART1_IRQHandler
 326 USART2_IRQHandler
 327 EXTI15_10_IRQHandler
 328 RTC_Alarm_IRQHandler
 329 DMA1_Stream7_IRQHandler
 330 TIM5_IRQHandler
 331 TIM6_DAC_IRQHandler
 332 DMA2_Stream0_IRQHandler
 333 DMA2_Stream1_IRQHandler
 334 DMA2_Stream2_IRQHandler
 335 DMA2_Stream3_IRQHandler
 336 DMA2_Stream4_IRQHandler
 337 DMA2_Stream5_IRQHandler
 338 DMA2_Stream6_IRQHandler
 339 DMA2_Stream7_IRQHandler
 340 USART6_IRQHandler
 341 RNG_IRQHandler
 342 FPU_IRQHandler
 343 SPI5_IRQHandler
 344 FMPI2C1_EV_IRQHandler
 345 FMPI2C1_ER_IRQHandler
 346 LPTIM1_IRQHandler
 347
 348                 B       .
 349
 350                 ENDP
 351
 352                 ALIGN
 353
 354 ;*******************************************************************************
 355 ; User Stack and Heap initialization
 356 ;*******************************************************************************
 357                  IF      :DEF:__MICROLIB
 358
 359                  EXPORT  __initial_sp
 360                  EXPORT  __heap_base
 361                  EXPORT  __heap_limit
 362
 363                  ELSE
 364
 365                  IMPORT  __use_two_region_memory
 366                  EXPORT  __user_initial_stackheap
 367
 368 __user_initial_stackheap
 369
 370                  LDR     R0, =  Heap_Mem
 371                  LDR     R1, =(Stack_Mem + Stack_Size)
 372                  LDR     R2, = (Heap_Mem +  Heap_Size)
 373                  LDR     R3, = Stack_Mem
 374                  BX      LR
 375
 376                  ALIGN
 377
 378                  ENDIF
 379
 380                  END