2 ******************************************************************************
3 * @file startup_stm32f439xx.s
4 * @author MCD Application Team
5 * @brief STM32F439xx Devices vector table for GCC based toolchains.
6 * This module performs:
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address
10 * - Branches to main in the C library (which eventually
12 * After Reset the Cortex-M4 processor is in Thread mode,
13 * priority is Privileged, and the Stack is set to Main.
14 ******************************************************************************
17 * Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
24 ******************************************************************************
33 .global Default_Handler
35 /* start address for the initialization values of the .data section.
36 defined in linker script */
38 /* start address for the .data section. defined in linker script */
40 /* end address for the .data section. defined in linker script */
42 /* start address for the .bss section. defined in linker script */
44 /* end address for the .bss section. defined in linker script */
46 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
49 * @brief This is the code that gets called when the processor first
50 * starts execution following a reset event. Only the absolutely
51 * necessary set is performed, after which the application
52 * supplied main() routine is called.
57 .section .text.Reset_Handler
59 .type Reset_Handler, %function
61 ldr sp, =_estack /* set stack pointer */
63 /* Call the clock system initialization function.*/
66 /* Copy the data segment initializers from flash to SRAM */
83 /* Zero fill the bss segment. */
97 /* Call static constructors */
99 /* Call the application's entry point.*/
102 .size Reset_Handler, .-Reset_Handler
105 * @brief This is the code that gets called when the processor receives an
106 * unexpected interrupt. This simply enters an infinite loop, preserving
107 * the system state for examination by a debugger.
111 .section .text.Default_Handler,"ax",%progbits
115 .size Default_Handler, .-Default_Handler
116 /******************************************************************************
118 * The minimal vector table for a Cortex M3. Note that the proper constructs
119 * must be placed on this to ensure that it ends up at physical address
122 *******************************************************************************/
123 .section .isr_vector,"a",%progbits
124 .type g_pfnVectors, %object
131 .word HardFault_Handler
132 .word MemManage_Handler
133 .word BusFault_Handler
134 .word UsageFault_Handler
140 .word DebugMon_Handler
143 .word SysTick_Handler
145 /* External Interrupts */
146 .word WWDG_IRQHandler /* Window WatchDog */
147 .word PVD_IRQHandler /* PVD through EXTI Line detection */
148 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
149 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
150 .word FLASH_IRQHandler /* FLASH */
151 .word RCC_IRQHandler /* RCC */
152 .word EXTI0_IRQHandler /* EXTI Line0 */
153 .word EXTI1_IRQHandler /* EXTI Line1 */
154 .word EXTI2_IRQHandler /* EXTI Line2 */
155 .word EXTI3_IRQHandler /* EXTI Line3 */
156 .word EXTI4_IRQHandler /* EXTI Line4 */
157 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
158 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
159 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
160 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
161 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
162 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
163 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
164 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
165 .word CAN1_TX_IRQHandler /* CAN1 TX */
166 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
167 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
168 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
169 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
170 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
171 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
172 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
173 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
174 .word TIM2_IRQHandler /* TIM2 */
175 .word TIM3_IRQHandler /* TIM3 */
176 .word TIM4_IRQHandler /* TIM4 */
177 .word I2C1_EV_IRQHandler /* I2C1 Event */
178 .word I2C1_ER_IRQHandler /* I2C1 Error */
179 .word I2C2_EV_IRQHandler /* I2C2 Event */
180 .word I2C2_ER_IRQHandler /* I2C2 Error */
181 .word SPI1_IRQHandler /* SPI1 */
182 .word SPI2_IRQHandler /* SPI2 */
183 .word USART1_IRQHandler /* USART1 */
184 .word USART2_IRQHandler /* USART2 */
185 .word USART3_IRQHandler /* USART3 */
186 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
187 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
188 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
189 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
190 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
191 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
192 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
193 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
194 .word FMC_IRQHandler /* FMC */
195 .word SDIO_IRQHandler /* SDIO */
196 .word TIM5_IRQHandler /* TIM5 */
197 .word SPI3_IRQHandler /* SPI3 */
198 .word UART4_IRQHandler /* UART4 */
199 .word UART5_IRQHandler /* UART5 */
200 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
201 .word TIM7_IRQHandler /* TIM7 */
202 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
203 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
204 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
205 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
206 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
207 .word ETH_IRQHandler /* Ethernet */
208 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
209 .word CAN2_TX_IRQHandler /* CAN2 TX */
210 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
211 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
212 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
213 .word OTG_FS_IRQHandler /* USB OTG FS */
214 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
215 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
216 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
217 .word USART6_IRQHandler /* USART6 */
218 .word I2C3_EV_IRQHandler /* I2C3 event */
219 .word I2C3_ER_IRQHandler /* I2C3 error */
220 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
221 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
222 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
223 .word OTG_HS_IRQHandler /* USB OTG HS */
224 .word DCMI_IRQHandler /* DCMI */
225 .word CRYP_IRQHandler /* CRYP crypto */
226 .word HASH_RNG_IRQHandler /* Hash and Rng */
227 .word FPU_IRQHandler /* FPU */
228 .word UART7_IRQHandler /* UART7 */
229 .word UART8_IRQHandler /* UART8 */
230 .word SPI4_IRQHandler /* SPI4 */
231 .word SPI5_IRQHandler /* SPI5 */
232 .word SPI6_IRQHandler /* SPI6 */
233 .word SAI1_IRQHandler /* SAI1 */
234 .word LTDC_IRQHandler /* LTDC */
235 .word LTDC_ER_IRQHandler /* LTDC error */
236 .word DMA2D_IRQHandler /* DMA2D */
241 .size g_pfnVectors, .-g_pfnVectors
243 /*******************************************************************************
245 * Provide weak aliases for each Exception handler to the Default_Handler.
246 * As they are weak aliases, any function with the same name will override
249 *******************************************************************************/
251 .thumb_set NMI_Handler,Default_Handler
253 .weak HardFault_Handler
254 .thumb_set HardFault_Handler,Default_Handler
256 .weak MemManage_Handler
257 .thumb_set MemManage_Handler,Default_Handler
259 .weak BusFault_Handler
260 .thumb_set BusFault_Handler,Default_Handler
262 .weak UsageFault_Handler
263 .thumb_set UsageFault_Handler,Default_Handler
266 .thumb_set SVC_Handler,Default_Handler
268 .weak DebugMon_Handler
269 .thumb_set DebugMon_Handler,Default_Handler
272 .thumb_set PendSV_Handler,Default_Handler
274 .weak SysTick_Handler
275 .thumb_set SysTick_Handler,Default_Handler
277 .weak WWDG_IRQHandler
278 .thumb_set WWDG_IRQHandler,Default_Handler
281 .thumb_set PVD_IRQHandler,Default_Handler
283 .weak TAMP_STAMP_IRQHandler
284 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
286 .weak RTC_WKUP_IRQHandler
287 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
289 .weak FLASH_IRQHandler
290 .thumb_set FLASH_IRQHandler,Default_Handler
293 .thumb_set RCC_IRQHandler,Default_Handler
295 .weak EXTI0_IRQHandler
296 .thumb_set EXTI0_IRQHandler,Default_Handler
298 .weak EXTI1_IRQHandler
299 .thumb_set EXTI1_IRQHandler,Default_Handler
301 .weak EXTI2_IRQHandler
302 .thumb_set EXTI2_IRQHandler,Default_Handler
304 .weak EXTI3_IRQHandler
305 .thumb_set EXTI3_IRQHandler,Default_Handler
307 .weak EXTI4_IRQHandler
308 .thumb_set EXTI4_IRQHandler,Default_Handler
310 .weak DMA1_Stream0_IRQHandler
311 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
313 .weak DMA1_Stream1_IRQHandler
314 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
316 .weak DMA1_Stream2_IRQHandler
317 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
319 .weak DMA1_Stream3_IRQHandler
320 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
322 .weak DMA1_Stream4_IRQHandler
323 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
325 .weak DMA1_Stream5_IRQHandler
326 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
328 .weak DMA1_Stream6_IRQHandler
329 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
332 .thumb_set ADC_IRQHandler,Default_Handler
334 .weak CAN1_TX_IRQHandler
335 .thumb_set CAN1_TX_IRQHandler,Default_Handler
337 .weak CAN1_RX0_IRQHandler
338 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
340 .weak CAN1_RX1_IRQHandler
341 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
343 .weak CAN1_SCE_IRQHandler
344 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
346 .weak EXTI9_5_IRQHandler
347 .thumb_set EXTI9_5_IRQHandler,Default_Handler
349 .weak TIM1_BRK_TIM9_IRQHandler
350 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
352 .weak TIM1_UP_TIM10_IRQHandler
353 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
355 .weak TIM1_TRG_COM_TIM11_IRQHandler
356 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
358 .weak TIM1_CC_IRQHandler
359 .thumb_set TIM1_CC_IRQHandler,Default_Handler
361 .weak TIM2_IRQHandler
362 .thumb_set TIM2_IRQHandler,Default_Handler
364 .weak TIM3_IRQHandler
365 .thumb_set TIM3_IRQHandler,Default_Handler
367 .weak TIM4_IRQHandler
368 .thumb_set TIM4_IRQHandler,Default_Handler
370 .weak I2C1_EV_IRQHandler
371 .thumb_set I2C1_EV_IRQHandler,Default_Handler
373 .weak I2C1_ER_IRQHandler
374 .thumb_set I2C1_ER_IRQHandler,Default_Handler
376 .weak I2C2_EV_IRQHandler
377 .thumb_set I2C2_EV_IRQHandler,Default_Handler
379 .weak I2C2_ER_IRQHandler
380 .thumb_set I2C2_ER_IRQHandler,Default_Handler
382 .weak SPI1_IRQHandler
383 .thumb_set SPI1_IRQHandler,Default_Handler
385 .weak SPI2_IRQHandler
386 .thumb_set SPI2_IRQHandler,Default_Handler
388 .weak USART1_IRQHandler
389 .thumb_set USART1_IRQHandler,Default_Handler
391 .weak USART2_IRQHandler
392 .thumb_set USART2_IRQHandler,Default_Handler
394 .weak USART3_IRQHandler
395 .thumb_set USART3_IRQHandler,Default_Handler
397 .weak EXTI15_10_IRQHandler
398 .thumb_set EXTI15_10_IRQHandler,Default_Handler
400 .weak RTC_Alarm_IRQHandler
401 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
403 .weak OTG_FS_WKUP_IRQHandler
404 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
406 .weak TIM8_BRK_TIM12_IRQHandler
407 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
409 .weak TIM8_UP_TIM13_IRQHandler
410 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
412 .weak TIM8_TRG_COM_TIM14_IRQHandler
413 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
415 .weak TIM8_CC_IRQHandler
416 .thumb_set TIM8_CC_IRQHandler,Default_Handler
418 .weak DMA1_Stream7_IRQHandler
419 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
422 .thumb_set FMC_IRQHandler,Default_Handler
424 .weak SDIO_IRQHandler
425 .thumb_set SDIO_IRQHandler,Default_Handler
427 .weak TIM5_IRQHandler
428 .thumb_set TIM5_IRQHandler,Default_Handler
430 .weak SPI3_IRQHandler
431 .thumb_set SPI3_IRQHandler,Default_Handler
433 .weak UART4_IRQHandler
434 .thumb_set UART4_IRQHandler,Default_Handler
436 .weak UART5_IRQHandler
437 .thumb_set UART5_IRQHandler,Default_Handler
439 .weak TIM6_DAC_IRQHandler
440 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
442 .weak TIM7_IRQHandler
443 .thumb_set TIM7_IRQHandler,Default_Handler
445 .weak DMA2_Stream0_IRQHandler
446 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
448 .weak DMA2_Stream1_IRQHandler
449 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
451 .weak DMA2_Stream2_IRQHandler
452 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
454 .weak DMA2_Stream3_IRQHandler
455 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
457 .weak DMA2_Stream4_IRQHandler
458 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
461 .thumb_set ETH_IRQHandler,Default_Handler
463 .weak ETH_WKUP_IRQHandler
464 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
466 .weak CAN2_TX_IRQHandler
467 .thumb_set CAN2_TX_IRQHandler,Default_Handler
469 .weak CAN2_RX0_IRQHandler
470 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
472 .weak CAN2_RX1_IRQHandler
473 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
475 .weak CAN2_SCE_IRQHandler
476 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
478 .weak OTG_FS_IRQHandler
479 .thumb_set OTG_FS_IRQHandler,Default_Handler
481 .weak DMA2_Stream5_IRQHandler
482 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
484 .weak DMA2_Stream6_IRQHandler
485 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
487 .weak DMA2_Stream7_IRQHandler
488 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
490 .weak USART6_IRQHandler
491 .thumb_set USART6_IRQHandler,Default_Handler
493 .weak I2C3_EV_IRQHandler
494 .thumb_set I2C3_EV_IRQHandler,Default_Handler
496 .weak I2C3_ER_IRQHandler
497 .thumb_set I2C3_ER_IRQHandler,Default_Handler
499 .weak OTG_HS_EP1_OUT_IRQHandler
500 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
502 .weak OTG_HS_EP1_IN_IRQHandler
503 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
505 .weak OTG_HS_WKUP_IRQHandler
506 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
508 .weak OTG_HS_IRQHandler
509 .thumb_set OTG_HS_IRQHandler,Default_Handler
511 .weak DCMI_IRQHandler
512 .thumb_set DCMI_IRQHandler,Default_Handler
514 .weak CRYP_IRQHandler
515 .thumb_set CRYP_IRQHandler,Default_Handler
517 .weak HASH_RNG_IRQHandler
518 .thumb_set HASH_RNG_IRQHandler,Default_Handler
521 .thumb_set FPU_IRQHandler,Default_Handler
523 .weak UART7_IRQHandler
524 .thumb_set UART7_IRQHandler,Default_Handler
526 .weak UART8_IRQHandler
527 .thumb_set UART8_IRQHandler,Default_Handler
529 .weak SPI4_IRQHandler
530 .thumb_set SPI4_IRQHandler,Default_Handler
532 .weak SPI5_IRQHandler
533 .thumb_set SPI5_IRQHandler,Default_Handler
535 .weak SPI6_IRQHandler
536 .thumb_set SPI6_IRQHandler,Default_Handler
538 .weak SAI1_IRQHandler
539 .thumb_set SAI1_IRQHandler,Default_Handler
541 .weak LTDC_IRQHandler
542 .thumb_set LTDC_IRQHandler,Default_Handler
544 .weak LTDC_ER_IRQHandler
545 .thumb_set LTDC_ER_IRQHandler,Default_Handler
547 .weak DMA2D_IRQHandler
548 .thumb_set DMA2D_IRQHandler,Default_Handler