begriffs open source - cmsis-dfp-stm32f4/blob - Source/Templates/arm/startup_stm32f401xc.s

   1 ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
   2 ;* File Name          : startup_stm32f401xc.s
   3 ;* Author             : MCD Application Team
   4 ;* Description        : STM32F401xc devices vector table for MDK-ARM toolchain.
   5 ;*                      This module performs:
   6 ;*                      - Set the initial SP
   7 ;*                      - Set the initial PC == Reset_Handler
   8 ;*                      - Set the vector table entries with the exceptions ISR address
   9 ;*                      - Branches to __main in the C library (which eventually
  10 ;*                        calls main()).
  11 ;*                      After Reset the CortexM4 processor is in Thread mode,
  12 ;*                      priority is Privileged, and the Stack is set to Main.
  13 ;* <<< Use Configuration Wizard in Context Menu >>>
  14 ;*******************************************************************************
  15 ;
  16 ;* Redistribution and use in source and binary forms, with or without modification,
  17 ;* are permitted provided that the following conditions are met:
  18 ;*   1. Redistributions of source code must retain the above copyright notice,
  19 ;*      this list of conditions and the following disclaimer.
  20 ;*   2. Redistributions in binary form must reproduce the above copyright notice,
  21 ;*      this list of conditions and the following disclaimer in the documentation
  22 ;*      and/or other materials provided with the distribution.
  23 ;*   3. Neither the name of STMicroelectronics nor the names of its contributors
  24 ;*      may be used to endorse or promote products derived from this software
  25 ;*      without specific prior written permission.
  26 ;*
  27 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  28 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  29 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  30 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  31 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  33 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  34 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  35 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  36 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  37 ;
  38 ;*******************************************************************************
  39
  40 ; Amount of memory (in bytes) allocated for Stack
  41 ; Tailor this value to your application needs
  42 ; <h> Stack Configuration
  43 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  44 ; </h>
  45
  46 Stack_Size      EQU     0x00000400
  47
  48                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  49 Stack_Mem       SPACE   Stack_Size
  50 __initial_sp
  51
  52
  53 ; <h> Heap Configuration
  54 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  55 ; </h>
  56
  57 Heap_Size       EQU     0x00000200
  58
  59                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  60 __heap_base
  61 Heap_Mem        SPACE   Heap_Size
  62 __heap_limit
  63
  64                 PRESERVE8
  65                 THUMB
  66
  67
  68 ; Vector Table Mapped to Address 0 at Reset
  69                 AREA    RESET, DATA, READONLY
  70                 EXPORT  __Vectors
  71                 EXPORT  __Vectors_End
  72                 EXPORT  __Vectors_Size
  73
  74 __Vectors       DCD     __initial_sp               ; Top of Stack
  75                 DCD     Reset_Handler              ; Reset Handler
  76                 DCD     NMI_Handler                ; NMI Handler
  77                 DCD     HardFault_Handler          ; Hard Fault Handler
  78                 DCD     MemManage_Handler          ; MPU Fault Handler
  79                 DCD     BusFault_Handler           ; Bus Fault Handler
  80                 DCD     UsageFault_Handler         ; Usage Fault Handler
  81                 DCD     0                          ; Reserved
  82                 DCD     0                          ; Reserved
  83                 DCD     0                          ; Reserved
  84                 DCD     0                          ; Reserved
  85                 DCD     SVC_Handler                ; SVCall Handler
  86                 DCD     DebugMon_Handler           ; Debug Monitor Handler
  87                 DCD     0                          ; Reserved
  88                 DCD     PendSV_Handler             ; PendSV Handler
  89                 DCD     SysTick_Handler            ; SysTick Handler
  90
  91                 ; External Interrupts
  92                 DCD     WWDG_IRQHandler                   ; Window WatchDog
  93                 DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
  94                 DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
  95                 DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
  96                 DCD     FLASH_IRQHandler                  ; FLASH
  97                 DCD     RCC_IRQHandler                    ; RCC
  98                 DCD     EXTI0_IRQHandler                  ; EXTI Line0
  99                 DCD     EXTI1_IRQHandler                  ; EXTI Line1
 100                 DCD     EXTI2_IRQHandler                  ; EXTI Line2
 101                 DCD     EXTI3_IRQHandler                  ; EXTI Line3
 102                 DCD     EXTI4_IRQHandler                  ; EXTI Line4
 103                 DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
 104                 DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1
 105                 DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2
 106                 DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3
 107                 DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4
 108                 DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5
 109                 DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6
 110                 DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s
 111                 DCD     0                                 ; Reserved
 112                 DCD     0                                 ; Reserved
 113                 DCD     0                                 ; Reserved
 114                 DCD     0                                 ; Reserved
 115                 DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
 116                 DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9
 117                 DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10
 118                 DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
 119                 DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
 120                 DCD     TIM2_IRQHandler                   ; TIM2
 121                 DCD     TIM3_IRQHandler                   ; TIM3
 122                 DCD     TIM4_IRQHandler                   ; TIM4
 123                 DCD     I2C1_EV_IRQHandler                ; I2C1 Event
 124                 DCD     I2C1_ER_IRQHandler                ; I2C1 Error
 125                 DCD     I2C2_EV_IRQHandler                ; I2C2 Event
 126                 DCD     I2C2_ER_IRQHandler                ; I2C2 Error
 127                 DCD     SPI1_IRQHandler                   ; SPI1
 128                 DCD     SPI2_IRQHandler                   ; SPI2
 129                 DCD     USART1_IRQHandler                 ; USART1
 130                 DCD     USART2_IRQHandler                 ; USART2
 131                 DCD     0                                 ; Reserved
 132                 DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
 133                 DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
 134                 DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line
 135                 DCD     0                                 ; Reserved
 136                 DCD     0                                 ; Reserved
 137                 DCD     0                                 ; Reserved
 138                 DCD     0                                 ; Reserved
 139                 DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7
 140                 DCD     0                                 ; Reserved
 141                 DCD     SDIO_IRQHandler                   ; SDIO
 142                 DCD     TIM5_IRQHandler                   ; TIM5
 143                 DCD     SPI3_IRQHandler                   ; SPI3
 144                 DCD     0                                 ; Reserved
 145                 DCD     0                                 ; Reserved
 146                 DCD     0                                 ; Reserved
 147                 DCD     0                                 ; Reserved
 148                 DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0
 149                 DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1
 150                 DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2
 151                 DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3
 152                 DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4
 153                 DCD     0                                 ; Reserved
 154                 DCD     0                                 ; Reserved
 155                 DCD     0                                 ; Reserved
 156                 DCD     0                                 ; Reserved
 157                 DCD     0                                 ; Reserved
 158                 DCD     0                                 ; Reserved
 159                 DCD     OTG_FS_IRQHandler                 ; USB OTG FS
 160                 DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5
 161                 DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6
 162                 DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7
 163                 DCD     USART6_IRQHandler                 ; USART6
 164                 DCD     I2C3_EV_IRQHandler                ; I2C3 event
 165                 DCD     I2C3_ER_IRQHandler                ; I2C3 error
 166                 DCD     0                                 ; Reserved
 167                 DCD     0                                 ; Reserved
 168                 DCD     0                                 ; Reserved
 169                 DCD     0                                 ; Reserved
 170                 DCD     0                                 ; Reserved
 171                 DCD     0                                 ; Reserved
 172                 DCD     0                                 ; Reserved
 173                 DCD     FPU_IRQHandler                    ; FPU
 174                 DCD     0                                 ; Reserved
 175                                 DCD     0                                 ; Reserved
 176                                 DCD     SPI4_IRQHandler                   ; SPI4
 177
 178 __Vectors_End
 179
 180 __Vectors_Size  EQU  __Vectors_End - __Vectors
 181
 182                 AREA    |.text|, CODE, READONLY
 183
 184 ; Reset handler
 185 Reset_Handler    PROC
 186                  EXPORT  Reset_Handler             [WEAK]
 187         IMPORT  SystemInit
 188         IMPORT  __main
 189
 190                  LDR     R0, =SystemInit
 191                  BLX     R0
 192                  LDR     R0, =__main
 193                  BX      R0
 194                  ENDP
 195
 196 ; Dummy Exception Handlers (infinite loops which can be modified)
 197
 198 NMI_Handler     PROC
 199                 EXPORT  NMI_Handler                [WEAK]
 200                 B       .
 201                 ENDP
 202 HardFault_Handler\
 203                 PROC
 204                 EXPORT  HardFault_Handler          [WEAK]
 205                 B       .
 206                 ENDP
 207 MemManage_Handler\
 208                 PROC
 209                 EXPORT  MemManage_Handler          [WEAK]
 210                 B       .
 211                 ENDP
 212 BusFault_Handler\
 213                 PROC
 214                 EXPORT  BusFault_Handler           [WEAK]
 215                 B       .
 216                 ENDP
 217 UsageFault_Handler\
 218                 PROC
 219                 EXPORT  UsageFault_Handler         [WEAK]
 220                 B       .
 221                 ENDP
 222 SVC_Handler     PROC
 223                 EXPORT  SVC_Handler                [WEAK]
 224                 B       .
 225                 ENDP
 226 DebugMon_Handler\
 227                 PROC
 228                 EXPORT  DebugMon_Handler           [WEAK]
 229                 B       .
 230                 ENDP
 231 PendSV_Handler  PROC
 232                 EXPORT  PendSV_Handler             [WEAK]
 233                 B       .
 234                 ENDP
 235 SysTick_Handler PROC
 236                 EXPORT  SysTick_Handler            [WEAK]
 237                 B       .
 238                 ENDP
 239
 240 Default_Handler PROC
 241
 242                 EXPORT  WWDG_IRQHandler                   [WEAK]
 243                 EXPORT  PVD_IRQHandler                    [WEAK]
 244                 EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
 245                 EXPORT  RTC_WKUP_IRQHandler               [WEAK]
 246                 EXPORT  FLASH_IRQHandler                  [WEAK]
 247                 EXPORT  RCC_IRQHandler                    [WEAK]
 248                 EXPORT  EXTI0_IRQHandler                  [WEAK]
 249                 EXPORT  EXTI1_IRQHandler                  [WEAK]
 250                 EXPORT  EXTI2_IRQHandler                  [WEAK]
 251                 EXPORT  EXTI3_IRQHandler                  [WEAK]
 252                 EXPORT  EXTI4_IRQHandler                  [WEAK]
 253                 EXPORT  DMA1_Stream0_IRQHandler           [WEAK]
 254                 EXPORT  DMA1_Stream1_IRQHandler           [WEAK]
 255                 EXPORT  DMA1_Stream2_IRQHandler           [WEAK]
 256                 EXPORT  DMA1_Stream3_IRQHandler           [WEAK]
 257                 EXPORT  DMA1_Stream4_IRQHandler           [WEAK]
 258                 EXPORT  DMA1_Stream5_IRQHandler           [WEAK]
 259                 EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
 260                 EXPORT  ADC_IRQHandler                    [WEAK]
 261                 EXPORT  EXTI9_5_IRQHandler                [WEAK]
 262                 EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]
 263                 EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]
 264                 EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK]
 265                 EXPORT  TIM1_CC_IRQHandler                [WEAK]
 266                 EXPORT  TIM2_IRQHandler                   [WEAK]
 267                 EXPORT  TIM3_IRQHandler                   [WEAK]
 268                 EXPORT  TIM4_IRQHandler                   [WEAK]
 269                 EXPORT  I2C1_EV_IRQHandler                [WEAK]
 270                 EXPORT  I2C1_ER_IRQHandler                [WEAK]
 271                 EXPORT  I2C2_EV_IRQHandler                [WEAK]
 272                 EXPORT  I2C2_ER_IRQHandler                [WEAK]
 273                 EXPORT  SPI1_IRQHandler                   [WEAK]
 274                 EXPORT  SPI2_IRQHandler                   [WEAK]
 275                 EXPORT  USART1_IRQHandler                 [WEAK]
 276                 EXPORT  USART2_IRQHandler                 [WEAK]
 277                 EXPORT  EXTI15_10_IRQHandler              [WEAK]
 278                 EXPORT  RTC_Alarm_IRQHandler              [WEAK]
 279                 EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]
 280                 EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
 281                 EXPORT  SDIO_IRQHandler                   [WEAK]
 282                 EXPORT  TIM5_IRQHandler                   [WEAK]
 283                 EXPORT  SPI3_IRQHandler                   [WEAK]
 284                 EXPORT  DMA2_Stream0_IRQHandler           [WEAK]
 285                 EXPORT  DMA2_Stream1_IRQHandler           [WEAK]
 286                 EXPORT  DMA2_Stream2_IRQHandler           [WEAK]
 287                 EXPORT  DMA2_Stream3_IRQHandler           [WEAK]
 288                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 289                 EXPORT  OTG_FS_IRQHandler                 [WEAK]
 290                 EXPORT  DMA2_Stream5_IRQHandler           [WEAK]
 291                 EXPORT  DMA2_Stream6_IRQHandler           [WEAK]
 292                 EXPORT  DMA2_Stream7_IRQHandler           [WEAK]
 293                 EXPORT  USART6_IRQHandler                 [WEAK]
 294                 EXPORT  I2C3_EV_IRQHandler                [WEAK]
 295                 EXPORT  I2C3_ER_IRQHandler                [WEAK]
 296                 EXPORT  FPU_IRQHandler                    [WEAK]
 297                                 EXPORT  SPI4_IRQHandler                   [WEAK]
 298
 299 WWDG_IRQHandler
 300 PVD_IRQHandler
 301 TAMP_STAMP_IRQHandler
 302 RTC_WKUP_IRQHandler
 303 FLASH_IRQHandler
 304 RCC_IRQHandler
 305 EXTI0_IRQHandler
 306 EXTI1_IRQHandler
 307 EXTI2_IRQHandler
 308 EXTI3_IRQHandler
 309 EXTI4_IRQHandler
 310 DMA1_Stream0_IRQHandler
 311 DMA1_Stream1_IRQHandler
 312 DMA1_Stream2_IRQHandler
 313 DMA1_Stream3_IRQHandler
 314 DMA1_Stream4_IRQHandler
 315 DMA1_Stream5_IRQHandler
 316 DMA1_Stream6_IRQHandler
 317 ADC_IRQHandler
 318 EXTI9_5_IRQHandler
 319 TIM1_BRK_TIM9_IRQHandler
 320 TIM1_UP_TIM10_IRQHandler
 321 TIM1_TRG_COM_TIM11_IRQHandler
 322 TIM1_CC_IRQHandler
 323 TIM2_IRQHandler
 324 TIM3_IRQHandler
 325 TIM4_IRQHandler
 326 I2C1_EV_IRQHandler
 327 I2C1_ER_IRQHandler
 328 I2C2_EV_IRQHandler
 329 I2C2_ER_IRQHandler
 330 SPI1_IRQHandler
 331 SPI2_IRQHandler
 332 USART1_IRQHandler
 333 USART2_IRQHandler
 334 EXTI15_10_IRQHandler
 335 RTC_Alarm_IRQHandler
 336 OTG_FS_WKUP_IRQHandler
 337 DMA1_Stream7_IRQHandler
 338 SDIO_IRQHandler
 339 TIM5_IRQHandler
 340 SPI3_IRQHandler
 341 DMA2_Stream0_IRQHandler
 342 DMA2_Stream1_IRQHandler
 343 DMA2_Stream2_IRQHandler
 344 DMA2_Stream3_IRQHandler
 345 DMA2_Stream4_IRQHandler
 346 OTG_FS_IRQHandler
 347 DMA2_Stream5_IRQHandler
 348 DMA2_Stream6_IRQHandler
 349 DMA2_Stream7_IRQHandler
 350 USART6_IRQHandler
 351 I2C3_EV_IRQHandler
 352 I2C3_ER_IRQHandler
 353 FPU_IRQHandler
 354 SPI4_IRQHandler
 355
 356                 B       .
 357
 358                 ENDP
 359
 360                 ALIGN
 361
 362 ;*******************************************************************************
 363 ; User Stack and Heap initialization
 364 ;*******************************************************************************
 365                  IF      :DEF:__MICROLIB
 366
 367                  EXPORT  __initial_sp
 368                  EXPORT  __heap_base
 369                  EXPORT  __heap_limit
 370
 371                  ELSE
 372
 373                  IMPORT  __use_two_region_memory
 374                  EXPORT  __user_initial_stackheap
 375
 376 __user_initial_stackheap
 377
 378                  LDR     R0, =  Heap_Mem
 379                  LDR     R1, =(Stack_Mem + Stack_Size)
 380                  LDR     R2, = (Heap_Mem +  Heap_Size)
 381                  LDR     R3, = Stack_Mem
 382                  BX      LR
 383
 384                  ALIGN
 385
 386                  ENDIF
 387
 388                  END
 389
 390 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****