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[cmsis-dfp-stm32f4] / Source / Templates / gcc / startup_stm32f401xe.s
1 /**
2   ******************************************************************************
3   * @file      startup_stm32f401xe.s
4   * @author    MCD Application Team
5   * @brief     STM32F401xExx Devices vector table for GCC based toolchains. 
6   *            This module performs:
7   *                - Set the initial SP
8   *                - Set the initial PC == Reset_Handler,
9   *                - Set the vector table entries with the exceptions ISR address
10   *                - Branches to main in the C library (which eventually
11   *                  calls main()).
12   *            After Reset the Cortex-M4 processor is in Thread mode,
13   *            priority is Privileged, and the Stack is set to Main.
14   ******************************************************************************
15   * @attention
16   *
17   * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>
18   *
19   * Redistribution and use in source and binary forms, with or without modification,
20   * are permitted provided that the following conditions are met:
21   *   1. Redistributions of source code must retain the above copyright notice,
22   *      this list of conditions and the following disclaimer.
23   *   2. Redistributions in binary form must reproduce the above copyright notice,
24   *      this list of conditions and the following disclaimer in the documentation
25   *      and/or other materials provided with the distribution.
26   *   3. Neither the name of STMicroelectronics nor the names of its contributors
27   *      may be used to endorse or promote products derived from this software
28   *      without specific prior written permission.
29   *
30   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
34   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
36   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
38   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40   *
41   ******************************************************************************
42   */
43     
44   .syntax unified
45   .cpu cortex-m4
46   .fpu softvfp
47   .thumb
48
49 .global  g_pfnVectors
50 .global  Default_Handler
51
52 /* start address for the initialization values of the .data section. 
53 defined in linker script */
54 .word  _sidata
55 /* start address for the .data section. defined in linker script */  
56 .word  _sdata
57 /* end address for the .data section. defined in linker script */
58 .word  _edata
59 /* start address for the .bss section. defined in linker script */
60 .word  _sbss
61 /* end address for the .bss section. defined in linker script */
62 .word  _ebss
63 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
64
65 /**
66  * @brief  This is the code that gets called when the processor first
67  *          starts execution following a reset event. Only the absolutely
68  *          necessary set is performed, after which the application
69  *          supplied main() routine is called. 
70  * @param  None
71  * @retval : None
72 */
73
74     .section  .text.Reset_Handler
75   .weak  Reset_Handler
76   .type  Reset_Handler, %function
77 Reset_Handler:  
78   ldr   sp, =_estack                     /* set stack pointer */
79
80 /* Copy the data segment initializers from flash to SRAM */  
81   movs  r1, #0
82   b  LoopCopyDataInit
83
84 CopyDataInit:
85   ldr  r3, =_sidata
86   ldr  r3, [r3, r1]
87   str  r3, [r0, r1]
88   adds  r1, r1, #4
89     
90 LoopCopyDataInit:
91   ldr  r0, =_sdata
92   ldr  r3, =_edata
93   adds  r2, r0, r1
94   cmp  r2, r3
95   bcc  CopyDataInit
96   ldr  r2, =_sbss
97   b  LoopFillZerobss
98 /* Zero fill the bss segment. */  
99 FillZerobss:
100   movs  r3, #0
101   str  r3, [r2], #4
102     
103 LoopFillZerobss:
104   ldr  r3, = _ebss
105   cmp  r2, r3
106   bcc  FillZerobss
107
108 /* Call the clock system intitialization function.*/
109   bl  SystemInit   
110 /* Call static constructors */
111     bl __libc_init_array
112 /* Call the application's entry point.*/
113   bl  main
114   bx  lr    
115 .size  Reset_Handler, .-Reset_Handler
116
117 /**
118  * @brief  This is the code that gets called when the processor receives an 
119  *         unexpected interrupt.  This simply enters an infinite loop, preserving
120  *         the system state for examination by a debugger.
121  * @param  None     
122  * @retval None       
123 */
124     .section  .text.Default_Handler,"ax",%progbits
125 Default_Handler:
126 Infinite_Loop:
127   b  Infinite_Loop
128   .size  Default_Handler, .-Default_Handler
129 /******************************************************************************
130 *
131 * The minimal vector table for a Cortex M3. Note that the proper constructs
132 * must be placed on this to ensure that it ends up at physical address
133 * 0x0000.0000.
134
135 *******************************************************************************/
136    .section  .isr_vector,"a",%progbits
137   .type  g_pfnVectors, %object
138   .size  g_pfnVectors, .-g_pfnVectors
139     
140 g_pfnVectors:
141   .word  _estack
142   .word  Reset_Handler
143   .word  NMI_Handler
144   .word  HardFault_Handler
145   .word  MemManage_Handler
146   .word  BusFault_Handler
147   .word  UsageFault_Handler
148   .word  0
149   .word  0
150   .word  0
151   .word  0
152   .word  SVC_Handler
153   .word  DebugMon_Handler
154   .word  0
155   .word  PendSV_Handler
156   .word  SysTick_Handler
157   
158   /* External Interrupts */
159   .word     WWDG_IRQHandler                   /* Window WatchDog              */                                        
160   .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */                        
161   .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */            
162   .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */                      
163   .word     FLASH_IRQHandler                  /* FLASH                        */                                          
164   .word     RCC_IRQHandler                    /* RCC                          */                                            
165   .word     EXTI0_IRQHandler                  /* EXTI Line0                   */                        
166   .word     EXTI1_IRQHandler                  /* EXTI Line1                   */                          
167   .word     EXTI2_IRQHandler                  /* EXTI Line2                   */                          
168   .word     EXTI3_IRQHandler                  /* EXTI Line3                   */                          
169   .word     EXTI4_IRQHandler                  /* EXTI Line4                   */                          
170   .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */                  
171   .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */                   
172   .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */                   
173   .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */                   
174   .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */                   
175   .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */                   
176   .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */                   
177   .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s         */                   
178   .word     0                                             /* Reserved                      */                         
179   .word     0                                                     /* Reserved                     */                          
180   .word     0                                 /* Reserved                     */                          
181   .word     0                                 /* Reserved                     */                          
182   .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */                          
183   .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9          */         
184   .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10        */         
185   .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11 */
186   .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */                          
187   .word     TIM2_IRQHandler                   /* TIM2                         */                   
188   .word     TIM3_IRQHandler                   /* TIM3                         */                   
189   .word     TIM4_IRQHandler                   /* TIM4                         */                   
190   .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */                          
191   .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */                          
192   .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */                          
193   .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */                            
194   .word     SPI1_IRQHandler                   /* SPI1                         */                   
195   .word     SPI2_IRQHandler                   /* SPI2                         */                   
196   .word     USART1_IRQHandler                 /* USART1                       */                   
197   .word     USART2_IRQHandler                 /* USART2                       */                   
198   .word     0                                             /* Reserved                       */                   
199   .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */                          
200   .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */                 
201   .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line */                       
202   .word     0                                 /* Reserved                                 */         
203   .word     0                                 /* Reserved                                 */         
204   .word     0                                 /* Reserved                                         */
205   .word     0                                 /* Reserved                     */                          
206   .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */                          
207   .word     0                                 /* Reserved                     */                   
208   .word     SDIO_IRQHandler                   /* SDIO                         */                   
209   .word     TIM5_IRQHandler                   /* TIM5                         */                   
210   .word     SPI3_IRQHandler                   /* SPI3                         */                   
211   .word     0                                 /* Reserved                     */                   
212   .word     0                                 /* Reserved                     */                   
213   .word     0                                 /* Reserved                     */                   
214   .word     0                                 /* Reserved                     */
215   .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */                   
216   .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */                   
217   .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */                   
218   .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */                   
219   .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */                   
220   .word     0                                             /* Reserved                     */                   
221   .word     0                                                     /* Reserved                     */                     
222   .word     0                                                     /* Reserved                     */                          
223   .word     0                                                     /* Reserved                     */                          
224   .word     0                                                     /* Reserved                     */                          
225   .word     0                                                     /* Reserved                     */                          
226   .word     OTG_FS_IRQHandler                 /* USB OTG FS                   */                   
227   .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */                   
228   .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */                   
229   .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */                   
230   .word     USART6_IRQHandler                 /* USART6                       */                    
231   .word     I2C3_EV_IRQHandler                /* I2C3 event                   */                          
232   .word     I2C3_ER_IRQHandler                /* I2C3 error                   */                          
233   .word     0                                 /* Reserved                     */                   
234   .word     0                                 /* Reserved                     */                   
235   .word     0                                 /* Reserved                     */                         
236   .word     0                                 /* Reserved                     */                   
237   .word     0                                 /* Reserved                     */                   
238   .word     0                                 /* Reserved                     */                   
239   .word     0                                 /* Reserved                     */
240   .word     FPU_IRQHandler                    /* FPU                          */
241   .word     0                                 /* Reserved                     */                   
242   .word     0                                 /* Reserved                     */
243   .word     SPI4_IRQHandler                   /* SPI4                         */     
244                     
245 /*******************************************************************************
246 *
247 * Provide weak aliases for each Exception handler to the Default_Handler. 
248 * As they are weak aliases, any function with the same name will override 
249 * this definition.
250
251 *******************************************************************************/
252    .weak      NMI_Handler
253    .thumb_set NMI_Handler,Default_Handler
254   
255    .weak      HardFault_Handler
256    .thumb_set HardFault_Handler,Default_Handler
257   
258    .weak      MemManage_Handler
259    .thumb_set MemManage_Handler,Default_Handler
260   
261    .weak      BusFault_Handler
262    .thumb_set BusFault_Handler,Default_Handler
263
264    .weak      UsageFault_Handler
265    .thumb_set UsageFault_Handler,Default_Handler
266
267    .weak      SVC_Handler
268    .thumb_set SVC_Handler,Default_Handler
269
270    .weak      DebugMon_Handler
271    .thumb_set DebugMon_Handler,Default_Handler
272
273    .weak      PendSV_Handler
274    .thumb_set PendSV_Handler,Default_Handler
275
276    .weak      SysTick_Handler
277    .thumb_set SysTick_Handler,Default_Handler              
278   
279    .weak      WWDG_IRQHandler                   
280    .thumb_set WWDG_IRQHandler,Default_Handler      
281                   
282    .weak      PVD_IRQHandler      
283    .thumb_set PVD_IRQHandler,Default_Handler
284                
285    .weak      TAMP_STAMP_IRQHandler            
286    .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
287             
288    .weak      RTC_WKUP_IRQHandler                  
289    .thumb_set RTC_WKUP_IRQHandler,Default_Handler
290             
291    .weak      FLASH_IRQHandler         
292    .thumb_set FLASH_IRQHandler,Default_Handler
293                   
294    .weak      RCC_IRQHandler      
295    .thumb_set RCC_IRQHandler,Default_Handler
296                   
297    .weak      EXTI0_IRQHandler         
298    .thumb_set EXTI0_IRQHandler,Default_Handler
299                   
300    .weak      EXTI1_IRQHandler         
301    .thumb_set EXTI1_IRQHandler,Default_Handler
302                      
303    .weak      EXTI2_IRQHandler         
304    .thumb_set EXTI2_IRQHandler,Default_Handler 
305                  
306    .weak      EXTI3_IRQHandler         
307    .thumb_set EXTI3_IRQHandler,Default_Handler
308                         
309    .weak      EXTI4_IRQHandler         
310    .thumb_set EXTI4_IRQHandler,Default_Handler
311                   
312    .weak      DMA1_Stream0_IRQHandler               
313    .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
314          
315    .weak      DMA1_Stream1_IRQHandler               
316    .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
317                   
318    .weak      DMA1_Stream2_IRQHandler               
319    .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
320                   
321    .weak      DMA1_Stream3_IRQHandler               
322    .thumb_set DMA1_Stream3_IRQHandler,Default_Handler 
323                  
324    .weak      DMA1_Stream4_IRQHandler              
325    .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
326                   
327    .weak      DMA1_Stream5_IRQHandler               
328    .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
329                   
330    .weak      DMA1_Stream6_IRQHandler               
331    .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
332                   
333    .weak      ADC_IRQHandler      
334    .thumb_set ADC_IRQHandler,Default_Handler
335             
336    .weak      EXTI9_5_IRQHandler   
337    .thumb_set EXTI9_5_IRQHandler,Default_Handler
338             
339    .weak      TIM1_BRK_TIM9_IRQHandler            
340    .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
341             
342    .weak      TIM1_UP_TIM10_IRQHandler            
343    .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
344       
345    .weak      TIM1_TRG_COM_TIM11_IRQHandler      
346    .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
347       
348    .weak      TIM1_CC_IRQHandler   
349    .thumb_set TIM1_CC_IRQHandler,Default_Handler
350                   
351    .weak      TIM2_IRQHandler            
352    .thumb_set TIM2_IRQHandler,Default_Handler
353                   
354    .weak      TIM3_IRQHandler            
355    .thumb_set TIM3_IRQHandler,Default_Handler
356                   
357    .weak      TIM4_IRQHandler            
358    .thumb_set TIM4_IRQHandler,Default_Handler
359                   
360    .weak      I2C1_EV_IRQHandler   
361    .thumb_set I2C1_EV_IRQHandler,Default_Handler
362                      
363    .weak      I2C1_ER_IRQHandler   
364    .thumb_set I2C1_ER_IRQHandler,Default_Handler
365                      
366    .weak      I2C2_EV_IRQHandler   
367    .thumb_set I2C2_EV_IRQHandler,Default_Handler
368                   
369    .weak      I2C2_ER_IRQHandler   
370    .thumb_set I2C2_ER_IRQHandler,Default_Handler
371                            
372    .weak      SPI1_IRQHandler            
373    .thumb_set SPI1_IRQHandler,Default_Handler
374                         
375    .weak      SPI2_IRQHandler            
376    .thumb_set SPI2_IRQHandler,Default_Handler
377                   
378    .weak      USART1_IRQHandler      
379    .thumb_set USART1_IRQHandler,Default_Handler
380                      
381    .weak      USART2_IRQHandler      
382    .thumb_set USART2_IRQHandler,Default_Handler
383                                   
384    .weak      EXTI15_10_IRQHandler               
385    .thumb_set EXTI15_10_IRQHandler,Default_Handler
386                
387    .weak      RTC_Alarm_IRQHandler               
388    .thumb_set RTC_Alarm_IRQHandler,Default_Handler
389             
390    .weak      OTG_FS_WKUP_IRQHandler         
391    .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
392             
393    .weak      DMA1_Stream7_IRQHandler               
394    .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
395                      
396    .weak      SDIO_IRQHandler            
397    .thumb_set SDIO_IRQHandler,Default_Handler
398                      
399    .weak      TIM5_IRQHandler            
400    .thumb_set TIM5_IRQHandler,Default_Handler
401                      
402    .weak      SPI3_IRQHandler            
403    .thumb_set SPI3_IRQHandler,Default_Handler
404                      
405    .weak      DMA2_Stream0_IRQHandler               
406    .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
407                
408    .weak      DMA2_Stream1_IRQHandler               
409    .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
410                   
411    .weak      DMA2_Stream2_IRQHandler               
412    .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
413             
414    .weak      DMA2_Stream3_IRQHandler               
415    .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
416             
417    .weak      DMA2_Stream4_IRQHandler               
418    .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
419             
420    .weak      OTG_FS_IRQHandler      
421    .thumb_set OTG_FS_IRQHandler,Default_Handler
422                      
423    .weak      DMA2_Stream5_IRQHandler               
424    .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
425                   
426    .weak      DMA2_Stream6_IRQHandler               
427    .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
428                   
429    .weak      DMA2_Stream7_IRQHandler               
430    .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
431                   
432    .weak      USART6_IRQHandler      
433    .thumb_set USART6_IRQHandler,Default_Handler
434                         
435    .weak      I2C3_EV_IRQHandler   
436    .thumb_set I2C3_EV_IRQHandler,Default_Handler
437                         
438    .weak      I2C3_ER_IRQHandler   
439    .thumb_set I2C3_ER_IRQHandler,Default_Handler
440                         
441    .weak      FPU_IRQHandler                  
442    .thumb_set FPU_IRQHandler,Default_Handler  
443
444    .weak      SPI4_IRQHandler                  
445    .thumb_set SPI4_IRQHandler,Default_Handler 
446
447 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
448