begriffs open source - cmsis-dfp-stm32f4/blob - Source/Templates/arm/startup_stm32f415xx.s

   1 ;*******************************************************************************
   2 ;* File Name          : startup_stm32f415xx.s
   3 ;* Author             : MCD Application Team
   4 ;* Description        : STM32F415xx devices vector table for MDK-ARM toolchain.
   5 ;*                      This module performs:
   6 ;*                      - Set the initial SP
   7 ;*                      - Set the initial PC == Reset_Handler
   8 ;*                      - Set the vector table entries with the exceptions ISR address
   9 ;*                      - Branches to __main in the C library (which eventually
  10 ;*                        calls main()).
  11 ;*                      After Reset the CortexM4 processor is in Thread mode,
  12 ;*                      priority is Privileged, and the Stack is set to Main.
  13 ;*******************************************************************************
  14 ;* @attention
  15 ;*
  16 ;* Copyright (c) 2017 STMicroelectronics.
  17 ;* All rights reserved.
  18 ;*
  19 ;* This software is licensed under terms that can be found in the LICENSE file
  20 ;* in the root directory of this software component.
  21 ;* If no LICENSE file comes with this software, it is provided AS-IS.
  22 ;*
  23 ;*******************************************************************************
  24 ;* <<< Use Configuration Wizard in Context Menu >>>
  25 ;
  26 ; Amount of memory (in bytes) allocated for Stack
  27 ; Tailor this value to your application needs
  28 ; <h> Stack Configuration
  29 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30 ; </h>
  31
  32 Stack_Size      EQU     0x00000400
  33
  34                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
  35 Stack_Mem       SPACE   Stack_Size
  36 __initial_sp
  37
  38
  39 ; <h> Heap Configuration
  40 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  41 ; </h>
  42
  43 Heap_Size       EQU     0x00000200
  44
  45                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3
  46 __heap_base
  47 Heap_Mem        SPACE   Heap_Size
  48 __heap_limit
  49
  50                 PRESERVE8
  51                 THUMB
  52
  53
  54 ; Vector Table Mapped to Address 0 at Reset
  55                 AREA    RESET, DATA, READONLY
  56                 EXPORT  __Vectors
  57                 EXPORT  __Vectors_End
  58                 EXPORT  __Vectors_Size
  59
  60 __Vectors       DCD     __initial_sp               ; Top of Stack
  61                 DCD     Reset_Handler              ; Reset Handler
  62                 DCD     NMI_Handler                ; NMI Handler
  63                 DCD     HardFault_Handler          ; Hard Fault Handler
  64                 DCD     MemManage_Handler          ; MPU Fault Handler
  65                 DCD     BusFault_Handler           ; Bus Fault Handler
  66                 DCD     UsageFault_Handler         ; Usage Fault Handler
  67                 DCD     0                          ; Reserved
  68                 DCD     0                          ; Reserved
  69                 DCD     0                          ; Reserved
  70                 DCD     0                          ; Reserved
  71                 DCD     SVC_Handler                ; SVCall Handler
  72                 DCD     DebugMon_Handler           ; Debug Monitor Handler
  73                 DCD     0                          ; Reserved
  74                 DCD     PendSV_Handler             ; PendSV Handler
  75                 DCD     SysTick_Handler            ; SysTick Handler
  76
  77                 ; External Interrupts
  78                 DCD     WWDG_IRQHandler                   ; Window WatchDog
  79                 DCD     PVD_IRQHandler                    ; PVD through EXTI Line detection
  80                 DCD     TAMP_STAMP_IRQHandler             ; Tamper and TimeStamps through the EXTI line
  81                 DCD     RTC_WKUP_IRQHandler               ; RTC Wakeup through the EXTI line
  82                 DCD     FLASH_IRQHandler                  ; FLASH
  83                 DCD     RCC_IRQHandler                    ; RCC
  84                 DCD     EXTI0_IRQHandler                  ; EXTI Line0
  85                 DCD     EXTI1_IRQHandler                  ; EXTI Line1
  86                 DCD     EXTI2_IRQHandler                  ; EXTI Line2
  87                 DCD     EXTI3_IRQHandler                  ; EXTI Line3
  88                 DCD     EXTI4_IRQHandler                  ; EXTI Line4
  89                 DCD     DMA1_Stream0_IRQHandler           ; DMA1 Stream 0
  90                 DCD     DMA1_Stream1_IRQHandler           ; DMA1 Stream 1
  91                 DCD     DMA1_Stream2_IRQHandler           ; DMA1 Stream 2
  92                 DCD     DMA1_Stream3_IRQHandler           ; DMA1 Stream 3
  93                 DCD     DMA1_Stream4_IRQHandler           ; DMA1 Stream 4
  94                 DCD     DMA1_Stream5_IRQHandler           ; DMA1 Stream 5
  95                 DCD     DMA1_Stream6_IRQHandler           ; DMA1 Stream 6
  96                 DCD     ADC_IRQHandler                    ; ADC1, ADC2 and ADC3s
  97                 DCD     CAN1_TX_IRQHandler                ; CAN1 TX
  98                 DCD     CAN1_RX0_IRQHandler               ; CAN1 RX0
  99                 DCD     CAN1_RX1_IRQHandler               ; CAN1 RX1
 100                 DCD     CAN1_SCE_IRQHandler               ; CAN1 SCE
 101                 DCD     EXTI9_5_IRQHandler                ; External Line[9:5]s
 102                 DCD     TIM1_BRK_TIM9_IRQHandler          ; TIM1 Break and TIM9
 103                 DCD     TIM1_UP_TIM10_IRQHandler          ; TIM1 Update and TIM10
 104                 DCD     TIM1_TRG_COM_TIM11_IRQHandler     ; TIM1 Trigger and Commutation and TIM11
 105                 DCD     TIM1_CC_IRQHandler                ; TIM1 Capture Compare
 106                 DCD     TIM2_IRQHandler                   ; TIM2
 107                 DCD     TIM3_IRQHandler                   ; TIM3
 108                 DCD     TIM4_IRQHandler                   ; TIM4
 109                 DCD     I2C1_EV_IRQHandler                ; I2C1 Event
 110                 DCD     I2C1_ER_IRQHandler                ; I2C1 Error
 111                 DCD     I2C2_EV_IRQHandler                ; I2C2 Event
 112                 DCD     I2C2_ER_IRQHandler                ; I2C2 Error
 113                 DCD     SPI1_IRQHandler                   ; SPI1
 114                 DCD     SPI2_IRQHandler                   ; SPI2
 115                 DCD     USART1_IRQHandler                 ; USART1
 116                 DCD     USART2_IRQHandler                 ; USART2
 117                 DCD     USART3_IRQHandler                 ; USART3
 118                 DCD     EXTI15_10_IRQHandler              ; External Line[15:10]s
 119                 DCD     RTC_Alarm_IRQHandler              ; RTC Alarm (A and B) through EXTI Line
 120                 DCD     OTG_FS_WKUP_IRQHandler            ; USB OTG FS Wakeup through EXTI line
 121                 DCD     TIM8_BRK_TIM12_IRQHandler         ; TIM8 Break and TIM12
 122                 DCD     TIM8_UP_TIM13_IRQHandler          ; TIM8 Update and TIM13
 123                 DCD     TIM8_TRG_COM_TIM14_IRQHandler     ; TIM8 Trigger and Commutation and TIM14
 124                 DCD     TIM8_CC_IRQHandler                ; TIM8 Capture Compare
 125                 DCD     DMA1_Stream7_IRQHandler           ; DMA1 Stream7
 126                 DCD     FMC_IRQHandler                    ; FMC
 127                 DCD     SDIO_IRQHandler                   ; SDIO
 128                 DCD     TIM5_IRQHandler                   ; TIM5
 129                 DCD     SPI3_IRQHandler                   ; SPI3
 130                 DCD     UART4_IRQHandler                  ; UART4
 131                 DCD     UART5_IRQHandler                  ; UART5
 132                 DCD     TIM6_DAC_IRQHandler               ; TIM6 and DAC1&2 underrun errors
 133                 DCD     TIM7_IRQHandler                   ; TIM7
 134                 DCD     DMA2_Stream0_IRQHandler           ; DMA2 Stream 0
 135                 DCD     DMA2_Stream1_IRQHandler           ; DMA2 Stream 1
 136                 DCD     DMA2_Stream2_IRQHandler           ; DMA2 Stream 2
 137                 DCD     DMA2_Stream3_IRQHandler           ; DMA2 Stream 3
 138                 DCD     DMA2_Stream4_IRQHandler           ; DMA2 Stream 4
 139                 DCD     0                                 ; Reserved
 140                 DCD     0                                 ; Reserved
 141                 DCD     CAN2_TX_IRQHandler                ; CAN2 TX
 142                 DCD     CAN2_RX0_IRQHandler               ; CAN2 RX0
 143                 DCD     CAN2_RX1_IRQHandler               ; CAN2 RX1
 144                 DCD     CAN2_SCE_IRQHandler               ; CAN2 SCE
 145                 DCD     OTG_FS_IRQHandler                 ; USB OTG FS
 146                 DCD     DMA2_Stream5_IRQHandler           ; DMA2 Stream 5
 147                 DCD     DMA2_Stream6_IRQHandler           ; DMA2 Stream 6
 148                 DCD     DMA2_Stream7_IRQHandler           ; DMA2 Stream 7
 149                 DCD     USART6_IRQHandler                 ; USART6
 150                 DCD     I2C3_EV_IRQHandler                ; I2C3 event
 151                 DCD     I2C3_ER_IRQHandler                ; I2C3 error
 152                 DCD     OTG_HS_EP1_OUT_IRQHandler         ; USB OTG HS End Point 1 Out
 153                 DCD     OTG_HS_EP1_IN_IRQHandler          ; USB OTG HS End Point 1 In
 154                 DCD     OTG_HS_WKUP_IRQHandler            ; USB OTG HS Wakeup through EXTI
 155                 DCD     OTG_HS_IRQHandler                 ; USB OTG HS
 156                 DCD     0                                 ; Reserved
 157                 DCD     CRYP_IRQHandler                   ; CRYPTO
 158                 DCD     HASH_RNG_IRQHandler               ; Hash and Rng
 159                 DCD     FPU_IRQHandler                    ; FPU
 160
 161
 162 __Vectors_End
 163
 164 __Vectors_Size  EQU  __Vectors_End - __Vectors
 165
 166                 AREA    |.text|, CODE, READONLY
 167
 168 ; Reset handler
 169 Reset_Handler    PROC
 170                  EXPORT  Reset_Handler             [WEAK]
 171         IMPORT  SystemInit
 172         IMPORT  __main
 173
 174                  LDR     R0, =SystemInit
 175                  BLX     R0
 176                  LDR     R0, =__main
 177                  BX      R0
 178                  ENDP
 179
 180 ; Dummy Exception Handlers (infinite loops which can be modified)
 181
 182 NMI_Handler     PROC
 183                 EXPORT  NMI_Handler                [WEAK]
 184                 B       .
 185                 ENDP
 186 HardFault_Handler\
 187                 PROC
 188                 EXPORT  HardFault_Handler          [WEAK]
 189                 B       .
 190                 ENDP
 191 MemManage_Handler\
 192                 PROC
 193                 EXPORT  MemManage_Handler          [WEAK]
 194                 B       .
 195                 ENDP
 196 BusFault_Handler\
 197                 PROC
 198                 EXPORT  BusFault_Handler           [WEAK]
 199                 B       .
 200                 ENDP
 201 UsageFault_Handler\
 202                 PROC
 203                 EXPORT  UsageFault_Handler         [WEAK]
 204                 B       .
 205                 ENDP
 206 SVC_Handler     PROC
 207                 EXPORT  SVC_Handler                [WEAK]
 208                 B       .
 209                 ENDP
 210 DebugMon_Handler\
 211                 PROC
 212                 EXPORT  DebugMon_Handler           [WEAK]
 213                 B       .
 214                 ENDP
 215 PendSV_Handler  PROC
 216                 EXPORT  PendSV_Handler             [WEAK]
 217                 B       .
 218                 ENDP
 219 SysTick_Handler PROC
 220                 EXPORT  SysTick_Handler            [WEAK]
 221                 B       .
 222                 ENDP
 223
 224 Default_Handler PROC
 225
 226                 EXPORT  WWDG_IRQHandler                   [WEAK]
 227                 EXPORT  PVD_IRQHandler                    [WEAK]
 228                 EXPORT  TAMP_STAMP_IRQHandler             [WEAK]
 229                 EXPORT  RTC_WKUP_IRQHandler               [WEAK]
 230                 EXPORT  FLASH_IRQHandler                  [WEAK]
 231                 EXPORT  RCC_IRQHandler                    [WEAK]
 232                 EXPORT  EXTI0_IRQHandler                  [WEAK]
 233                 EXPORT  EXTI1_IRQHandler                  [WEAK]
 234                 EXPORT  EXTI2_IRQHandler                  [WEAK]
 235                 EXPORT  EXTI3_IRQHandler                  [WEAK]
 236                 EXPORT  EXTI4_IRQHandler                  [WEAK]
 237                 EXPORT  DMA1_Stream0_IRQHandler           [WEAK]
 238                 EXPORT  DMA1_Stream1_IRQHandler           [WEAK]
 239                 EXPORT  DMA1_Stream2_IRQHandler           [WEAK]
 240                 EXPORT  DMA1_Stream3_IRQHandler           [WEAK]
 241                 EXPORT  DMA1_Stream4_IRQHandler           [WEAK]
 242                 EXPORT  DMA1_Stream5_IRQHandler           [WEAK]
 243                 EXPORT  DMA1_Stream6_IRQHandler           [WEAK]
 244                 EXPORT  ADC_IRQHandler                    [WEAK]
 245                 EXPORT  CAN1_TX_IRQHandler                [WEAK]
 246                 EXPORT  CAN1_RX0_IRQHandler               [WEAK]
 247                 EXPORT  CAN1_RX1_IRQHandler               [WEAK]
 248                 EXPORT  CAN1_SCE_IRQHandler               [WEAK]
 249                 EXPORT  EXTI9_5_IRQHandler                [WEAK]
 250                 EXPORT  TIM1_BRK_TIM9_IRQHandler          [WEAK]
 251                 EXPORT  TIM1_UP_TIM10_IRQHandler          [WEAK]
 252                 EXPORT  TIM1_TRG_COM_TIM11_IRQHandler     [WEAK]
 253                 EXPORT  TIM1_CC_IRQHandler                [WEAK]
 254                 EXPORT  TIM2_IRQHandler                   [WEAK]
 255                 EXPORT  TIM3_IRQHandler                   [WEAK]
 256                 EXPORT  TIM4_IRQHandler                   [WEAK]
 257                 EXPORT  I2C1_EV_IRQHandler                [WEAK]
 258                 EXPORT  I2C1_ER_IRQHandler                [WEAK]
 259                 EXPORT  I2C2_EV_IRQHandler                [WEAK]
 260                 EXPORT  I2C2_ER_IRQHandler                [WEAK]
 261                 EXPORT  SPI1_IRQHandler                   [WEAK]
 262                 EXPORT  SPI2_IRQHandler                   [WEAK]
 263                 EXPORT  USART1_IRQHandler                 [WEAK]
 264                 EXPORT  USART2_IRQHandler                 [WEAK]
 265                 EXPORT  USART3_IRQHandler                 [WEAK]
 266                 EXPORT  EXTI15_10_IRQHandler              [WEAK]
 267                 EXPORT  RTC_Alarm_IRQHandler              [WEAK]
 268                 EXPORT  OTG_FS_WKUP_IRQHandler            [WEAK]
 269                 EXPORT  TIM8_BRK_TIM12_IRQHandler         [WEAK]
 270                 EXPORT  TIM8_UP_TIM13_IRQHandler          [WEAK]
 271                 EXPORT  TIM8_TRG_COM_TIM14_IRQHandler     [WEAK]
 272                 EXPORT  TIM8_CC_IRQHandler                [WEAK]
 273                 EXPORT  DMA1_Stream7_IRQHandler           [WEAK]
 274                 EXPORT  FMC_IRQHandler                    [WEAK]
 275                 EXPORT  SDIO_IRQHandler                   [WEAK]
 276                 EXPORT  TIM5_IRQHandler                   [WEAK]
 277                 EXPORT  SPI3_IRQHandler                   [WEAK]
 278                 EXPORT  UART4_IRQHandler                  [WEAK]
 279                 EXPORT  UART5_IRQHandler                  [WEAK]
 280                 EXPORT  TIM6_DAC_IRQHandler               [WEAK]
 281                 EXPORT  TIM7_IRQHandler                   [WEAK]
 282                 EXPORT  DMA2_Stream0_IRQHandler           [WEAK]
 283                 EXPORT  DMA2_Stream1_IRQHandler           [WEAK]
 284                 EXPORT  DMA2_Stream2_IRQHandler           [WEAK]
 285                 EXPORT  DMA2_Stream3_IRQHandler           [WEAK]
 286                 EXPORT  DMA2_Stream4_IRQHandler           [WEAK]
 287                 EXPORT  CAN2_TX_IRQHandler                [WEAK]
 288                 EXPORT  CAN2_RX0_IRQHandler               [WEAK]
 289                 EXPORT  CAN2_RX1_IRQHandler               [WEAK]
 290                 EXPORT  CAN2_SCE_IRQHandler               [WEAK]
 291                 EXPORT  OTG_FS_IRQHandler                 [WEAK]
 292                 EXPORT  DMA2_Stream5_IRQHandler           [WEAK]
 293                 EXPORT  DMA2_Stream6_IRQHandler           [WEAK]
 294                 EXPORT  DMA2_Stream7_IRQHandler           [WEAK]
 295                 EXPORT  USART6_IRQHandler                 [WEAK]
 296                 EXPORT  I2C3_EV_IRQHandler                [WEAK]
 297                 EXPORT  I2C3_ER_IRQHandler                [WEAK]
 298                 EXPORT  OTG_HS_EP1_OUT_IRQHandler         [WEAK]
 299                 EXPORT  OTG_HS_EP1_IN_IRQHandler          [WEAK]
 300                 EXPORT  OTG_HS_WKUP_IRQHandler            [WEAK]
 301                 EXPORT  OTG_HS_IRQHandler                 [WEAK]
 302                 EXPORT  CRYP_IRQHandler                               [WEAK]
 303                 EXPORT  HASH_RNG_IRQHandler               [WEAK]
 304                 EXPORT  FPU_IRQHandler                    [WEAK]
 305
 306 WWDG_IRQHandler
 307 PVD_IRQHandler
 308 TAMP_STAMP_IRQHandler
 309 RTC_WKUP_IRQHandler
 310 FLASH_IRQHandler
 311 RCC_IRQHandler
 312 EXTI0_IRQHandler
 313 EXTI1_IRQHandler
 314 EXTI2_IRQHandler
 315 EXTI3_IRQHandler
 316 EXTI4_IRQHandler
 317 DMA1_Stream0_IRQHandler
 318 DMA1_Stream1_IRQHandler
 319 DMA1_Stream2_IRQHandler
 320 DMA1_Stream3_IRQHandler
 321 DMA1_Stream4_IRQHandler
 322 DMA1_Stream5_IRQHandler
 323 DMA1_Stream6_IRQHandler
 324 ADC_IRQHandler
 325 CAN1_TX_IRQHandler
 326 CAN1_RX0_IRQHandler
 327 CAN1_RX1_IRQHandler
 328 CAN1_SCE_IRQHandler
 329 EXTI9_5_IRQHandler
 330 TIM1_BRK_TIM9_IRQHandler
 331 TIM1_UP_TIM10_IRQHandler
 332 TIM1_TRG_COM_TIM11_IRQHandler
 333 TIM1_CC_IRQHandler
 334 TIM2_IRQHandler
 335 TIM3_IRQHandler
 336 TIM4_IRQHandler
 337 I2C1_EV_IRQHandler
 338 I2C1_ER_IRQHandler
 339 I2C2_EV_IRQHandler
 340 I2C2_ER_IRQHandler
 341 SPI1_IRQHandler
 342 SPI2_IRQHandler
 343 USART1_IRQHandler
 344 USART2_IRQHandler
 345 USART3_IRQHandler
 346 EXTI15_10_IRQHandler
 347 RTC_Alarm_IRQHandler
 348 OTG_FS_WKUP_IRQHandler
 349 TIM8_BRK_TIM12_IRQHandler
 350 TIM8_UP_TIM13_IRQHandler
 351 TIM8_TRG_COM_TIM14_IRQHandler
 352 TIM8_CC_IRQHandler
 353 DMA1_Stream7_IRQHandler
 354 FMC_IRQHandler
 355 SDIO_IRQHandler
 356 TIM5_IRQHandler
 357 SPI3_IRQHandler
 358 UART4_IRQHandler
 359 UART5_IRQHandler
 360 TIM6_DAC_IRQHandler
 361 TIM7_IRQHandler
 362 DMA2_Stream0_IRQHandler
 363 DMA2_Stream1_IRQHandler
 364 DMA2_Stream2_IRQHandler
 365 DMA2_Stream3_IRQHandler
 366 DMA2_Stream4_IRQHandler
 367 CAN2_TX_IRQHandler
 368 CAN2_RX0_IRQHandler
 369 CAN2_RX1_IRQHandler
 370 CAN2_SCE_IRQHandler
 371 OTG_FS_IRQHandler
 372 DMA2_Stream5_IRQHandler
 373 DMA2_Stream6_IRQHandler
 374 DMA2_Stream7_IRQHandler
 375 USART6_IRQHandler
 376 I2C3_EV_IRQHandler
 377 I2C3_ER_IRQHandler
 378 OTG_HS_EP1_OUT_IRQHandler
 379 OTG_HS_EP1_IN_IRQHandler
 380 OTG_HS_WKUP_IRQHandler
 381 OTG_HS_IRQHandler
 382 CRYP_IRQHandler
 383 HASH_RNG_IRQHandler
 384 FPU_IRQHandler
 385
 386                 B       .
 387
 388                 ENDP
 389
 390                 ALIGN
 391
 392 ;*******************************************************************************
 393 ; User Stack and Heap initialization
 394 ;*******************************************************************************
 395                  IF      :DEF:__MICROLIB
 396
 397                  EXPORT  __initial_sp
 398                  EXPORT  __heap_base
 399                  EXPORT  __heap_limit
 400
 401                  ELSE
 402
 403                  IMPORT  __use_two_region_memory
 404                  EXPORT  __user_initial_stackheap
 405
 406 __user_initial_stackheap
 407
 408                  LDR     R0, =  Heap_Mem
 409                  LDR     R1, =(Stack_Mem + Stack_Size)
 410                  LDR     R2, = (Heap_Mem +  Heap_Size)
 411                  LDR     R3, = Stack_Mem
 412                  BX      LR
 413
 414                  ALIGN
 415
 416                  ENDIF
 417
 418                  END