begriffs open source - cmsis-dfp-stm32f4/blob - Source/Templates/gcc/startup_stm32f412cx.s

   1 /**
   2   ******************************************************************************
   3   * @file      startup_stm32f412Cx.s
   4   * @author    MCD Application Team
   5   * @brief     STM32F412Cx Devices vector table for GCC based toolchains.
   6   *            This module performs:
   7   *                - Set the initial SP
   8   *                - Set the initial PC == Reset_Handler,
   9   *                - Set the vector table entries with the exceptions ISR address
  10   *                - Branches to main in the C library (which eventually
  11   *                  calls main()).
  12   *            After Reset the Cortex-M4 processor is in Thread mode,
  13   *            priority is Privileged, and the Stack is set to Main.
  14   ******************************************************************************
  15   * @attention
  16   *
  17   * Copyright (c) 2017 STMicroelectronics.
  18   * All rights reserved.
  19   *
  20   * This software is licensed under terms that can be found in the LICENSE file
  21   * in the root directory of this software component.
  22   * If no LICENSE file comes with this software, it is provided AS-IS.
  23   *
  24   ******************************************************************************
  25   */
  26
  27   .syntax unified
  28   .cpu cortex-m4
  29   .fpu softvfp
  30   .thumb
  31
  32 .global  g_pfnVectors
  33 .global  Default_Handler
  34
  35 /* start address for the initialization values of the .data section.
  36 defined in linker script */
  37 .word  _sidata
  38 /* start address for the .data section. defined in linker script */
  39 .word  _sdata
  40 /* end address for the .data section. defined in linker script */
  41 .word  _edata
  42 /* start address for the .bss section. defined in linker script */
  43 .word  _sbss
  44 /* end address for the .bss section. defined in linker script */
  45 .word  _ebss
  46 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  47
  48 /**
  49  * @brief  This is the code that gets called when the processor first
  50  *          starts execution following a reset event. Only the absolutely
  51  *          necessary set is performed, after which the application
  52  *          supplied main() routine is called.
  53  * @param  None
  54  * @retval : None
  55 */
  56
  57     .section  .text.Reset_Handler
  58   .weak  Reset_Handler
  59   .type  Reset_Handler, %function
  60 Reset_Handler:
  61   ldr   sp, =_estack       /* set stack pointer */
  62
  63 /* Call the clock system initialization function.*/
  64   bl  SystemInit
  65
  66 /* Copy the data segment initializers from flash to SRAM */
  67   ldr r0, =_sdata
  68   ldr r1, =_edata
  69   ldr r2, =_sidata
  70   movs r3, #0
  71   b LoopCopyDataInit
  72
  73 CopyDataInit:
  74   ldr r4, [r2, r3]
  75   str r4, [r0, r3]
  76   adds r3, r3, #4
  77
  78 LoopCopyDataInit:
  79   adds r4, r0, r3
  80   cmp r4, r1
  81   bcc CopyDataInit
  82
  83 /* Zero fill the bss segment. */
  84   ldr r2, =_sbss
  85   ldr r4, =_ebss
  86   movs r3, #0
  87   b LoopFillZerobss
  88
  89 FillZerobss:
  90   str  r3, [r2]
  91   adds r2, r2, #4
  92
  93 LoopFillZerobss:
  94   cmp r2, r4
  95   bcc FillZerobss
  96
  97 /* Call static constructors */
  98     bl __libc_init_array
  99 /* Call the application's entry point.*/
 100   bl  main
 101   bx  lr
 102 .size  Reset_Handler, .-Reset_Handler
 103
 104 /**
 105  * @brief  This is the code that gets called when the processor receives an
 106  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 107  *         the system state for examination by a debugger.
 108  * @param  None
 109  * @retval None
 110 */
 111     .section  .text.Default_Handler,"ax",%progbits
 112 Default_Handler:
 113 Infinite_Loop:
 114   b  Infinite_Loop
 115   .size  Default_Handler, .-Default_Handler
 116 /******************************************************************************
 117 *
 118 * The minimal vector table for a Cortex M3. Note that the proper constructs
 119 * must be placed on this to ensure that it ends up at physical address
 120 * 0x0000.0000.
 121 *
 122 *******************************************************************************/
 123    .section  .isr_vector,"a",%progbits
 124   .type  g_pfnVectors, %object
 125
 126 g_pfnVectors:
 127   .word  _estack
 128   .word  Reset_Handler
 129   .word  NMI_Handler
 130   .word  HardFault_Handler
 131   .word  MemManage_Handler
 132   .word  BusFault_Handler
 133   .word  UsageFault_Handler
 134   .word  0
 135   .word  0
 136   .word  0
 137   .word  0
 138   .word  SVC_Handler
 139   .word  DebugMon_Handler
 140   .word  0
 141   .word  PendSV_Handler
 142   .word  SysTick_Handler
 143
 144   /* External Interrupts */
 145   .word     WWDG_IRQHandler                   /* Window WatchDog                             */
 146   .word     PVD_IRQHandler                    /* PVD through EXTI Line detection             */
 147   .word     TAMP_STAMP_IRQHandler             /* Tamper and TimeStamps through the EXTI line */
 148   .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line            */
 149   .word     FLASH_IRQHandler                  /* FLASH                                       */
 150   .word     RCC_IRQHandler                    /* RCC                                         */
 151   .word     EXTI0_IRQHandler                  /* EXTI Line0                                  */
 152   .word     EXTI1_IRQHandler                  /* EXTI Line1                                  */
 153   .word     EXTI2_IRQHandler                  /* EXTI Line2                                  */
 154   .word     EXTI3_IRQHandler                  /* EXTI Line3                                  */
 155   .word     EXTI4_IRQHandler                  /* EXTI Line4                                  */
 156   .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                               */
 157   .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                               */
 158   .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                               */
 159   .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                               */
 160   .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                               */
 161   .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                               */
 162   .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                               */
 163   .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s                        */
 164   .word     CAN1_TX_IRQHandler                /* CAN1 TX                                     */
 165   .word     CAN1_RX0_IRQHandler               /* CAN1 RX0                                    */
 166   .word     CAN1_RX1_IRQHandler               /* CAN1 RX1                                    */
 167   .word     CAN1_SCE_IRQHandler               /* CAN1 SCE                                    */
 168   .word     EXTI9_5_IRQHandler                /* External Line[9:5]s                         */
 169   .word     TIM1_BRK_TIM9_IRQHandler          /* TIM1 Break and TIM9                         */
 170   .word     TIM1_UP_TIM10_IRQHandler          /* TIM1 Update and TIM10                       */
 171   .word     TIM1_TRG_COM_TIM11_IRQHandler     /* TIM1 Trigger and Commutation and TIM11      */
 172   .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare                        */
 173   .word     TIM2_IRQHandler                   /* TIM2                                        */
 174   .word     TIM3_IRQHandler                   /* TIM3                                        */
 175   .word     TIM4_IRQHandler                   /* TIM4                                        */
 176   .word     I2C1_EV_IRQHandler                /* I2C1 Event                                  */
 177   .word     I2C1_ER_IRQHandler                /* I2C1 Error                                  */
 178   .word     I2C2_EV_IRQHandler                /* I2C2 Event                                  */
 179   .word     I2C2_ER_IRQHandler                /* I2C2 Error                                  */
 180   .word     SPI1_IRQHandler                   /* SPI1                                        */
 181   .word     SPI2_IRQHandler                   /* SPI2                                        */
 182   .word     USART1_IRQHandler                 /* USART1                                      */
 183   .word     USART2_IRQHandler                 /* USART2                                      */
 184   .word     USART3_IRQHandler                 /* USART3                                      */
 185   .word     EXTI15_10_IRQHandler              /* External Line[15:10]s                       */
 186   .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line       */
 187   .word     OTG_FS_WKUP_IRQHandler            /* USB OTG FS Wakeup through EXTI line         */
 188   .word     TIM8_BRK_TIM12_IRQHandler         /* TIM8 Break and TIM12                        */
 189   .word     TIM8_UP_TIM13_IRQHandler          /* TIM8 Update and TIM13                       */
 190   .word     TIM8_TRG_COM_TIM14_IRQHandler     /* TIM8 Trigger and Commutation and TIM14      */
 191   .word     TIM8_CC_IRQHandler                /* TIM8 Capture Compare                        */
 192   .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                                */
 193   .word     0                                 /* Reserved                                    */
 194   .word     SDIO_IRQHandler                   /* SDIO                                        */
 195   .word     TIM5_IRQHandler                   /* TIM5                                        */
 196   .word     SPI3_IRQHandler                   /* SPI3                                        */
 197   .word     0                                 /* Reserved                                    */
 198   .word     0                                 /* Reserved                                    */
 199   .word     TIM6_IRQHandler                   /* TIM6                                        */
 200   .word     TIM7_IRQHandler                   /* TIM7                                        */
 201   .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                               */
 202   .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                               */
 203   .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                               */
 204   .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                               */
 205   .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                               */
 206   .word     DFSDM1_FLT0_IRQHandler            /* DFSDM1 Filter0                              */
 207   .word     DFSDM1_FLT1_IRQHandler            /* DFSDM1 Filter1                              */
 208   .word     CAN2_TX_IRQHandler                /* CAN2 TX                                     */
 209   .word     CAN2_RX0_IRQHandler               /* CAN2 RX0                                    */
 210   .word     CAN2_RX1_IRQHandler               /* CAN2 RX1                                    */
 211   .word     CAN2_SCE_IRQHandler               /* CAN2 SCE                                    */
 212   .word     OTG_FS_IRQHandler                 /* USB OTG FS                                  */
 213   .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                               */
 214   .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                               */
 215   .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                               */
 216   .word     USART6_IRQHandler                 /* USART6                                      */
 217   .word     I2C3_EV_IRQHandler                /* I2C3 event                                  */
 218   .word     I2C3_ER_IRQHandler                /* I2C3 error                                  */
 219   .word     0                                 /* Reserved                                    */
 220   .word     0                                 /* Reserved                                    */
 221   .word     0                                 /* Reserved                                    */
 222   .word     0                                 /* Reserved                                    */
 223   .word     0                                 /* Reserved                                    */
 224   .word     0                                 /* Reserved                                    */
 225   .word     RNG_IRQHandler                    /* RNG                                         */
 226   .word     FPU_IRQHandler                    /* FPU                                         */
 227   .word     0                                 /* Reserved                                    */
 228   .word     0                                 /* Reserved                                    */
 229   .word     SPI4_IRQHandler                   /* SPI4                                        */
 230   .word     SPI5_IRQHandler                   /* SPI5                                        */
 231   .word     0                                 /* Reserved                                    */
 232   .word     0                                 /* Reserved                                    */
 233   .word     0                                 /* Reserved                                    */
 234   .word     0                                 /* Reserved                                    */
 235   .word     0                                 /* Reserved                                    */
 236   .word     0                                 /* Reserved                                    */
 237   .word     0                                 /* Reserved                                    */
 238   .word     0                                 /* Reserved                                    */
 239   .word     0                                 /* Reserved                                    */
 240   .word     FMPI2C1_EV_IRQHandler             /* FMPI2C1 Event                               */
 241   .word     FMPI2C1_ER_IRQHandler             /* FMPI2C1 Error                               */
 242
 243
 244   .size  g_pfnVectors, .-g_pfnVectors
 245
 246 /*******************************************************************************
 247 *
 248 * Provide weak aliases for each Exception handler to the Default_Handler.
 249 * As they are weak aliases, any function with the same name will override
 250 * this definition.
 251 *
 252 *******************************************************************************/
 253    .weak      NMI_Handler
 254    .thumb_set NMI_Handler,Default_Handler
 255
 256    .weak      HardFault_Handler
 257    .thumb_set HardFault_Handler,Default_Handler
 258
 259    .weak      MemManage_Handler
 260    .thumb_set MemManage_Handler,Default_Handler
 261
 262    .weak      BusFault_Handler
 263    .thumb_set BusFault_Handler,Default_Handler
 264
 265    .weak      UsageFault_Handler
 266    .thumb_set UsageFault_Handler,Default_Handler
 267
 268    .weak      SVC_Handler
 269    .thumb_set SVC_Handler,Default_Handler
 270
 271    .weak      DebugMon_Handler
 272    .thumb_set DebugMon_Handler,Default_Handler
 273
 274    .weak      PendSV_Handler
 275    .thumb_set PendSV_Handler,Default_Handler
 276
 277    .weak      SysTick_Handler
 278    .thumb_set SysTick_Handler,Default_Handler
 279
 280    .weak      WWDG_IRQHandler
 281    .thumb_set WWDG_IRQHandler,Default_Handler
 282
 283    .weak      PVD_IRQHandler
 284    .thumb_set PVD_IRQHandler,Default_Handler
 285
 286    .weak      TAMP_STAMP_IRQHandler
 287    .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
 288
 289    .weak      RTC_WKUP_IRQHandler
 290    .thumb_set RTC_WKUP_IRQHandler,Default_Handler
 291
 292    .weak      FLASH_IRQHandler
 293    .thumb_set FLASH_IRQHandler,Default_Handler
 294
 295    .weak      RCC_IRQHandler
 296    .thumb_set RCC_IRQHandler,Default_Handler
 297
 298    .weak      EXTI0_IRQHandler
 299    .thumb_set EXTI0_IRQHandler,Default_Handler
 300
 301    .weak      EXTI1_IRQHandler
 302    .thumb_set EXTI1_IRQHandler,Default_Handler
 303
 304    .weak      EXTI2_IRQHandler
 305    .thumb_set EXTI2_IRQHandler,Default_Handler
 306
 307    .weak      EXTI3_IRQHandler
 308    .thumb_set EXTI3_IRQHandler,Default_Handler
 309
 310    .weak      EXTI4_IRQHandler
 311    .thumb_set EXTI4_IRQHandler,Default_Handler
 312
 313    .weak      DMA1_Stream0_IRQHandler
 314    .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
 315
 316    .weak      DMA1_Stream1_IRQHandler
 317    .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
 318
 319    .weak      DMA1_Stream2_IRQHandler
 320    .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
 321
 322    .weak      DMA1_Stream3_IRQHandler
 323    .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
 324
 325    .weak      DMA1_Stream4_IRQHandler
 326    .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
 327
 328    .weak      DMA1_Stream5_IRQHandler
 329    .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
 330
 331    .weak      DMA1_Stream6_IRQHandler
 332    .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
 333
 334    .weak      ADC_IRQHandler
 335    .thumb_set ADC_IRQHandler,Default_Handler
 336
 337    .weak      CAN1_TX_IRQHandler
 338    .thumb_set CAN1_TX_IRQHandler,Default_Handler
 339
 340    .weak      CAN1_RX0_IRQHandler
 341    .thumb_set CAN1_RX0_IRQHandler,Default_Handler
 342
 343    .weak      CAN1_RX1_IRQHandler
 344    .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 345
 346    .weak      CAN1_SCE_IRQHandler
 347    .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 348
 349    .weak      EXTI9_5_IRQHandler
 350    .thumb_set EXTI9_5_IRQHandler,Default_Handler
 351
 352    .weak      TIM1_BRK_TIM9_IRQHandler
 353    .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
 354
 355    .weak      TIM1_UP_TIM10_IRQHandler
 356    .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
 357
 358    .weak      TIM1_TRG_COM_TIM11_IRQHandler
 359    .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
 360
 361    .weak      TIM1_CC_IRQHandler
 362    .thumb_set TIM1_CC_IRQHandler,Default_Handler
 363
 364    .weak      TIM2_IRQHandler
 365    .thumb_set TIM2_IRQHandler,Default_Handler
 366
 367    .weak      TIM3_IRQHandler
 368    .thumb_set TIM3_IRQHandler,Default_Handler
 369
 370    .weak      TIM4_IRQHandler
 371    .thumb_set TIM4_IRQHandler,Default_Handler
 372
 373    .weak      I2C1_EV_IRQHandler
 374    .thumb_set I2C1_EV_IRQHandler,Default_Handler
 375
 376    .weak      I2C1_ER_IRQHandler
 377    .thumb_set I2C1_ER_IRQHandler,Default_Handler
 378
 379    .weak      I2C2_EV_IRQHandler
 380    .thumb_set I2C2_EV_IRQHandler,Default_Handler
 381
 382    .weak      I2C2_ER_IRQHandler
 383    .thumb_set I2C2_ER_IRQHandler,Default_Handler
 384
 385    .weak      SPI1_IRQHandler
 386    .thumb_set SPI1_IRQHandler,Default_Handler
 387
 388    .weak      SPI2_IRQHandler
 389    .thumb_set SPI2_IRQHandler,Default_Handler
 390
 391    .weak      USART1_IRQHandler
 392    .thumb_set USART1_IRQHandler,Default_Handler
 393
 394    .weak      USART2_IRQHandler
 395    .thumb_set USART2_IRQHandler,Default_Handler
 396
 397    .weak      USART3_IRQHandler
 398    .thumb_set USART3_IRQHandler,Default_Handler
 399
 400    .weak      EXTI15_10_IRQHandler
 401    .thumb_set EXTI15_10_IRQHandler,Default_Handler
 402
 403    .weak      RTC_Alarm_IRQHandler
 404    .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 405
 406    .weak      OTG_FS_WKUP_IRQHandler
 407    .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
 408
 409    .weak      TIM8_BRK_TIM12_IRQHandler
 410    .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
 411
 412    .weak      TIM8_UP_TIM13_IRQHandler
 413    .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
 414
 415    .weak      TIM8_TRG_COM_TIM14_IRQHandler
 416    .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
 417
 418    .weak      TIM8_CC_IRQHandler
 419    .thumb_set TIM8_CC_IRQHandler,Default_Handler
 420
 421    .weak      DMA1_Stream7_IRQHandler
 422    .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
 423
 424    .weak      SDIO_IRQHandler
 425    .thumb_set SDIO_IRQHandler,Default_Handler
 426
 427    .weak      TIM5_IRQHandler
 428    .thumb_set TIM5_IRQHandler,Default_Handler
 429
 430    .weak      SPI3_IRQHandler
 431    .thumb_set SPI3_IRQHandler,Default_Handler
 432
 433    .weak      TIM6_IRQHandler
 434    .thumb_set TIM6_IRQHandler,Default_Handler
 435
 436    .weak      TIM7_IRQHandler
 437    .thumb_set TIM7_IRQHandler,Default_Handler
 438
 439    .weak      DMA2_Stream0_IRQHandler
 440    .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
 441
 442    .weak      DMA2_Stream1_IRQHandler
 443    .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
 444
 445    .weak      DMA2_Stream2_IRQHandler
 446    .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
 447
 448    .weak      DMA2_Stream3_IRQHandler
 449    .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
 450
 451    .weak      DMA2_Stream4_IRQHandler
 452    .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
 453
 454    .weak      DFSDM1_FLT0_IRQHandler
 455    .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
 456
 457    .weak      DFSDM1_FLT1_IRQHandler
 458    .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
 459
 460    .weak      CAN2_TX_IRQHandler
 461    .thumb_set CAN2_TX_IRQHandler,Default_Handler
 462
 463    .weak      CAN2_RX0_IRQHandler
 464    .thumb_set CAN2_RX0_IRQHandler,Default_Handler
 465
 466    .weak      CAN2_RX1_IRQHandler
 467    .thumb_set CAN2_RX1_IRQHandler,Default_Handler
 468
 469    .weak      CAN2_SCE_IRQHandler
 470    .thumb_set CAN2_SCE_IRQHandler,Default_Handler
 471
 472    .weak      OTG_FS_IRQHandler
 473    .thumb_set OTG_FS_IRQHandler,Default_Handler
 474
 475    .weak      DMA2_Stream5_IRQHandler
 476    .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
 477
 478    .weak      DMA2_Stream6_IRQHandler
 479    .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
 480
 481    .weak      DMA2_Stream7_IRQHandler
 482    .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
 483
 484    .weak      USART6_IRQHandler
 485    .thumb_set USART6_IRQHandler,Default_Handler
 486
 487    .weak      I2C3_EV_IRQHandler
 488    .thumb_set I2C3_EV_IRQHandler,Default_Handler
 489
 490    .weak      I2C3_ER_IRQHandler
 491    .thumb_set I2C3_ER_IRQHandler,Default_Handler
 492
 493    .weak      RNG_IRQHandler
 494    .thumb_set RNG_IRQHandler,Default_Handler
 495
 496    .weak      FPU_IRQHandler
 497    .thumb_set FPU_IRQHandler,Default_Handler
 498
 499    .weak      SPI4_IRQHandler
 500    .thumb_set SPI4_IRQHandler,Default_Handler
 501
 502    .weak      SPI5_IRQHandler
 503    .thumb_set SPI5_IRQHandler,Default_Handler
 504
 505    .weak     FMPI2C1_EV_IRQHandler
 506    .thumb_set FMPI2C1_EV_IRQHandler,Default_Handler
 507
 508    .weak      FMPI2C1_ER_IRQHandler
 509    .thumb_set FMPI2C1_ER_IRQHandler,Default_Handler