1 #!armclang --target=arm-arm-none-eabi -mcpu=cortex-m7 -E -x c
3 ** ###################################################################
4 ** Processors: MIMXRT1064CVJ5A
9 ** Compiler: Keil ARM C/C++ Compiler
10 ** Reference manual: IMXRT1064RM Rev.0.1, 12/2018 | IMXRT1064SRM Rev.3
11 ** Version: rev. 0.1, 2018-06-22
15 ** Linker file for the Keil ARM C/C++ Compiler
17 ** Copyright 2016 Freescale Semiconductor, Inc.
18 ** Copyright 2016-2021 NXP
19 ** All rights reserved.
21 ** SPDX-License-Identifier: BSD-3-Clause
24 ** mail: support@nxp.com
26 ** ###################################################################
29 #define m_interrupts_start 0x80000000
30 #define m_interrupts_size 0x00000400
32 #define m_text_start 0x80000400
33 #define m_text_size 0x001FFC00
35 #define m_qacode_start 0x00000000
36 #define m_qacode_size 0x00020000
38 #define m_data_start 0x20200000
39 #define m_data_size 0x000C0000
41 #define m_data2_start 0x20000000
42 #define m_data2_size 0x00020000
44 #define m_data3_start 0x80200000
45 #define m_data3_size 0x01C00000
47 #define m_ncache_start 0x81E00000
48 #define m_ncache_size 0x00200000
51 #if (defined(__stack_size__))
52 #define Stack_Size __stack_size__
54 #define Stack_Size 0x0400
57 #if (defined(__heap_size__))
58 #define Heap_Size __heap_size__
60 #define Heap_Size 0x0400
63 LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
64 VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
65 * (.isr_vector,+FIRST)
67 ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
71 VECTOR_RAM m_interrupts_start EMPTY 0 {
73 #if (defined(__heap_noncacheable__))
74 RW_m_data m_data_start m_data_size-Stack_Size { ; RW data
76 RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
79 * (*m_usb_dma_init_data)
80 * (*m_usb_dma_noninit_data)
82 #if (!defined(__heap_noncacheable__))
83 ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
86 ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
88 RW_m_ram_text m_qacode_start m_qacode_size { ;
91 RW_m_data2 m_data2_start m_data2_size { ;
94 #if (defined(__heap_noncacheable__))
95 RW_m_ncache m_ncache_start m_ncache_size - Heap_Size { ; ncache RW data
97 RW_m_ncache m_ncache_start m_ncache_size { ; ncache RW data
102 #if (defined(__heap_noncacheable__))
103 ARM_LIB_HEAP +0 EMPTY Heap_Size { ; Heap region growing up
105 RW_m_ncache_unused +0 EMPTY m_ncache_size-ImageLength(RW_m_ncache)-Heap_Size { ; Empty region added for MPU configuration
107 RW_m_ncache_unused +0 EMPTY m_ncache_size-ImageLength(RW_m_ncache) { ; Empty region added for MPU configuration