2 * Copyright (c) 2015-2021 Arm Limited. All rights reserved.
4 * SPDX-License-Identifier: Apache-2.0
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
10 * www.apache.org/licenses/LICENSE-2.0
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
18 * -----------------------------------------------------------------------------
22 * Project: CMSIS-Driver Validation
23 * Title: Serial Peripheral Interface Bus (SPI) driver validation
26 * -----------------------------------------------------------------------------
29 #ifndef DV_SPI_CONFIG_H_
30 #define DV_SPI_CONFIG_H_
32 //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
35 // <i> Serial Peripheral Interface Bus (SPI) driver validation configuration
36 // <o0> Driver_SPI# <0-255>
37 // <i> Choose the Driver_SPI# instance to test.
38 // <i> For example to test Driver_SPI0 select 0.
40 // <i> Test Mode, SPI Server and Tests configuration.
42 // <i> Select test mode: Loopback or SPI Server.
43 // <i> For Loopback test mode connect the MISO and MOSI lines directly.
44 // <i> Loopback test mode is used for basic driver functionality testing before using SPI Server test mode.
45 // <i> For SPI Server test mode connect: MISO, MOSI, SCK, SS and GND lines to the same lines on the SPI Server.
46 // <i> SPI Server test mode is used for extensive driver functionality testing.
50 // <i> SPI Server configuration.
51 // <i> Specifies the communication settings at which Driver Validation communicates with the SPI Server.
52 // <i> Fixed settings:
54 // <i> Clock / Frame Format: Clock Polarity 0, Clock Phase 0
56 // <i> Bit Order: MSB to LSB
58 // <i> Select mode of driving Slave Select line.
59 // <1=> Software Controlled
60 // <2=> Hardware Controlled
61 // <o3> Bus Speed <10000-1000000000>
62 // <i> Select bus speed setting (in bps) used by the SPI Server.
65 // <i> Tests configuration
66 // <h> Default settings
67 // <i> Default settings used for tests.
69 // <i> Select default mode of driving Slave Select line in tests.
70 // <i> This setting is used for all tests except the Data Exchange: Mode tests.
72 // <1=> Software Controlled
73 // <2=> Hardware Controlled
74 // <o6> Clock / Frame Format
75 // <i> Select default clock / frame format setting for tests.
76 // <i> This setting is used for all tests except the Data Exchange: Clock / Frame Format tests.
77 // <0=> Clock Polarity 0, Clock Phase 0
78 // <1=> Clock Polarity 0, Clock Phase 1
79 // <2=> Clock Polarity 1, Clock Phase 0
80 // <3=> Clock Polarity 1, Clock Phase 1
81 // <4=> Texas Instruments Frame Format
82 // <5=> National Semiconductor Microwire Frame Format
83 // <o7> Data Bits <1-32>
84 // <i> Select default data bits setting for tests.
85 // <i> This setting is used for all tests except the Data Exchange: Data Bits tests.
86 // <o8> Bit Order <0=> MSB to LSB <1=> LSB to MSB
87 // <i> Select default bit order setting for tests.
88 // <i> This setting is used for all tests except the Data Exchange: Bit Order tests.
89 // <o9> Bus Speed <10000-1000000000>
90 // <i> Select default bus speed setting for tests.
91 // <i> This setting is used for all tests except the Data Exchange: Bus Speed tests.
92 // <o10> Number of Items <1-1024>
93 // <i> Select default number of data items for tests.
94 // <i> This setting is used for all tests except the Data Exchange: Other: SPI_Number_Of_Items tests.
97 // <i> Bus speed tests configuration.
98 // <o11> Minimum Bus Speed <10000-1000000000>
99 // <i> Select minimum bus speed setting (in bps).
100 // <i> This setting is used only in SPI_Bus_Speed_Min test function.
101 // <o12> Maximum Bus Speed <10000-1000000000>
102 // <i> Select maximum bus speed setting (in bps).
103 // <i> This setting is used only in SPI_Bus_Speed_Max test function.
105 // <h> Number of Items
106 // <i> Number of items test configuration.
107 // <i> This setting is used only in SPI_Number_Of_Items test function.
108 // <i> (Value 0 means setting is not used)
109 // <o13> Number of Items 1 <0-1024>
110 // <o14> Number of Items 2 <0-1024>
111 // <o15> Number of Items 3 <0-1024>
112 // <o16> Number of Items 4 <0-1024>
113 // <o17> Number of Items 5 <0-1024>
118 // <i> Enable / disable tests.
119 // <e19> Driver Management
120 // <i> Enable / disable driver management tests (functions: GetVersion, GetCapabilities, Initialize, Uninitialize, PowerControl).
121 // <q20> SPI_GetVersion
122 // <i> Enable / disable GetVersion function tests.
123 // <q21> SPI_GetCapabilities
124 // <i> Enable / disable GetCapabilities function tests.
125 // <q22> SPI_Initialize_Uninitialize
126 // <i> Enable / disable Initialize and Uninitialize functions tests.
127 // <q23> SPI_PowerControl
128 // <i> Enable / disable PowerControl function tests.
130 // <e24> Data Exchange
131 // <i> Enable / disable data exchange tests (functions: Send, Receive, Transfer, GetDataCount, Control, GetStatus, SignalEvent).
133 // <i> Enable / disable SPI mode and Slave Select mode tests.
134 // <i> (for Loopback test mode only Master mode with Slave Select not used test is supported!)
135 // <q26> SPI_Mode_Master_SS_Unused
136 // <i> Enable / disable data exchange in Master mode with Slave Select not used test.
137 // <q27> SPI_Mode_Master_SS_Sw_Ctrl
138 // <i> Enable / disable data exchange in Master mode with Slave Select Software Controlled test.
139 // <q28> SPI_Mode_Master_SS_Hw_Ctrl_Out
140 // <i> Enable / disable data exchange in Master mode with Slave Select Hardware Controlled Output test.
141 // <q29> SPI_Mode_Master_SS_Hw_Mon_In
142 // <i> Enable / disable data exchange in Master mode with Slave Select Hardware Monitored Input test.
143 // <q30> SPI_Mode_Slave_SS_Hw_Mon
144 // <i> Enable / disable data exchange in Slave mode with Slave Select Hardware Monitored test.
145 // <q31> SPI_Mode_Slave_SS_Sw_Ctrl
146 // <i> Enable / disable data exchange in Slave mode with Slave Select Software Controlled test.
148 // <e32> Clock / Frame Format
149 // <i> Enable / disable clock / frame format tests.
150 // <i> (all of these tests are supported only in SPI Server test mode!)
151 // <q33> SPI_Format_Clock_Pol0_Pha0
152 // <i> Enable / disable data exchange with clock format: Polarity 0 / Phase 0 test.
153 // <q34> SPI_Format_Clock_Pol0_Pha1
154 // <i> Enable / disable data exchange with clock format: Polarity 0 / Phase 1 test.
155 // <q35> SPI_Format_Clock_Pol1_Pha0
156 // <i> Enable / disable data exchange with clock format: Polarity 1 / Phase 0 test.
157 // <q36> SPI_Format_Clock_Pol1_Pha1
158 // <i> Enable / disable data exchange with clock format: Polarity 1 / Phase 1 test.
159 // <q37> SPI_Format_Frame_TI
160 // <i> Enable / disable data exchange with Texas Instruments frame format test.
161 // <q38> SPI_Format_Frame_Microwire
162 // <i> Enable / disable data exchange with National Semiconductor Microwire frame format test.
165 // <i> Enable / disable data bits tests.
166 // <i> (for Loopback test mode only: 8, 16, 24, and 32 data bit tests are supported!)
167 // <o40.0> SPI_Data_Bits_1
168 // <i> Enable / disable data exchange with 1 bit per frame test.
169 // <o40.1> SPI_Data_Bits_2
170 // <i> Enable / disable data exchange with 2 bits per frame test.
171 // <o40.2> SPI_Data_Bits_3
172 // <i> Enable / disable data exchange with 3 bits per frame test.
173 // <o40.3> SPI_Data_Bits_4
174 // <i> Enable / disable data exchange with 4 bits per frame test.
175 // <o40.4> SPI_Data_Bits_5
176 // <i> Enable / disable data exchange with 5 bits per frame test.
177 // <o40.5> SPI_Data_Bits_6
178 // <i> Enable / disable data exchange with 6 bits per frame test.
179 // <o40.6> SPI_Data_Bits_7
180 // <i> Enable / disable data exchange with 7 bits per frame test.
181 // <o40.7> SPI_Data_Bits_8
182 // <i> Enable / disable data exchange with 8 bits per frame test.
183 // <o40.8> SPI_Data_Bits_9
184 // <i> Enable / disable data exchange with 9 bits per frame test.
185 // <o40.9> SPI_Data_Bits_10
186 // <i> Enable / disable data exchange with 10 bits per frame test.
187 // <o40.10> SPI_Data_Bits_11
188 // <i> Enable / disable data exchange with 11 bits per frame test.
189 // <o40.11> SPI_Data_Bits_12
190 // <i> Enable / disable data exchange with 12 bits per frame test.
191 // <o40.12> SPI_Data_Bits_13
192 // <i> Enable / disable data exchange with 13 bits per frame test.
193 // <o40.13> SPI_Data_Bits_14
194 // <i> Enable / disable data exchange with 14 bits per frame test.
195 // <o40.14> SPI_Data_Bits_15
196 // <i> Enable / disable data exchange with 15 bits per frame test.
197 // <o40.15> SPI_Data_Bits_16
198 // <i> Enable / disable data exchange with 16 bits per frame test.
199 // <o40.16> SPI_Data_Bits_17
200 // <i> Enable / disable data exchange with 17 bits per frame test.
201 // <o40.17> SPI_Data_Bits_18
202 // <i> Enable / disable data exchange with 18 bits per frame test.
203 // <o40.18> SPI_Data_Bits_19
204 // <i> Enable / disable data exchange with 19 bits per frame test.
205 // <o40.19> SPI_Data_Bits_20
206 // <i> Enable / disable data exchange with 20 bits per frame test.
207 // <o40.20> SPI_Data_Bits_21
208 // <i> Enable / disable data exchange with 21 bits per frame test.
209 // <o40.21> SPI_Data_Bits_22
210 // <i> Enable / disable data exchange with 22 bits per frame test.
211 // <o40.22> SPI_Data_Bits_23
212 // <i> Enable / disable data exchange with 23 bits per frame test.
213 // <o40.23> SPI_Data_Bits_24
214 // <i> Enable / disable data exchange with 24 bits per frame test.
215 // <o40.24> SPI_Data_Bits_25
216 // <i> Enable / disable data exchange with 25 bits per frame test.
217 // <o40.25> SPI_Data_Bits_26
218 // <i> Enable / disable data exchange with 26 bits per frame test.
219 // <o40.26> SPI_Data_Bits_27
220 // <i> Enable / disable data exchange with 27 bits per frame test.
221 // <o40.27> SPI_Data_Bits_28
222 // <i> Enable / disable data exchange with 28 bits per frame test.
223 // <o40.28> SPI_Data_Bits_29
224 // <i> Enable / disable data exchange with 29 bits per frame test.
225 // <o40.29> SPI_Data_Bits_30
226 // <i> Enable / disable data exchange with 30 bits per frame test.
227 // <o40.30> SPI_Data_Bits_31
228 // <i> Enable / disable data exchange with 31 bits per frame test.
229 // <o40.31> SPI_Data_Bits_32
230 // <i> Enable / disable data exchange with 32 bits per frame test.
233 // <i> Enable / disable bit order tests.
234 // <i> (all of these tests are supported only in SPI Server test mode!)
235 // <q42> SPI_Bit_Order_MSB_LSB
236 // <i> Enable / disable data exchange with bit order from MSB to LSB test.
237 // <q43> SPI_Bit_Order_LSB_MSB
238 // <i> Enable / disable data exchange with bit order from LSB to MSB test.
241 // <i> Enable / disable bus speeds tests.
242 // <q45> SPI_Bus_Speed_Min
243 // <i> Enable / disable data exchange at minimum supported bus speed test.
244 // <q46> SPI_Bus_Speed_Max
245 // <i> Enable / disable data exchange at maximum supported bus speed test.
248 // <i> Enable / disable other tests.
249 // <q48> SPI_Number_Of_Items
250 // <i> Enable / disable data exchange with different number of data items test.
251 // <q49> SPI_GetDataCount
252 // <i> Enable / disable GetDataCount count changing during data exchange test.
254 // <i> Enable / disable data exchange Abort test.
258 // <i> Enable / disable event signaling tests (function: SignalEvent).
259 // <i> (all of these tests are supported only in SPI Server test mode!)
260 // <q52> SPI_DataLost
261 // <i> Enable / disable ARM_SPI_EVENT_DATA_LOST event generation test.
262 // <q53> SPI_ModeFault
263 // <i> Enable / disable ARM_SPI_EVENT_MODE_FAULT event generation test.
269 #define SPI_CFG_TEST_MODE 1
270 #define SPI_CFG_SRV_SS_MODE 1
271 #define SPI_CFG_SRV_BUS_SPEED 1000000
272 #define SPI_CFG_SRV_CMD_TOUT 100
273 #define SPI_CFG_DEF_SS_MODE 1
274 #define SPI_CFG_DEF_FORMAT 0
275 #define SPI_CFG_DEF_DATA_BITS 8
276 #define SPI_CFG_DEF_BIT_ORDER 0
277 #define SPI_CFG_DEF_BUS_SPEED 1000000
278 #define SPI_CFG_DEF_NUM 512
279 #define SPI_CFG_MIN_BUS_SPEED 1000000
280 #define SPI_CFG_MAX_BUS_SPEED 10000000
281 #define SPI_CFG_NUM1 1
282 #define SPI_CFG_NUM2 31
283 #define SPI_CFG_NUM3 65
284 #define SPI_CFG_NUM4 1023
285 #define SPI_CFG_NUM5 1024
286 #define SPI_CFG_XFER_TIMEOUT 100
287 #define SPI_TG_DRIVER_MANAGEMENT_EN 1
288 #define SPI_TC_GET_VERSION_EN 1
289 #define SPI_TC_GET_CAPABILITIES_EN 1
290 #define SPI_TC_INIT_UNINIT_EN 1
291 #define SPI_TC_POWER_CONTROL_EN 1
292 #define SPI_TG_DATA_EXCHANGE_EN 1
293 #define SPI_TG_MODE_EN 1
294 #define SPI_TC_MASTER_UNUSED_EN 1
295 #define SPI_TC_MASTER_SW_EN 1
296 #define SPI_TC_MASTER_HW_OUT_EN 1
297 #define SPI_TC_MASTER_HW_IN_EN 1
298 #define SPI_TC_SLAVE_HW_EN 1
299 #define SPI_TC_SLAVE_SW_EN 1
300 #define SPI_TG_FORMAT_EN 1
301 #define SPI_TC_FORMAT_POL0_PHA0_EN 1
302 #define SPI_TC_FORMAT_POL0_PHA1_EN 1
303 #define SPI_TC_FORMAT_POL1_PHA0_EN 1
304 #define SPI_TC_FORMAT_POL1_PHA1_EN 1
305 #define SPI_TC_FORMAT_TI_EN 1
306 #define SPI_TC_FORMAT_MICROWIRE_EN 0
307 #define SPI_TG_DATA_BIT_EN 1
308 #define SPI_TC_DATA_BIT_EN_MASK 0x00008080
309 #define SPI_TG_BIT_ORDER_EN 1
310 #define SPI_TC_BIT_ORDER_MSB_LSB_EN 1
311 #define SPI_TC_BIT_ORDER_LSB_MSB_EN 1
312 #define SPI_TG_BUS_SPEED_EN 1
313 #define SPI_TC_BUS_SPEED_MIN_EN 1
314 #define SPI_TC_BUS_SPEED_MAX_EN 1
315 #define SPI_TG_OTHER_EN 1
316 #define SPI_TC_NUMBER_OF_ITEMS_EN 1
317 #define SPI_TC_GET_DATA_COUNT_EN 1
318 #define SPI_TC_ABORT_EN 1
319 #define SPI_TG_EVENT_EN 1
320 #define SPI_TC_DATA_LOST_EN 1
321 #define SPI_TC_MODE_FAULT_EN 1
323 #endif /* DV_SPI_CONFIG_H_ */