1 /***********************************************************************************************************************
2 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
3 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
4 **********************************************************************************************************************/
7 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
10 processor: MIMXRT1064xxxxA
11 package_id: MIMXRT1064DVL6A
13 processor_version: 6.0.2
16 - {pin_num: F14, pin_signal: GPIO_AD_B0_09, label: 'JTAG_TDI/J21[5]/ENET_RST/J22[5]', identifier: USER_LED}
17 - {pin_num: J12, pin_signal: GPIO_AD_B1_06, label: 'CSI_VSYNC/J35[18]/J22[2]/UART_TX', identifier: CSI_VSYNC;UART3_RXD;UART3_TXD}
18 - {pin_num: K10, pin_signal: GPIO_AD_B1_07, label: 'CSI_HSYNC/J35[16]/J22[1]/UART_RX', identifier: CSI_HSYNC;UART3_RXD}
19 - {pin_num: L6, pin_signal: WAKEUP, label: SD_PWREN, identifier: SD_PWREN;USER_BUTTON}
20 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
23 #include "fsl_common.h"
24 #include "fsl_iomuxc.h"
28 /* FUNCTION ************************************************************************************************************
30 * Function Name : BOARD_InitBootPins
31 * Description : Calls initialization functions.
33 * END ****************************************************************************************************************/
34 void BOARD_InitBootPins(void) {
41 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
43 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
45 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
48 /* FUNCTION ************************************************************************************************************
50 * Function Name : BOARD_InitPins
51 * Description : Configures pin routing and optionally pin electrical features.
53 * END ****************************************************************************************************************/
54 void BOARD_InitPins(void) {
59 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
60 BOARD_InitDEBUG_UARTPins:
61 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
63 - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
64 pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
65 - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
66 pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
67 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
70 /* FUNCTION ************************************************************************************************************
72 * Function Name : BOARD_InitDEBUG_UARTPins
73 * Description : Configures pin routing and optionally pin electrical features.
75 * END ****************************************************************************************************************/
76 void BOARD_InitDEBUG_UARTPins(void) {
77 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
80 IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
81 0U); /* Software Input On Field: Input Path is determined by functionality */
83 IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
84 0U); /* Software Input On Field: Input Path is determined by functionality */
86 IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
87 0x10B0U); /* Slew Rate Field: Slow Slew Rate
88 Drive Strength Field: R0/6
89 Speed Field: medium(100MHz)
90 Open Drain Enable Field: Open Drain Disabled
91 Pull / Keep Enable Field: Pull/Keeper Enabled
92 Pull / Keep Select Field: Keeper
93 Pull Up / Down Config. Field: 100K Ohm Pull Down
94 Hyst. Enable Field: Hysteresis Disabled */
96 IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
97 0x10B0U); /* Slew Rate Field: Slow Slew Rate
98 Drive Strength Field: R0/6
99 Speed Field: medium(100MHz)
100 Open Drain Enable Field: Open Drain Disabled
101 Pull / Keep Enable Field: Pull/Keeper Enabled
102 Pull / Keep Select Field: Keeper
103 Pull Up / Down Config. Field: 100K Ohm Pull Down
104 Hyst. Enable Field: Hysteresis Disabled */
109 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
111 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
113 - {pin_num: C2, peripheral: SEMC, signal: 'ADDR, 00', pin_signal: GPIO_EMC_09}
114 - {pin_num: G1, peripheral: SEMC, signal: 'ADDR, 01', pin_signal: GPIO_EMC_10}
115 - {pin_num: G3, peripheral: SEMC, signal: 'ADDR, 02', pin_signal: GPIO_EMC_11}
116 - {pin_num: H1, peripheral: SEMC, signal: 'ADDR, 03', pin_signal: GPIO_EMC_12}
117 - {pin_num: A6, peripheral: SEMC, signal: 'ADDR, 04', pin_signal: GPIO_EMC_13}
118 - {pin_num: B6, peripheral: SEMC, signal: 'ADDR, 05', pin_signal: GPIO_EMC_14}
119 - {pin_num: B1, peripheral: SEMC, signal: 'ADDR, 06', pin_signal: GPIO_EMC_15}
120 - {pin_num: A5, peripheral: SEMC, signal: 'ADDR, 07', pin_signal: GPIO_EMC_16}
121 - {pin_num: A4, peripheral: SEMC, signal: 'ADDR, 08', pin_signal: GPIO_EMC_17}
122 - {pin_num: B2, peripheral: SEMC, signal: 'ADDR, 09', pin_signal: GPIO_EMC_18}
123 - {pin_num: G2, peripheral: SEMC, signal: 'ADDR, 10', pin_signal: GPIO_EMC_23}
124 - {pin_num: B4, peripheral: SEMC, signal: 'ADDR, 11', pin_signal: GPIO_EMC_19}
125 - {pin_num: A3, peripheral: SEMC, signal: 'ADDR, 12', pin_signal: GPIO_EMC_20}
126 - {pin_num: C1, peripheral: SEMC, signal: 'BA, 0', pin_signal: GPIO_EMC_21}
127 - {pin_num: F1, peripheral: SEMC, signal: 'BA, 1', pin_signal: GPIO_EMC_22}
128 - {pin_num: D3, peripheral: SEMC, signal: semc_cas, pin_signal: GPIO_EMC_24}
129 - {pin_num: A2, peripheral: SEMC, signal: semc_cke, pin_signal: GPIO_EMC_27}
130 - {pin_num: B3, peripheral: SEMC, signal: semc_clk, pin_signal: GPIO_EMC_26}
131 - {pin_num: E3, peripheral: SEMC, signal: 'DATA, 00', pin_signal: GPIO_EMC_00}
132 - {pin_num: F3, peripheral: SEMC, signal: 'DATA, 01', pin_signal: GPIO_EMC_01}
133 - {pin_num: F4, peripheral: SEMC, signal: 'DATA, 02', pin_signal: GPIO_EMC_02}
134 - {pin_num: G4, peripheral: SEMC, signal: 'DATA, 03', pin_signal: GPIO_EMC_03}
135 - {pin_num: F2, peripheral: SEMC, signal: 'DATA, 04', pin_signal: GPIO_EMC_04}
136 - {pin_num: G5, peripheral: SEMC, signal: 'DATA, 05', pin_signal: GPIO_EMC_05}
137 - {pin_num: H5, peripheral: SEMC, signal: 'DATA, 06', pin_signal: GPIO_EMC_06}
138 - {pin_num: H4, peripheral: SEMC, signal: 'DATA, 07', pin_signal: GPIO_EMC_07}
139 - {pin_num: C6, peripheral: SEMC, signal: 'DATA, 08', pin_signal: GPIO_EMC_30}
140 - {pin_num: C5, peripheral: SEMC, signal: 'DATA, 09', pin_signal: GPIO_EMC_31}
141 - {pin_num: D5, peripheral: SEMC, signal: 'DATA, 10', pin_signal: GPIO_EMC_32}
142 - {pin_num: C4, peripheral: SEMC, signal: 'DATA, 11', pin_signal: GPIO_EMC_33}
143 - {pin_num: D4, peripheral: SEMC, signal: 'DATA, 12', pin_signal: GPIO_EMC_34}
144 - {pin_num: E5, peripheral: SEMC, signal: 'DATA, 13', pin_signal: GPIO_EMC_35}
145 - {pin_num: C3, peripheral: SEMC, signal: 'DATA, 14', pin_signal: GPIO_EMC_36}
146 - {pin_num: E4, peripheral: SEMC, signal: 'DATA, 15', pin_signal: GPIO_EMC_37}
147 - {pin_num: H3, peripheral: SEMC, signal: 'DM, 0', pin_signal: GPIO_EMC_08}
148 - {pin_num: D6, peripheral: SEMC, signal: 'DM, 1', pin_signal: GPIO_EMC_38}
149 - {pin_num: D2, peripheral: SEMC, signal: semc_ras, pin_signal: GPIO_EMC_25}
150 - {pin_num: D1, peripheral: SEMC, signal: semc_we, pin_signal: GPIO_EMC_28}
151 - {pin_num: E1, peripheral: SEMC, signal: 'CS, 0', pin_signal: GPIO_EMC_29}
152 - {pin_num: B7, peripheral: SEMC, signal: semc_dqs, pin_signal: GPIO_EMC_39}
153 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
156 /* FUNCTION ************************************************************************************************************
158 * Function Name : BOARD_InitSDRAMPins
159 * Description : Configures pin routing and optionally pin electrical features.
161 * END ****************************************************************************************************************/
162 void BOARD_InitSDRAMPins(void) {
163 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
166 IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */
167 0U); /* Software Input On Field: Input Path is determined by functionality */
169 IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 is configured as SEMC_DATA01 */
170 0U); /* Software Input On Field: Input Path is determined by functionality */
172 IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 is configured as SEMC_DATA02 */
173 0U); /* Software Input On Field: Input Path is determined by functionality */
175 IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 is configured as SEMC_DATA03 */
176 0U); /* Software Input On Field: Input Path is determined by functionality */
178 IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 is configured as SEMC_DATA04 */
179 0U); /* Software Input On Field: Input Path is determined by functionality */
181 IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 is configured as SEMC_DATA05 */
182 0U); /* Software Input On Field: Input Path is determined by functionality */
184 IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 is configured as SEMC_DATA06 */
185 0U); /* Software Input On Field: Input Path is determined by functionality */
187 IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 is configured as SEMC_DATA07 */
188 0U); /* Software Input On Field: Input Path is determined by functionality */
190 IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 is configured as SEMC_DM00 */
191 0U); /* Software Input On Field: Input Path is determined by functionality */
193 IOMUXC_GPIO_EMC_09_SEMC_ADDR00, /* GPIO_EMC_09 is configured as SEMC_ADDR00 */
194 0U); /* Software Input On Field: Input Path is determined by functionality */
196 IOMUXC_GPIO_EMC_10_SEMC_ADDR01, /* GPIO_EMC_10 is configured as SEMC_ADDR01 */
197 0U); /* Software Input On Field: Input Path is determined by functionality */
199 IOMUXC_GPIO_EMC_11_SEMC_ADDR02, /* GPIO_EMC_11 is configured as SEMC_ADDR02 */
200 0U); /* Software Input On Field: Input Path is determined by functionality */
202 IOMUXC_GPIO_EMC_12_SEMC_ADDR03, /* GPIO_EMC_12 is configured as SEMC_ADDR03 */
203 0U); /* Software Input On Field: Input Path is determined by functionality */
205 IOMUXC_GPIO_EMC_13_SEMC_ADDR04, /* GPIO_EMC_13 is configured as SEMC_ADDR04 */
206 0U); /* Software Input On Field: Input Path is determined by functionality */
208 IOMUXC_GPIO_EMC_14_SEMC_ADDR05, /* GPIO_EMC_14 is configured as SEMC_ADDR05 */
209 0U); /* Software Input On Field: Input Path is determined by functionality */
211 IOMUXC_GPIO_EMC_15_SEMC_ADDR06, /* GPIO_EMC_15 is configured as SEMC_ADDR06 */
212 0U); /* Software Input On Field: Input Path is determined by functionality */
214 IOMUXC_GPIO_EMC_16_SEMC_ADDR07, /* GPIO_EMC_16 is configured as SEMC_ADDR07 */
215 0U); /* Software Input On Field: Input Path is determined by functionality */
217 IOMUXC_GPIO_EMC_17_SEMC_ADDR08, /* GPIO_EMC_17 is configured as SEMC_ADDR08 */
218 0U); /* Software Input On Field: Input Path is determined by functionality */
220 IOMUXC_GPIO_EMC_18_SEMC_ADDR09, /* GPIO_EMC_18 is configured as SEMC_ADDR09 */
221 0U); /* Software Input On Field: Input Path is determined by functionality */
223 IOMUXC_GPIO_EMC_19_SEMC_ADDR11, /* GPIO_EMC_19 is configured as SEMC_ADDR11 */
224 0U); /* Software Input On Field: Input Path is determined by functionality */
226 IOMUXC_GPIO_EMC_20_SEMC_ADDR12, /* GPIO_EMC_20 is configured as SEMC_ADDR12 */
227 0U); /* Software Input On Field: Input Path is determined by functionality */
229 IOMUXC_GPIO_EMC_21_SEMC_BA0, /* GPIO_EMC_21 is configured as SEMC_BA0 */
230 0U); /* Software Input On Field: Input Path is determined by functionality */
232 IOMUXC_GPIO_EMC_22_SEMC_BA1, /* GPIO_EMC_22 is configured as SEMC_BA1 */
233 0U); /* Software Input On Field: Input Path is determined by functionality */
235 IOMUXC_GPIO_EMC_23_SEMC_ADDR10, /* GPIO_EMC_23 is configured as SEMC_ADDR10 */
236 0U); /* Software Input On Field: Input Path is determined by functionality */
238 IOMUXC_GPIO_EMC_24_SEMC_CAS, /* GPIO_EMC_24 is configured as SEMC_CAS */
239 0U); /* Software Input On Field: Input Path is determined by functionality */
241 IOMUXC_GPIO_EMC_25_SEMC_RAS, /* GPIO_EMC_25 is configured as SEMC_RAS */
242 0U); /* Software Input On Field: Input Path is determined by functionality */
244 IOMUXC_GPIO_EMC_26_SEMC_CLK, /* GPIO_EMC_26 is configured as SEMC_CLK */
245 0U); /* Software Input On Field: Input Path is determined by functionality */
247 IOMUXC_GPIO_EMC_27_SEMC_CKE, /* GPIO_EMC_27 is configured as SEMC_CKE */
248 0U); /* Software Input On Field: Input Path is determined by functionality */
250 IOMUXC_GPIO_EMC_28_SEMC_WE, /* GPIO_EMC_28 is configured as SEMC_WE */
251 0U); /* Software Input On Field: Input Path is determined by functionality */
253 IOMUXC_GPIO_EMC_29_SEMC_CS0, /* GPIO_EMC_29 is configured as SEMC_CS0 */
254 0U); /* Software Input On Field: Input Path is determined by functionality */
256 IOMUXC_GPIO_EMC_30_SEMC_DATA08, /* GPIO_EMC_30 is configured as SEMC_DATA08 */
257 0U); /* Software Input On Field: Input Path is determined by functionality */
259 IOMUXC_GPIO_EMC_31_SEMC_DATA09, /* GPIO_EMC_31 is configured as SEMC_DATA09 */
260 0U); /* Software Input On Field: Input Path is determined by functionality */
262 IOMUXC_GPIO_EMC_32_SEMC_DATA10, /* GPIO_EMC_32 is configured as SEMC_DATA10 */
263 0U); /* Software Input On Field: Input Path is determined by functionality */
265 IOMUXC_GPIO_EMC_33_SEMC_DATA11, /* GPIO_EMC_33 is configured as SEMC_DATA11 */
266 0U); /* Software Input On Field: Input Path is determined by functionality */
268 IOMUXC_GPIO_EMC_34_SEMC_DATA12, /* GPIO_EMC_34 is configured as SEMC_DATA12 */
269 0U); /* Software Input On Field: Input Path is determined by functionality */
271 IOMUXC_GPIO_EMC_35_SEMC_DATA13, /* GPIO_EMC_35 is configured as SEMC_DATA13 */
272 0U); /* Software Input On Field: Input Path is determined by functionality */
274 IOMUXC_GPIO_EMC_36_SEMC_DATA14, /* GPIO_EMC_36 is configured as SEMC_DATA14 */
275 0U); /* Software Input On Field: Input Path is determined by functionality */
277 IOMUXC_GPIO_EMC_37_SEMC_DATA15, /* GPIO_EMC_37 is configured as SEMC_DATA15 */
278 0U); /* Software Input On Field: Input Path is determined by functionality */
280 IOMUXC_GPIO_EMC_38_SEMC_DM01, /* GPIO_EMC_38 is configured as SEMC_DM01 */
281 0U); /* Software Input On Field: Input Path is determined by functionality */
283 IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 is configured as SEMC_DQS */
284 0U); /* Software Input On Field: Input Path is determined by functionality */
289 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
291 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
293 - {pin_num: H13, peripheral: CSI, signal: 'csi_data, 09', pin_signal: GPIO_AD_B1_08}
294 - {pin_num: M13, peripheral: CSI, signal: 'csi_data, 08', pin_signal: GPIO_AD_B1_09}
295 - {pin_num: L13, peripheral: CSI, signal: 'csi_data, 07', pin_signal: GPIO_AD_B1_10}
296 - {pin_num: J13, peripheral: CSI, signal: 'csi_data, 06', pin_signal: GPIO_AD_B1_11}
297 - {pin_num: H12, peripheral: CSI, signal: 'csi_data, 05', pin_signal: GPIO_AD_B1_12}
298 - {pin_num: H11, peripheral: CSI, signal: 'csi_data, 04', pin_signal: GPIO_AD_B1_13}
299 - {pin_num: J14, peripheral: CSI, signal: 'csi_data, 02', pin_signal: GPIO_AD_B1_15}
300 - {pin_num: G12, peripheral: CSI, signal: 'csi_data, 03', pin_signal: GPIO_AD_B1_14}
301 - {pin_num: L12, peripheral: CSI, signal: csi_pixclk, pin_signal: GPIO_AD_B1_04}
302 - {pin_num: K12, peripheral: CSI, signal: csi_mclk, pin_signal: GPIO_AD_B1_05}
303 - {pin_num: J12, peripheral: CSI, signal: csi_vsync, pin_signal: GPIO_AD_B1_06, identifier: CSI_VSYNC}
304 - {pin_num: K10, peripheral: CSI, signal: csi_hsync, pin_signal: GPIO_AD_B1_07, identifier: CSI_HSYNC}
305 - {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00, identifier: CSI_I2C_SCL, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_22K_Ohm,
306 pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
307 - {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01, identifier: CSI_I2C_SDA, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_22K_Ohm,
308 pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
309 - {pin_num: F11, peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04}
310 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
313 /* FUNCTION ************************************************************************************************************
315 * Function Name : BOARD_InitCSIPins
316 * Description : Configures pin routing and optionally pin electrical features.
318 * END ****************************************************************************************************************/
319 void BOARD_InitCSIPins(void) {
320 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
323 IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, /* GPIO_AD_B0_04 is configured as GPIO1_IO04 */
324 0U); /* Software Input On Field: Input Path is determined by functionality */
326 IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */
327 0U); /* Software Input On Field: Input Path is determined by functionality */
329 IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, /* GPIO_AD_B1_01 is configured as LPI2C1_SDA */
330 0U); /* Software Input On Field: Input Path is determined by functionality */
332 IOMUXC_GPIO_AD_B1_04_CSI_PIXCLK, /* GPIO_AD_B1_04 is configured as CSI_PIXCLK */
333 0U); /* Software Input On Field: Input Path is determined by functionality */
335 IOMUXC_GPIO_AD_B1_05_CSI_MCLK, /* GPIO_AD_B1_05 is configured as CSI_MCLK */
336 0U); /* Software Input On Field: Input Path is determined by functionality */
338 IOMUXC_GPIO_AD_B1_06_CSI_VSYNC, /* GPIO_AD_B1_06 is configured as CSI_VSYNC */
339 0U); /* Software Input On Field: Input Path is determined by functionality */
341 IOMUXC_GPIO_AD_B1_07_CSI_HSYNC, /* GPIO_AD_B1_07 is configured as CSI_HSYNC */
342 0U); /* Software Input On Field: Input Path is determined by functionality */
344 IOMUXC_GPIO_AD_B1_08_CSI_DATA09, /* GPIO_AD_B1_08 is configured as CSI_DATA09 */
345 0U); /* Software Input On Field: Input Path is determined by functionality */
347 IOMUXC_GPIO_AD_B1_09_CSI_DATA08, /* GPIO_AD_B1_09 is configured as CSI_DATA08 */
348 0U); /* Software Input On Field: Input Path is determined by functionality */
350 IOMUXC_GPIO_AD_B1_10_CSI_DATA07, /* GPIO_AD_B1_10 is configured as CSI_DATA07 */
351 0U); /* Software Input On Field: Input Path is determined by functionality */
353 IOMUXC_GPIO_AD_B1_11_CSI_DATA06, /* GPIO_AD_B1_11 is configured as CSI_DATA06 */
354 0U); /* Software Input On Field: Input Path is determined by functionality */
356 IOMUXC_GPIO_AD_B1_12_CSI_DATA05, /* GPIO_AD_B1_12 is configured as CSI_DATA05 */
357 0U); /* Software Input On Field: Input Path is determined by functionality */
359 IOMUXC_GPIO_AD_B1_13_CSI_DATA04, /* GPIO_AD_B1_13 is configured as CSI_DATA04 */
360 0U); /* Software Input On Field: Input Path is determined by functionality */
362 IOMUXC_GPIO_AD_B1_14_CSI_DATA03, /* GPIO_AD_B1_14 is configured as CSI_DATA03 */
363 0U); /* Software Input On Field: Input Path is determined by functionality */
365 IOMUXC_GPIO_AD_B1_15_CSI_DATA02, /* GPIO_AD_B1_15 is configured as CSI_DATA02 */
366 0U); /* Software Input On Field: Input Path is determined by functionality */
367 IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
368 (~(IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
369 | IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U) /* GPIO1 and GPIO6 share same IO MUX function, GPIO_MUX1 selects one GPIO function: 0x00U */
372 IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, /* GPIO_AD_B1_00 PAD functional properties : */
373 0xD8B0U); /* Slew Rate Field: Slow Slew Rate
374 Drive Strength Field: R0/6
375 Speed Field: medium(100MHz)
376 Open Drain Enable Field: Open Drain Enabled
377 Pull / Keep Enable Field: Pull/Keeper Enabled
378 Pull / Keep Select Field: Keeper
379 Pull Up / Down Config. Field: 22K Ohm Pull Up
380 Hyst. Enable Field: Hysteresis Disabled */
382 IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, /* GPIO_AD_B1_01 PAD functional properties : */
383 0xD8B0U); /* Slew Rate Field: Slow Slew Rate
384 Drive Strength Field: R0/6
385 Speed Field: medium(100MHz)
386 Open Drain Enable Field: Open Drain Enabled
387 Pull / Keep Enable Field: Pull/Keeper Enabled
388 Pull / Keep Select Field: Keeper
389 Pull Up / Down Config. Field: 22K Ohm Pull Up
390 Hyst. Enable Field: Hysteresis Disabled */
395 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
397 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
399 - {pin_num: C8, peripheral: LCDIF, signal: 'lcdif_data, 00', pin_signal: GPIO_B0_04, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
400 - {pin_num: B8, peripheral: LCDIF, signal: 'lcdif_data, 01', pin_signal: GPIO_B0_05, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
401 - {pin_num: A8, peripheral: LCDIF, signal: 'lcdif_data, 02', pin_signal: GPIO_B0_06, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
402 - {pin_num: D7, peripheral: LCDIF, signal: lcdif_clk, pin_signal: GPIO_B0_00, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
403 - {pin_num: A9, peripheral: LCDIF, signal: 'lcdif_data, 03', pin_signal: GPIO_B0_07, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
404 - {pin_num: B9, peripheral: LCDIF, signal: 'lcdif_data, 04', pin_signal: GPIO_B0_08, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
405 - {pin_num: C9, peripheral: LCDIF, signal: 'lcdif_data, 05', pin_signal: GPIO_B0_09, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
406 - {pin_num: D9, peripheral: LCDIF, signal: 'lcdif_data, 06', pin_signal: GPIO_B0_10, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
407 - {pin_num: A10, peripheral: LCDIF, signal: 'lcdif_data, 07', pin_signal: GPIO_B0_11, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
408 - {pin_num: C10, peripheral: LCDIF, signal: 'lcdif_data, 08', pin_signal: GPIO_B0_12, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
409 - {pin_num: D10, peripheral: LCDIF, signal: 'lcdif_data, 09', pin_signal: GPIO_B0_13, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
410 - {pin_num: E10, peripheral: LCDIF, signal: 'lcdif_data, 10', pin_signal: GPIO_B0_14, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
411 - {pin_num: E11, peripheral: LCDIF, signal: 'lcdif_data, 11', pin_signal: GPIO_B0_15, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
412 - {pin_num: A11, peripheral: LCDIF, signal: 'lcdif_data, 12', pin_signal: GPIO_B1_00, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
413 - {pin_num: B11, peripheral: LCDIF, signal: 'lcdif_data, 13', pin_signal: GPIO_B1_01, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
414 - {pin_num: C11, peripheral: LCDIF, signal: 'lcdif_data, 14', pin_signal: GPIO_B1_02, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
415 - {pin_num: D11, peripheral: LCDIF, signal: 'lcdif_data, 15', pin_signal: GPIO_B1_03, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
416 - {pin_num: E7, peripheral: LCDIF, signal: lcdif_enable, pin_signal: GPIO_B0_01, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
417 - {pin_num: E8, peripheral: LCDIF, signal: lcdif_hsync, pin_signal: GPIO_B0_02, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
418 - {pin_num: D8, peripheral: LCDIF, signal: lcdif_vsync, pin_signal: GPIO_B0_03, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull}
419 - {pin_num: B14, peripheral: GPIO2, signal: 'gpio_io, 31', pin_signal: GPIO_B1_15, slew_rate: Slow}
420 - {pin_num: M11, peripheral: GPIO1, signal: 'gpio_io, 02', pin_signal: GPIO_AD_B0_02}
421 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
424 /* FUNCTION ************************************************************************************************************
426 * Function Name : BOARD_InitLCDPins
427 * Description : Configures pin routing and optionally pin electrical features.
429 * END ****************************************************************************************************************/
430 void BOARD_InitLCDPins(void) {
431 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
434 IOMUXC_GPIO_AD_B0_02_GPIO1_IO02, /* GPIO_AD_B0_02 is configured as GPIO1_IO02 */
435 0U); /* Software Input On Field: Input Path is determined by functionality */
437 IOMUXC_GPIO_B0_00_LCD_CLK, /* GPIO_B0_00 is configured as LCD_CLK */
438 0U); /* Software Input On Field: Input Path is determined by functionality */
440 IOMUXC_GPIO_B0_01_LCD_ENABLE, /* GPIO_B0_01 is configured as LCD_ENABLE */
441 0U); /* Software Input On Field: Input Path is determined by functionality */
443 IOMUXC_GPIO_B0_02_LCD_HSYNC, /* GPIO_B0_02 is configured as LCD_HSYNC */
444 0U); /* Software Input On Field: Input Path is determined by functionality */
446 IOMUXC_GPIO_B0_03_LCD_VSYNC, /* GPIO_B0_03 is configured as LCD_VSYNC */
447 0U); /* Software Input On Field: Input Path is determined by functionality */
449 IOMUXC_GPIO_B0_04_LCD_DATA00, /* GPIO_B0_04 is configured as LCD_DATA00 */
450 0U); /* Software Input On Field: Input Path is determined by functionality */
452 IOMUXC_GPIO_B0_05_LCD_DATA01, /* GPIO_B0_05 is configured as LCD_DATA01 */
453 0U); /* Software Input On Field: Input Path is determined by functionality */
455 IOMUXC_GPIO_B0_06_LCD_DATA02, /* GPIO_B0_06 is configured as LCD_DATA02 */
456 0U); /* Software Input On Field: Input Path is determined by functionality */
458 IOMUXC_GPIO_B0_07_LCD_DATA03, /* GPIO_B0_07 is configured as LCD_DATA03 */
459 0U); /* Software Input On Field: Input Path is determined by functionality */
461 IOMUXC_GPIO_B0_08_LCD_DATA04, /* GPIO_B0_08 is configured as LCD_DATA04 */
462 0U); /* Software Input On Field: Input Path is determined by functionality */
464 IOMUXC_GPIO_B0_09_LCD_DATA05, /* GPIO_B0_09 is configured as LCD_DATA05 */
465 0U); /* Software Input On Field: Input Path is determined by functionality */
467 IOMUXC_GPIO_B0_10_LCD_DATA06, /* GPIO_B0_10 is configured as LCD_DATA06 */
468 0U); /* Software Input On Field: Input Path is determined by functionality */
470 IOMUXC_GPIO_B0_11_LCD_DATA07, /* GPIO_B0_11 is configured as LCD_DATA07 */
471 0U); /* Software Input On Field: Input Path is determined by functionality */
473 IOMUXC_GPIO_B0_12_LCD_DATA08, /* GPIO_B0_12 is configured as LCD_DATA08 */
474 0U); /* Software Input On Field: Input Path is determined by functionality */
476 IOMUXC_GPIO_B0_13_LCD_DATA09, /* GPIO_B0_13 is configured as LCD_DATA09 */
477 0U); /* Software Input On Field: Input Path is determined by functionality */
479 IOMUXC_GPIO_B0_14_LCD_DATA10, /* GPIO_B0_14 is configured as LCD_DATA10 */
480 0U); /* Software Input On Field: Input Path is determined by functionality */
482 IOMUXC_GPIO_B0_15_LCD_DATA11, /* GPIO_B0_15 is configured as LCD_DATA11 */
483 0U); /* Software Input On Field: Input Path is determined by functionality */
485 IOMUXC_GPIO_B1_00_LCD_DATA12, /* GPIO_B1_00 is configured as LCD_DATA12 */
486 0U); /* Software Input On Field: Input Path is determined by functionality */
488 IOMUXC_GPIO_B1_01_LCD_DATA13, /* GPIO_B1_01 is configured as LCD_DATA13 */
489 0U); /* Software Input On Field: Input Path is determined by functionality */
491 IOMUXC_GPIO_B1_02_LCD_DATA14, /* GPIO_B1_02 is configured as LCD_DATA14 */
492 0U); /* Software Input On Field: Input Path is determined by functionality */
494 IOMUXC_GPIO_B1_03_LCD_DATA15, /* GPIO_B1_03 is configured as LCD_DATA15 */
495 0U); /* Software Input On Field: Input Path is determined by functionality */
497 IOMUXC_GPIO_B1_15_GPIO2_IO31, /* GPIO_B1_15 is configured as GPIO2_IO31 */
498 0U); /* Software Input On Field: Input Path is determined by functionality */
499 IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
500 (~(IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
501 | IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U) /* GPIO1 and GPIO6 share same IO MUX function, GPIO_MUX1 selects one GPIO function: 0x00U */
503 IOMUXC_GPR->GPR27 = ((IOMUXC_GPR->GPR27 &
504 (~(IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
505 | IOMUXC_GPR_GPR27_GPIO_MUX2_GPIO_SEL(0x00U) /* GPIO2 and GPIO7 share same IO MUX function, GPIO_MUX2 selects one GPIO function: 0x00U */
508 IOMUXC_GPIO_B0_00_LCD_CLK, /* GPIO_B0_00 PAD functional properties : */
509 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
510 Drive Strength Field: R0/6
511 Speed Field: medium(100MHz)
512 Open Drain Enable Field: Open Drain Disabled
513 Pull / Keep Enable Field: Pull/Keeper Enabled
514 Pull / Keep Select Field: Pull
515 Pull Up / Down Config. Field: 100K Ohm Pull Up
516 Hyst. Enable Field: Hysteresis Enabled */
518 IOMUXC_GPIO_B0_01_LCD_ENABLE, /* GPIO_B0_01 PAD functional properties : */
519 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
520 Drive Strength Field: R0/6
521 Speed Field: medium(100MHz)
522 Open Drain Enable Field: Open Drain Disabled
523 Pull / Keep Enable Field: Pull/Keeper Enabled
524 Pull / Keep Select Field: Pull
525 Pull Up / Down Config. Field: 100K Ohm Pull Up
526 Hyst. Enable Field: Hysteresis Enabled */
528 IOMUXC_GPIO_B0_02_LCD_HSYNC, /* GPIO_B0_02 PAD functional properties : */
529 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
530 Drive Strength Field: R0/6
531 Speed Field: medium(100MHz)
532 Open Drain Enable Field: Open Drain Disabled
533 Pull / Keep Enable Field: Pull/Keeper Enabled
534 Pull / Keep Select Field: Pull
535 Pull Up / Down Config. Field: 100K Ohm Pull Up
536 Hyst. Enable Field: Hysteresis Enabled */
538 IOMUXC_GPIO_B0_03_LCD_VSYNC, /* GPIO_B0_03 PAD functional properties : */
539 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
540 Drive Strength Field: R0/6
541 Speed Field: medium(100MHz)
542 Open Drain Enable Field: Open Drain Disabled
543 Pull / Keep Enable Field: Pull/Keeper Enabled
544 Pull / Keep Select Field: Pull
545 Pull Up / Down Config. Field: 100K Ohm Pull Up
546 Hyst. Enable Field: Hysteresis Enabled */
548 IOMUXC_GPIO_B0_04_LCD_DATA00, /* GPIO_B0_04 PAD functional properties : */
549 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
550 Drive Strength Field: R0/6
551 Speed Field: medium(100MHz)
552 Open Drain Enable Field: Open Drain Disabled
553 Pull / Keep Enable Field: Pull/Keeper Enabled
554 Pull / Keep Select Field: Pull
555 Pull Up / Down Config. Field: 100K Ohm Pull Up
556 Hyst. Enable Field: Hysteresis Enabled */
558 IOMUXC_GPIO_B0_05_LCD_DATA01, /* GPIO_B0_05 PAD functional properties : */
559 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
560 Drive Strength Field: R0/6
561 Speed Field: medium(100MHz)
562 Open Drain Enable Field: Open Drain Disabled
563 Pull / Keep Enable Field: Pull/Keeper Enabled
564 Pull / Keep Select Field: Pull
565 Pull Up / Down Config. Field: 100K Ohm Pull Up
566 Hyst. Enable Field: Hysteresis Enabled */
568 IOMUXC_GPIO_B0_06_LCD_DATA02, /* GPIO_B0_06 PAD functional properties : */
569 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
570 Drive Strength Field: R0/6
571 Speed Field: medium(100MHz)
572 Open Drain Enable Field: Open Drain Disabled
573 Pull / Keep Enable Field: Pull/Keeper Enabled
574 Pull / Keep Select Field: Pull
575 Pull Up / Down Config. Field: 100K Ohm Pull Up
576 Hyst. Enable Field: Hysteresis Enabled */
578 IOMUXC_GPIO_B0_07_LCD_DATA03, /* GPIO_B0_07 PAD functional properties : */
579 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
580 Drive Strength Field: R0/6
581 Speed Field: medium(100MHz)
582 Open Drain Enable Field: Open Drain Disabled
583 Pull / Keep Enable Field: Pull/Keeper Enabled
584 Pull / Keep Select Field: Pull
585 Pull Up / Down Config. Field: 100K Ohm Pull Up
586 Hyst. Enable Field: Hysteresis Enabled */
588 IOMUXC_GPIO_B0_08_LCD_DATA04, /* GPIO_B0_08 PAD functional properties : */
589 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
590 Drive Strength Field: R0/6
591 Speed Field: medium(100MHz)
592 Open Drain Enable Field: Open Drain Disabled
593 Pull / Keep Enable Field: Pull/Keeper Enabled
594 Pull / Keep Select Field: Pull
595 Pull Up / Down Config. Field: 100K Ohm Pull Up
596 Hyst. Enable Field: Hysteresis Enabled */
598 IOMUXC_GPIO_B0_09_LCD_DATA05, /* GPIO_B0_09 PAD functional properties : */
599 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
600 Drive Strength Field: R0/6
601 Speed Field: medium(100MHz)
602 Open Drain Enable Field: Open Drain Disabled
603 Pull / Keep Enable Field: Pull/Keeper Enabled
604 Pull / Keep Select Field: Pull
605 Pull Up / Down Config. Field: 100K Ohm Pull Up
606 Hyst. Enable Field: Hysteresis Enabled */
608 IOMUXC_GPIO_B0_10_LCD_DATA06, /* GPIO_B0_10 PAD functional properties : */
609 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
610 Drive Strength Field: R0/6
611 Speed Field: medium(100MHz)
612 Open Drain Enable Field: Open Drain Disabled
613 Pull / Keep Enable Field: Pull/Keeper Enabled
614 Pull / Keep Select Field: Pull
615 Pull Up / Down Config. Field: 100K Ohm Pull Up
616 Hyst. Enable Field: Hysteresis Enabled */
618 IOMUXC_GPIO_B0_11_LCD_DATA07, /* GPIO_B0_11 PAD functional properties : */
619 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
620 Drive Strength Field: R0/6
621 Speed Field: medium(100MHz)
622 Open Drain Enable Field: Open Drain Disabled
623 Pull / Keep Enable Field: Pull/Keeper Enabled
624 Pull / Keep Select Field: Pull
625 Pull Up / Down Config. Field: 100K Ohm Pull Up
626 Hyst. Enable Field: Hysteresis Enabled */
628 IOMUXC_GPIO_B0_12_LCD_DATA08, /* GPIO_B0_12 PAD functional properties : */
629 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
630 Drive Strength Field: R0/6
631 Speed Field: medium(100MHz)
632 Open Drain Enable Field: Open Drain Disabled
633 Pull / Keep Enable Field: Pull/Keeper Enabled
634 Pull / Keep Select Field: Pull
635 Pull Up / Down Config. Field: 100K Ohm Pull Up
636 Hyst. Enable Field: Hysteresis Enabled */
638 IOMUXC_GPIO_B0_13_LCD_DATA09, /* GPIO_B0_13 PAD functional properties : */
639 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
640 Drive Strength Field: R0/6
641 Speed Field: medium(100MHz)
642 Open Drain Enable Field: Open Drain Disabled
643 Pull / Keep Enable Field: Pull/Keeper Enabled
644 Pull / Keep Select Field: Pull
645 Pull Up / Down Config. Field: 100K Ohm Pull Up
646 Hyst. Enable Field: Hysteresis Enabled */
648 IOMUXC_GPIO_B0_14_LCD_DATA10, /* GPIO_B0_14 PAD functional properties : */
649 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
650 Drive Strength Field: R0/6
651 Speed Field: medium(100MHz)
652 Open Drain Enable Field: Open Drain Disabled
653 Pull / Keep Enable Field: Pull/Keeper Enabled
654 Pull / Keep Select Field: Pull
655 Pull Up / Down Config. Field: 100K Ohm Pull Up
656 Hyst. Enable Field: Hysteresis Enabled */
658 IOMUXC_GPIO_B0_15_LCD_DATA11, /* GPIO_B0_15 PAD functional properties : */
659 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
660 Drive Strength Field: R0/6
661 Speed Field: medium(100MHz)
662 Open Drain Enable Field: Open Drain Disabled
663 Pull / Keep Enable Field: Pull/Keeper Enabled
664 Pull / Keep Select Field: Pull
665 Pull Up / Down Config. Field: 100K Ohm Pull Up
666 Hyst. Enable Field: Hysteresis Enabled */
668 IOMUXC_GPIO_B1_00_LCD_DATA12, /* GPIO_B1_00 PAD functional properties : */
669 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
670 Drive Strength Field: R0/6
671 Speed Field: medium(100MHz)
672 Open Drain Enable Field: Open Drain Disabled
673 Pull / Keep Enable Field: Pull/Keeper Enabled
674 Pull / Keep Select Field: Pull
675 Pull Up / Down Config. Field: 100K Ohm Pull Up
676 Hyst. Enable Field: Hysteresis Enabled */
678 IOMUXC_GPIO_B1_01_LCD_DATA13, /* GPIO_B1_01 PAD functional properties : */
679 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
680 Drive Strength Field: R0/6
681 Speed Field: medium(100MHz)
682 Open Drain Enable Field: Open Drain Disabled
683 Pull / Keep Enable Field: Pull/Keeper Enabled
684 Pull / Keep Select Field: Pull
685 Pull Up / Down Config. Field: 100K Ohm Pull Up
686 Hyst. Enable Field: Hysteresis Enabled */
688 IOMUXC_GPIO_B1_02_LCD_DATA14, /* GPIO_B1_02 PAD functional properties : */
689 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
690 Drive Strength Field: R0/6
691 Speed Field: medium(100MHz)
692 Open Drain Enable Field: Open Drain Disabled
693 Pull / Keep Enable Field: Pull/Keeper Enabled
694 Pull / Keep Select Field: Pull
695 Pull Up / Down Config. Field: 100K Ohm Pull Up
696 Hyst. Enable Field: Hysteresis Enabled */
698 IOMUXC_GPIO_B1_03_LCD_DATA15, /* GPIO_B1_03 PAD functional properties : */
699 0x01B0B0U); /* Slew Rate Field: Slow Slew Rate
700 Drive Strength Field: R0/6
701 Speed Field: medium(100MHz)
702 Open Drain Enable Field: Open Drain Disabled
703 Pull / Keep Enable Field: Pull/Keeper Enabled
704 Pull / Keep Select Field: Pull
705 Pull Up / Down Config. Field: 100K Ohm Pull Up
706 Hyst. Enable Field: Hysteresis Enabled */
708 IOMUXC_GPIO_B1_15_GPIO2_IO31, /* GPIO_B1_15 PAD functional properties : */
709 0x10B0U); /* Slew Rate Field: Slow Slew Rate
710 Drive Strength Field: R0/6
711 Speed Field: medium(100MHz)
712 Open Drain Enable Field: Open Drain Disabled
713 Pull / Keep Enable Field: Pull/Keeper Enabled
714 Pull / Keep Select Field: Keeper
715 Pull Up / Down Config. Field: 100K Ohm Pull Down
716 Hyst. Enable Field: Hysteresis Disabled */
721 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
723 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
725 - {pin_num: H14, peripheral: CAN2, signal: TX, pin_signal: GPIO_AD_B0_14}
726 - {pin_num: L10, peripheral: CAN2, signal: RX, pin_signal: GPIO_AD_B0_15}
727 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
730 /* FUNCTION ************************************************************************************************************
732 * Function Name : BOARD_InitCANPins
733 * Description : Configures pin routing and optionally pin electrical features.
735 * END ****************************************************************************************************************/
736 void BOARD_InitCANPins(void) {
737 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
740 IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, /* GPIO_AD_B0_14 is configured as FLEXCAN2_TX */
741 0U); /* Software Input On Field: Input Path is determined by functionality */
743 IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, /* GPIO_AD_B0_15 is configured as FLEXCAN2_RX */
744 0U); /* Software Input On Field: Input Path is determined by functionality */
749 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
751 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
753 - {pin_num: A7, peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_40, pull_keeper_enable: Disable, slew_rate: Fast}
754 - {pin_num: C7, peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_41, pull_keeper_enable: Disable, slew_rate: Fast}
755 - {pin_num: B13, peripheral: ENET, signal: enet_ref_clk, pin_signal: GPIO_B1_10, pull_keeper_enable: Disable, slew_rate: Fast}
756 - {pin_num: E12, peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_B1_04, pull_keeper_enable: Disable, slew_rate: Fast}
757 - {pin_num: D12, peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_B1_05, pull_keeper_enable: Disable, slew_rate: Fast}
758 - {pin_num: C12, peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_B1_06, pull_keeper_enable: Disable, slew_rate: Fast}
759 - {pin_num: C13, peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_B1_11, pull_keeper_enable: Disable, slew_rate: Fast}
760 - {pin_num: B12, peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_B1_07, pull_keeper_enable: Disable, slew_rate: Fast}
761 - {pin_num: A12, peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_B1_08, pull_keeper_enable: Disable, slew_rate: Fast}
762 - {pin_num: A13, peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_B1_09, pull_keeper_enable: Disable, slew_rate: Fast}
763 - {pin_num: G13, peripheral: GPIO1, signal: 'gpio_io, 10', pin_signal: GPIO_AD_B0_10}
764 - {pin_num: F14, peripheral: GPIO1, signal: 'gpio_io, 09', pin_signal: GPIO_AD_B0_09}
765 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
768 /* FUNCTION ************************************************************************************************************
770 * Function Name : BOARD_InitENETPins
771 * Description : Configures pin routing and optionally pin electrical features.
773 * END ****************************************************************************************************************/
774 void BOARD_InitENETPins(void) {
775 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
778 IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
779 0U); /* Software Input On Field: Input Path is determined by functionality */
781 IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 is configured as GPIO1_IO10 */
782 0U); /* Software Input On Field: Input Path is determined by functionality */
784 IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 is configured as ENET_RX_DATA00 */
785 0U); /* Software Input On Field: Input Path is determined by functionality */
787 IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 is configured as ENET_RX_DATA01 */
788 0U); /* Software Input On Field: Input Path is determined by functionality */
790 IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 is configured as ENET_RX_EN */
791 0U); /* Software Input On Field: Input Path is determined by functionality */
793 IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 is configured as ENET_TX_DATA00 */
794 0U); /* Software Input On Field: Input Path is determined by functionality */
796 IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 is configured as ENET_TX_DATA01 */
797 0U); /* Software Input On Field: Input Path is determined by functionality */
799 IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 is configured as ENET_TX_EN */
800 0U); /* Software Input On Field: Input Path is determined by functionality */
802 IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 is configured as ENET_REF_CLK */
803 0U); /* Software Input On Field: Input Path is determined by functionality */
805 IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 is configured as ENET_RX_ER */
806 0U); /* Software Input On Field: Input Path is determined by functionality */
808 IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 is configured as ENET_MDC */
809 0U); /* Software Input On Field: Input Path is determined by functionality */
811 IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 is configured as ENET_MDIO */
812 0U); /* Software Input On Field: Input Path is determined by functionality */
813 IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
814 (~(IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
815 | IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U) /* GPIO1 and GPIO6 share same IO MUX function, GPIO_MUX1 selects one GPIO function: 0x00U */
818 IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 PAD functional properties : */
819 0xB1U); /* Slew Rate Field: Fast Slew Rate
820 Drive Strength Field: R0/6
821 Speed Field: medium(100MHz)
822 Open Drain Enable Field: Open Drain Disabled
823 Pull / Keep Enable Field: Pull/Keeper Disabled
824 Pull / Keep Select Field: Keeper
825 Pull Up / Down Config. Field: 100K Ohm Pull Down
826 Hyst. Enable Field: Hysteresis Disabled */
828 IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 PAD functional properties : */
829 0xB1U); /* Slew Rate Field: Fast Slew Rate
830 Drive Strength Field: R0/6
831 Speed Field: medium(100MHz)
832 Open Drain Enable Field: Open Drain Disabled
833 Pull / Keep Enable Field: Pull/Keeper Disabled
834 Pull / Keep Select Field: Keeper
835 Pull Up / Down Config. Field: 100K Ohm Pull Down
836 Hyst. Enable Field: Hysteresis Disabled */
838 IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 PAD functional properties : */
839 0xB1U); /* Slew Rate Field: Fast Slew Rate
840 Drive Strength Field: R0/6
841 Speed Field: medium(100MHz)
842 Open Drain Enable Field: Open Drain Disabled
843 Pull / Keep Enable Field: Pull/Keeper Disabled
844 Pull / Keep Select Field: Keeper
845 Pull Up / Down Config. Field: 100K Ohm Pull Down
846 Hyst. Enable Field: Hysteresis Disabled */
848 IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 PAD functional properties : */
849 0xB1U); /* Slew Rate Field: Fast Slew Rate
850 Drive Strength Field: R0/6
851 Speed Field: medium(100MHz)
852 Open Drain Enable Field: Open Drain Disabled
853 Pull / Keep Enable Field: Pull/Keeper Disabled
854 Pull / Keep Select Field: Keeper
855 Pull Up / Down Config. Field: 100K Ohm Pull Down
856 Hyst. Enable Field: Hysteresis Disabled */
858 IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 PAD functional properties : */
859 0xB1U); /* Slew Rate Field: Fast Slew Rate
860 Drive Strength Field: R0/6
861 Speed Field: medium(100MHz)
862 Open Drain Enable Field: Open Drain Disabled
863 Pull / Keep Enable Field: Pull/Keeper Disabled
864 Pull / Keep Select Field: Keeper
865 Pull Up / Down Config. Field: 100K Ohm Pull Down
866 Hyst. Enable Field: Hysteresis Disabled */
868 IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 PAD functional properties : */
869 0xB1U); /* Slew Rate Field: Fast Slew Rate
870 Drive Strength Field: R0/6
871 Speed Field: medium(100MHz)
872 Open Drain Enable Field: Open Drain Disabled
873 Pull / Keep Enable Field: Pull/Keeper Disabled
874 Pull / Keep Select Field: Keeper
875 Pull Up / Down Config. Field: 100K Ohm Pull Down
876 Hyst. Enable Field: Hysteresis Disabled */
878 IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 PAD functional properties : */
879 0xB1U); /* Slew Rate Field: Fast Slew Rate
880 Drive Strength Field: R0/6
881 Speed Field: medium(100MHz)
882 Open Drain Enable Field: Open Drain Disabled
883 Pull / Keep Enable Field: Pull/Keeper Disabled
884 Pull / Keep Select Field: Keeper
885 Pull Up / Down Config. Field: 100K Ohm Pull Down
886 Hyst. Enable Field: Hysteresis Disabled */
888 IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 PAD functional properties : */
889 0xB1U); /* Slew Rate Field: Fast Slew Rate
890 Drive Strength Field: R0/6
891 Speed Field: medium(100MHz)
892 Open Drain Enable Field: Open Drain Disabled
893 Pull / Keep Enable Field: Pull/Keeper Disabled
894 Pull / Keep Select Field: Keeper
895 Pull Up / Down Config. Field: 100K Ohm Pull Down
896 Hyst. Enable Field: Hysteresis Disabled */
898 IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 PAD functional properties : */
899 0xB1U); /* Slew Rate Field: Fast Slew Rate
900 Drive Strength Field: R0/6
901 Speed Field: medium(100MHz)
902 Open Drain Enable Field: Open Drain Disabled
903 Pull / Keep Enable Field: Pull/Keeper Disabled
904 Pull / Keep Select Field: Keeper
905 Pull Up / Down Config. Field: 100K Ohm Pull Down
906 Hyst. Enable Field: Hysteresis Disabled */
908 IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 PAD functional properties : */
909 0xB1U); /* Slew Rate Field: Fast Slew Rate
910 Drive Strength Field: R0/6
911 Speed Field: medium(100MHz)
912 Open Drain Enable Field: Open Drain Disabled
913 Pull / Keep Enable Field: Pull/Keeper Disabled
914 Pull / Keep Select Field: Keeper
915 Pull Up / Down Config. Field: 100K Ohm Pull Down
916 Hyst. Enable Field: Hysteresis Disabled */
921 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
923 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
925 - {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05}
926 - {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04}
927 - {pin_num: K1, peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_03}
928 - {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02}
929 - {pin_num: J4, peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_00}
930 - {pin_num: J3, peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_01}
931 - {pin_num: C14, peripheral: USDHC1, signal: usdhc_vselect, pin_signal: GPIO_B1_14}
932 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
935 /* FUNCTION ************************************************************************************************************
937 * Function Name : BOARD_InitUSDHCPins
938 * Description : Configures pin routing and optionally pin electrical features.
940 * END ****************************************************************************************************************/
941 void BOARD_InitUSDHCPins(void) {
942 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
945 IOMUXC_GPIO_B1_14_USDHC1_VSELECT, /* GPIO_B1_14 is configured as USDHC1_VSELECT */
946 0U); /* Software Input On Field: Input Path is determined by functionality */
948 IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, /* GPIO_SD_B0_00 is configured as USDHC1_CMD */
949 0U); /* Software Input On Field: Input Path is determined by functionality */
951 IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, /* GPIO_SD_B0_01 is configured as USDHC1_CLK */
952 0U); /* Software Input On Field: Input Path is determined by functionality */
954 IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */
955 0U); /* Software Input On Field: Input Path is determined by functionality */
957 IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */
958 0U); /* Software Input On Field: Input Path is determined by functionality */
960 IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */
961 0U); /* Software Input On Field: Input Path is determined by functionality */
963 IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */
964 0U); /* Software Input On Field: Input Path is determined by functionality */
969 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
971 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
973 - {pin_num: P3, peripheral: FLEXSPI, signal: FLEXSPI_A_DATA0, pin_signal: GPIO_SD_B1_08}
974 - {pin_num: N4, peripheral: FLEXSPI, signal: FLEXSPI_A_DATA1, pin_signal: GPIO_SD_B1_09}
975 - {pin_num: P4, peripheral: FLEXSPI, signal: FLEXSPI_A_DATA2, pin_signal: GPIO_SD_B1_10}
976 - {pin_num: P5, peripheral: FLEXSPI, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_SD_B1_11}
977 - {pin_num: L4, peripheral: FLEXSPI, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_SD_B1_07}
978 - {pin_num: L3, peripheral: FLEXSPI, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_SD_B1_06}
979 - {pin_num: N3, peripheral: FLEXSPI, signal: FLEXSPI_A_DQS, pin_signal: GPIO_SD_B1_05}
980 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
983 /* FUNCTION ************************************************************************************************************
985 * Function Name : BOARD_InitQSPIPins
986 * Description : Configures pin routing and optionally pin electrical features.
988 * END ****************************************************************************************************************/
989 void BOARD_InitQSPIPins(void) {
990 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
993 IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, /* GPIO_SD_B1_05 is configured as FLEXSPIA_DQS */
994 0U); /* Software Input On Field: Input Path is determined by functionality */
996 IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, /* GPIO_SD_B1_06 is configured as FLEXSPIA_SS0_B */
997 0U); /* Software Input On Field: Input Path is determined by functionality */
999 IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, /* GPIO_SD_B1_07 is configured as FLEXSPIA_SCLK */
1000 0U); /* Software Input On Field: Input Path is determined by functionality */
1002 IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, /* GPIO_SD_B1_08 is configured as FLEXSPIA_DATA00 */
1003 0U); /* Software Input On Field: Input Path is determined by functionality */
1005 IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, /* GPIO_SD_B1_09 is configured as FLEXSPIA_DATA01 */
1006 0U); /* Software Input On Field: Input Path is determined by functionality */
1008 IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, /* GPIO_SD_B1_10 is configured as FLEXSPIA_DATA02 */
1009 0U); /* Software Input On Field: Input Path is determined by functionality */
1011 IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, /* GPIO_SD_B1_11 is configured as FLEXSPIA_DATA03 */
1012 0U); /* Software Input On Field: Input Path is determined by functionality */
1017 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
1019 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
1021 - {pin_num: F14, peripheral: GPIO1, signal: 'gpio_io, 09', pin_signal: GPIO_AD_B0_09, direction: OUTPUT, open_drain: Enable}
1022 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
1025 /* FUNCTION ************************************************************************************************************
1027 * Function Name : BOARD_InitLEDPins
1028 * Description : Configures pin routing and optionally pin electrical features for LED.
1030 * END ****************************************************************************************************************/
1031 void BOARD_InitLEDPins(void) {
1032 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
1034 /* GPIO configuration of USER_LED on GPIO_AD_B0_09 (pin F14) */
1035 gpio_pin_config_t USER_LED_config = {
1036 .direction = kGPIO_DigitalOutput,
1038 .interruptMode = kGPIO_NoIntmode
1040 /* Initialize GPIO functionality on GPIO_AD_B0_09 (pin F14) */
1041 GPIO_PinInit(GPIO1, 9U, &USER_LED_config);
1044 IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
1045 0U); /* Software Input On Field: Input Path is determined by functionality */
1046 IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
1047 (~(IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK))) /* Mask bits to zero which are setting */
1048 | IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U) /* GPIO1 and GPIO6 share same IO MUX function, GPIO_MUX1 selects one GPIO function: 0x00U */
1050 IOMUXC_SetPinConfig(
1051 IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 PAD functional properties : */
1052 0x78A0U); /* Slew Rate Field: Slow Slew Rate
1053 Drive Strength Field: R0/4
1054 Speed Field: medium(100MHz)
1055 Open Drain Enable Field: Open Drain Enabled
1056 Pull / Keep Enable Field: Pull/Keeper Enabled
1057 Pull / Keep Select Field: Pull
1058 Pull Up / Down Config. Field: 47K Ohm Pull Up
1059 Hyst. Enable Field: Hysteresis Disabled */
1064 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
1065 BOARD_InitButtonsPins:
1066 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
1068 - {pin_num: L6, peripheral: GPIO5, signal: 'gpio_io, 00', pin_signal: WAKEUP, identifier: USER_BUTTON, open_drain: Enable}
1069 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
1072 /* FUNCTION ************************************************************************************************************
1074 * Function Name : BOARD_InitButtonsPins
1075 * Description : Configures pin routing and optionally pin electrical features for Buttons.
1077 * END ****************************************************************************************************************/
1078 void BOARD_InitButtonsPins(void) {
1079 CLOCK_EnableClock(kCLOCK_IomuxcSnvs); /* iomuxc_snvs clock (iomuxc_snvs_clk_enable): 0x03U */
1082 IOMUXC_SNVS_WAKEUP_GPIO5_IO00, /* WAKEUP is configured as GPIO5_IO00 */
1083 0U); /* Software Input On Field: Input Path is determined by functionality */
1084 IOMUXC_SetPinConfig(
1085 IOMUXC_SNVS_WAKEUP_GPIO5_IO00, /* WAKEUP PAD functional properties : */
1086 0x01B8A0U); /* Slew Rate Field: Slow Slew Rate
1087 Drive Strength Field: R0/4
1088 Speed Field: medium(100MHz)
1089 Open Drain Enable Field: Open Drain Enabled
1090 Pull / Keep Enable Field: Pull/Keeper Enabled
1091 Pull / Keep Select Field: Pull
1092 Pull Up / Down Config. Field: 100K Ohm Pull Up
1093 Hyst. Enable Field: Hysteresis Enabled */
1098 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
1100 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
1102 - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
1103 - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
1104 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
1107 /* FUNCTION ************************************************************************************************************
1109 * Function Name : LPUART1_InitPins
1110 * Description : Configures pin routing and optionally pin electrical features.
1112 * END ****************************************************************************************************************/
1113 void LPUART1_InitPins(void) {
1114 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
1117 IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
1118 0U); /* Software Input On Field: Input Path is determined by functionality */
1120 IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
1121 0U); /* Software Input On Field: Input Path is determined by functionality */
1126 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
1128 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
1130 - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13}
1131 - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12}
1132 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
1135 /* FUNCTION ************************************************************************************************************
1137 * Function Name : LPUART1_DeinitPins
1138 * Description : Configures pin routing and optionally pin electrical features.
1140 * END ****************************************************************************************************************/
1141 void LPUART1_DeinitPins(void) {
1142 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
1145 IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
1146 0U); /* Software Input On Field: Input Path is determined by functionality */
1148 IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
1149 0U); /* Software Input On Field: Input Path is determined by functionality */
1154 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
1156 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
1158 - {pin_num: J12, peripheral: LPUART3, signal: TX, pin_signal: GPIO_AD_B1_06, identifier: UART3_TXD}
1159 - {pin_num: K10, peripheral: LPUART3, signal: RX, pin_signal: GPIO_AD_B1_07, identifier: UART3_RXD}
1160 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
1163 /* FUNCTION ************************************************************************************************************
1165 * Function Name : LPUART3_InitPins
1166 * Description : Configures pin routing and optionally pin electrical features.
1168 * END ****************************************************************************************************************/
1169 void LPUART3_InitPins(void) {
1170 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
1173 IOMUXC_GPIO_AD_B1_06_LPUART3_TX, /* GPIO_AD_B1_06 is configured as LPUART3_TX */
1174 0U); /* Software Input On Field: Input Path is determined by functionality */
1176 IOMUXC_GPIO_AD_B1_07_LPUART3_RX, /* GPIO_AD_B1_07 is configured as LPUART3_RX */
1177 0U); /* Software Input On Field: Input Path is determined by functionality */
1182 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
1184 - options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
1186 - {pin_num: K10, peripheral: LPUART3, signal: RX, pin_signal: GPIO_AD_B1_07}
1187 - {pin_num: J12, peripheral: LPUART3, signal: TX, pin_signal: GPIO_AD_B1_06}
1188 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
1191 /* FUNCTION ************************************************************************************************************
1193 * Function Name : LPUART3_DeinitPins
1194 * Description : Configures pin routing and optionally pin electrical features.
1196 * END ****************************************************************************************************************/
1197 void LPUART3_DeinitPins(void) {
1198 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
1201 IOMUXC_GPIO_AD_B1_06_LPUART3_TX, /* GPIO_AD_B1_06 is configured as LPUART3_TX */
1202 0U); /* Software Input On Field: Input Path is determined by functionality */
1204 IOMUXC_GPIO_AD_B1_07_LPUART3_RX, /* GPIO_AD_B1_07 is configured as LPUART3_RX */
1205 0U); /* Software Input On Field: Input Path is determined by functionality */
1208 /***********************************************************************************************************************
1210 **********************************************************************************************************************/