begriffs open source - cmsis-freertos/blob - Demo/CORTEX_M0_STM32F0518_IAR/startup_stm32f0xx.s

   1 ;/******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
   2 ;* File Name          : startup_stm32f0xx.s
   3 ;* Author             : MCD Application Team
   4 ;* Version            : V1.0.0RC1
   5 ;* Date               : 27-January-2012
   6 ;* Description        : STM32F0xx Devices vector table for EWARM toolchain.
   7 ;*                      This module performs:
   8 ;*                      - Set the initial SP
   9 ;*                      - Set the initial PC == __iar_program_start,
  10 ;*                      - Set the vector table entries with the exceptions ISR
  11 ;*                        address.
  12 ;*                      After Reset the Cortex-M0 processor is in Thread mode,
  13 ;*                      priority is Privileged, and the Stack is set to Main.
  14 ;********************************************************************************
  15 ;* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  16 ;* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
  17 ;* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
  18 ;* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
  19 ;* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
  20 ;* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  21 ;* FOR MORE INFORMATION PLEASE READ CAREFULLY THE LICENSE AGREEMENT FILE
  22 ;* LOCATED IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
  23 ;*******************************************************************************/
  24 ;
  25 ;
  26 ; The modules in this file are included in the libraries, and may be replaced
  27 ; by any user-defined modules that define the PUBLIC symbol _program_start or
  28 ; a user defined start symbol.
  29 ; To override the cstartup defined in the library, simply add your modified
  30 ; version to the workbench project.
  31 ;
  32 ; The vector table is normally located at address 0.
  33 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  34 ; The name "__vector_table" has special meaning for C-SPY:
  35 ; it is where the SP start value is found, and the NVIC vector
  36 ; table register (VTOR) is initialized to this address if != 0.
  37 ;
  38 ; Cortex-M version
  39 ;
  40
  41         MODULE  ?cstartup
  42
  43         ;; Forward declaration of sections.
  44         SECTION CSTACK:DATA:NOROOT(3)
  45
  46         SECTION .intvec:CODE:NOROOT(2)
  47
  48         EXTERN  __iar_program_start
  49         EXTERN  SystemInit
  50         PUBLIC  __vector_table
  51
  52         DATA
  53 __vector_table
  54         DCD     sfe(CSTACK)
  55         DCD     Reset_Handler                  ; Reset Handler
  56
  57         DCD     NMI_Handler                    ; NMI Handler
  58         DCD     HardFault_Handler              ; Hard Fault Handler
  59         DCD     0                              ; Reserved
  60         DCD     0                              ; Reserved
  61         DCD     0                              ; Reserved
  62         DCD     0                              ; Reserved
  63         DCD     0                              ; Reserved
  64         DCD     0                              ; Reserved
  65         DCD     0                              ; Reserved
  66         DCD     SVC_Handler                    ; SVCall Handler
  67         DCD     0                              ; Reserved
  68         DCD     0                              ; Reserved
  69         DCD     PendSV_Handler                 ; PendSV Handler
  70         DCD     SysTick_Handler                ; SysTick Handler
  71
  72         ; External Interrupts
  73         DCD     WWDG_IRQHandler                ; Window Watchdog
  74         DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
  75         DCD     RTC_IRQHandler                 ; RTC through EXTI Line
  76         DCD     FLASH_IRQHandler               ; FLASH
  77         DCD     RCC_IRQHandler                 ; RCC
  78         DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
  79         DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
  80         DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
  81         DCD     TS_IRQHandler                  ; TS
  82         DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
  83         DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
  84         DCD     DMA1_Channel4_5_IRQHandler     ; DMA1 Channel 4 and Channel 5
  85         DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2
  86         DCD     TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
  87         DCD     TIM1_CC_IRQHandler             ; TIM1 Capture Compare
  88         DCD     TIM2_IRQHandler                ; TIM2
  89         DCD     TIM3_IRQHandler                ; TIM3
  90         DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
  91         DCD     0                              ; Reserved
  92         DCD     TIM14_IRQHandler               ; TIM14
  93         DCD     TIM15_IRQHandler               ; TIM15
  94         DCD     TIM16_IRQHandler               ; TIM16
  95         DCD     TIM17_IRQHandler               ; TIM17
  96         DCD     I2C1_IRQHandler                ; I2C1
  97         DCD     I2C2_IRQHandler                ; I2C2
  98         DCD     SPI1_IRQHandler                ; SPI1
  99         DCD     SPI2_IRQHandler                ; SPI2
 100         DCD     USART1_IRQHandler              ; USART1
 101         DCD     USART2_IRQHandler              ; USART2
 102         DCD     0                              ; Reserved
 103         DCD     CEC_IRQHandler                 ; CEC
 104         DCD     0                              ; Reserved
 105
 106 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 107 ;;
 108 ;; Default interrupt handlers.
 109 ;;
 110         THUMB
 111
 112         EXTERN  __ICFEDIT_region_RAM_start__
 113         EXTERN  __ICFEDIT_region_RAM_end__
 114         SECTION `.text`:CODE:NOROOT(2)
 115         DATA
 116 ??DataTable22:
 117         DC32     __ICFEDIT_region_RAM_start__
 118 ??DataTable22_1:
 119         DC32     __ICFEDIT_region_RAM_end__
 120
 121         THUMB
 122
 123         PUBLIC Reset_Handler
 124         SECTION .text:CODE:REORDER(2)
 125 Reset_Handler
 126
 127         LDR   R0,=??DataTable22
 128         LDR    R0,[R0, #+0]
 129         LDR   R1,=??DataTable22_1
 130 ??x_0:
 131         MOVS     R2,#+0
 132         STRB     R2,[R0]
 133         ADDS      R0,R0,#0x1
 134         LDR      R2,[R1, #+0]
 135         CMP      R2,R0
 136         BCS.N    ??x_0
 137
 138         LDR     R0, =SystemInit
 139         BLX     R0
 140         LDR     R0, =__iar_program_start
 141         BX      R0
 142
 143
 144         PUBWEAK NMI_Handler
 145         SECTION .text:CODE:NOROOT:REORDER(1)
 146 NMI_Handler
 147         B NMI_Handler
 148
 149
 150         PUBWEAK HardFault_Handler
 151         SECTION .text:CODE:NOROOT:REORDER(1)
 152 HardFault_Handler
 153         B HardFault_Handler
 154
 155
 156         PUBWEAK SVC_Handler
 157         SECTION .text:CODE:NOROOT:REORDER(1)
 158 SVC_Handler
 159         B SVC_Handler
 160
 161
 162         PUBWEAK PendSV_Handler
 163         SECTION .text:CODE:NOROOT:REORDER(1)
 164 PendSV_Handler
 165         B PendSV_Handler
 166
 167
 168         PUBWEAK SysTick_Handler
 169         SECTION .text:CODE:NOROOT:REORDER(1)
 170 SysTick_Handler
 171         B SysTick_Handler
 172
 173
 174         PUBWEAK WWDG_IRQHandler
 175         SECTION .text:CODE:NOROOT:REORDER(1)
 176 WWDG_IRQHandler
 177         B WWDG_IRQHandler
 178
 179
 180         PUBWEAK PVD_IRQHandler
 181         SECTION .text:CODE:NOROOT:REORDER(1)
 182 PVD_IRQHandler
 183         B PVD_IRQHandler
 184
 185
 186         PUBWEAK RTC_IRQHandler
 187         SECTION .text:CODE:NOROOT:REORDER(1)
 188 RTC_IRQHandler
 189         B RTC_IRQHandler
 190
 191
 192         PUBWEAK FLASH_IRQHandler
 193         SECTION .text:CODE:NOROOT:REORDER(1)
 194 FLASH_IRQHandler
 195         B FLASH_IRQHandler
 196
 197
 198         PUBWEAK RCC_IRQHandler
 199         SECTION .text:CODE:NOROOT:REORDER(1)
 200 RCC_IRQHandler
 201         B RCC_IRQHandler
 202
 203
 204         PUBWEAK EXTI0_1_IRQHandler
 205         SECTION .text:CODE:NOROOT:REORDER(1)
 206 EXTI0_1_IRQHandler
 207         B EXTI0_1_IRQHandler
 208
 209
 210         PUBWEAK EXTI2_3_IRQHandler
 211         SECTION .text:CODE:NOROOT:REORDER(1)
 212 EXTI2_3_IRQHandler
 213         B EXTI2_3_IRQHandler
 214
 215
 216         PUBWEAK EXTI4_15_IRQHandler
 217         SECTION .text:CODE:NOROOT:REORDER(1)
 218 EXTI4_15_IRQHandler
 219         B EXTI4_15_IRQHandler
 220
 221
 222         PUBWEAK TS_IRQHandler
 223         SECTION .text:CODE:NOROOT:REORDER(1)
 224 TS_IRQHandler
 225         B TS_IRQHandler
 226
 227
 228         PUBWEAK DMA1_Channel1_IRQHandler
 229         SECTION .text:CODE:NOROOT:REORDER(1)
 230 DMA1_Channel1_IRQHandler
 231         B DMA1_Channel1_IRQHandler
 232
 233
 234         PUBWEAK DMA1_Channel2_3_IRQHandler
 235         SECTION .text:CODE:NOROOT:REORDER(1)
 236 DMA1_Channel2_3_IRQHandler
 237         B DMA1_Channel2_3_IRQHandler
 238
 239
 240         PUBWEAK DMA1_Channel4_5_IRQHandler
 241         SECTION .text:CODE:NOROOT:REORDER(1)
 242 DMA1_Channel4_5_IRQHandler
 243         B DMA1_Channel4_5_IRQHandler
 244
 245
 246         PUBWEAK ADC1_COMP_IRQHandler
 247         SECTION .text:CODE:NOROOT:REORDER(1)
 248 ADC1_COMP_IRQHandler
 249         B ADC1_COMP_IRQHandler
 250
 251
 252         PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
 253         SECTION .text:CODE:NOROOT:REORDER(1)
 254 TIM1_BRK_UP_TRG_COM_IRQHandler
 255         B TIM1_BRK_UP_TRG_COM_IRQHandler
 256
 257
 258         PUBWEAK TIM1_CC_IRQHandler
 259         SECTION .text:CODE:NOROOT:REORDER(1)
 260 TIM1_CC_IRQHandler
 261         B TIM1_CC_IRQHandler
 262
 263
 264         PUBWEAK TIM2_IRQHandler
 265         SECTION .text:CODE:NOROOT:REORDER(1)
 266 TIM2_IRQHandler
 267         B TIM2_IRQHandler
 268
 269
 270         PUBWEAK TIM3_IRQHandler
 271         SECTION .text:CODE:NOROOT:REORDER(1)
 272 TIM3_IRQHandler
 273         B TIM3_IRQHandler
 274
 275
 276         PUBWEAK TIM6_DAC_IRQHandler
 277         SECTION .text:CODE:NOROOT:REORDER(1)
 278 TIM6_DAC_IRQHandler
 279         B TIM6_DAC_IRQHandler
 280
 281
 282         PUBWEAK TIM14_IRQHandler
 283         SECTION .text:CODE:NOROOT:REORDER(1)
 284 TIM14_IRQHandler
 285         B TIM14_IRQHandler
 286
 287
 288         PUBWEAK TIM15_IRQHandler
 289         SECTION .text:CODE:NOROOT:REORDER(1)
 290 TIM15_IRQHandler
 291         B TIM15_IRQHandler
 292
 293
 294         PUBWEAK TIM16_IRQHandler
 295         SECTION .text:CODE:NOROOT:REORDER(1)
 296 TIM16_IRQHandler
 297         B TIM16_IRQHandler
 298
 299
 300         PUBWEAK TIM17_IRQHandler
 301         SECTION .text:CODE:NOROOT:REORDER(1)
 302 TIM17_IRQHandler
 303         B TIM17_IRQHandler
 304
 305
 306         PUBWEAK I2C1_IRQHandler
 307         SECTION .text:CODE:NOROOT:REORDER(1)
 308 I2C1_IRQHandler
 309         B I2C1_IRQHandler
 310
 311
 312         PUBWEAK I2C2_IRQHandler
 313         SECTION .text:CODE:NOROOT:REORDER(1)
 314 I2C2_IRQHandler
 315         B I2C2_IRQHandler
 316
 317
 318         PUBWEAK SPI1_IRQHandler
 319         SECTION .text:CODE:NOROOT:REORDER(1)
 320 SPI1_IRQHandler
 321         B SPI1_IRQHandler
 322
 323
 324         PUBWEAK SPI2_IRQHandler
 325         SECTION .text:CODE:NOROOT:REORDER(1)
 326 SPI2_IRQHandler
 327         B SPI2_IRQHandler
 328
 329
 330         PUBWEAK USART1_IRQHandler
 331         SECTION .text:CODE:NOROOT:REORDER(1)
 332 USART1_IRQHandler
 333         B USART1_IRQHandler
 334
 335
 336         PUBWEAK USART2_IRQHandler
 337         SECTION .text:CODE:NOROOT:REORDER(1)
 338 USART2_IRQHandler
 339         B USART2_IRQHandler
 340
 341
 342         PUBWEAK CEC_IRQHandler
 343         SECTION .text:CODE:NOROOT:REORDER(1)
 344 CEC_IRQHandler
 345         B CEC_IRQHandler
 346
 347         END
 348 /******************* (C) COPYRIGHT 2012 STMicroelectronics *****END OF FILE****/