2 * FreeRTOS Kernel V11.2.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
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17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the ST STR75x ARM7
32 *----------------------------------------------------------*/
34 /* Library includes. */
38 /* Scheduler includes. */
42 /* Constants required to setup the initial stack. */
43 #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */
44 #define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )
45 #define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )
47 /* Constants required to handle critical sections. */
48 #define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
50 /* Prescale used on the timer clock when calculating the tick period. */
51 #define portPRESCALE 20
54 /*-----------------------------------------------------------*/
56 /* Setup the TB to generate the tick interrupts. */
57 static void prvSetupTimerInterrupt( void );
59 /*-----------------------------------------------------------*/
62 * Initialise the stack of a task to look exactly as if a call to
63 * portSAVE_CONTEXT had been called.
65 * See header file for description.
67 StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
68 TaskFunction_t pxCode,
71 StackType_t * pxOriginalTOS;
73 pxOriginalTOS = pxTopOfStack;
75 /* To ensure asserts in tasks.c don't fail, although in this case the assert
76 * is not really required. */
79 /* Setup the initial stack of the task. The stack is set exactly as
80 * expected by the portRESTORE_CONTEXT() macro. */
82 /* First on the stack is the return address - which in this case is the
83 * start of the task. The offset is added to make the return address appear
84 * as it would within an IRQ ISR. */
85 *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;
88 *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */
90 *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */
92 *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */
94 *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */
96 *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */
98 *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */
100 *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */
102 *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */
104 *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */
106 *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */
108 *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */
110 *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */
112 *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */
114 *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */
117 /* When the task starts is will expect to find the function parameter in
119 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
122 /* The status register is set for system mode, with interrupts enabled. */
123 *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;
125 #ifdef THUMB_INTERWORK
127 /* We want the task to start in thumb mode. */
128 *pxTopOfStack |= portTHUMB_MODE_BIT;
134 /* Interrupt flags cannot always be stored on the stack and will
135 * instead be stored in a variable, which is then saved as part of the
137 *pxTopOfStack = portNO_CRITICAL_NESTING;
141 /*-----------------------------------------------------------*/
143 BaseType_t xPortStartScheduler( void )
145 extern void vPortISRStartFirstTask( void );
147 /* Start the timer that generates the tick ISR. Interrupts are disabled
149 prvSetupTimerInterrupt();
151 /* Start the first task. */
152 vPortISRStartFirstTask();
154 /* Should not get here! */
157 /*-----------------------------------------------------------*/
159 void vPortEndScheduler( void )
161 /* It is unlikely that the ARM port will require this function as there
162 * is nothing to return to. */
164 /*-----------------------------------------------------------*/
166 static void prvSetupTimerInterrupt( void )
168 EIC_IRQInitTypeDef EIC_IRQInitStructure;
169 TB_InitTypeDef TB_InitStructure;
171 /* Setup the EIC for the TB. */
172 EIC_IRQInitStructure.EIC_IRQChannelCmd = ENABLE;
173 EIC_IRQInitStructure.EIC_IRQChannel = TB_IRQChannel;
174 EIC_IRQInitStructure.EIC_IRQChannelPriority = 1;
175 EIC_IRQInit( &EIC_IRQInitStructure );
177 /* Setup the TB for the generation of the tick interrupt. */
178 TB_InitStructure.TB_Mode = TB_Mode_Timing;
179 TB_InitStructure.TB_CounterMode = TB_CounterMode_Down;
180 TB_InitStructure.TB_Prescaler = portPRESCALE - 1;
181 TB_InitStructure.TB_AutoReload = ( ( configCPU_CLOCK_HZ / portPRESCALE ) / configTICK_RATE_HZ );
182 TB_Init( &TB_InitStructure );
184 /* Enable TB Update interrupt */
185 TB_ITConfig( TB_IT_Update, ENABLE );
187 /* Clear TB Update interrupt pending bit */
188 TB_ClearITPendingBit( TB_IT_Update );
193 /*-----------------------------------------------------------*/