begriffs open source - cmsis-freertos/blob - Source/portable/GCC/TriCore_1782/porttrap.c

   1 /*
   2  * FreeRTOS Kernel V10.4.6
   3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
   4  *
   5  * SPDX-License-Identifier: MIT
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
   8  * this software and associated documentation files (the "Software"), to deal in
   9  * the Software without restriction, including without limitation the rights to
  10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11  * the Software, and to permit persons to whom the Software is furnished to do so,
  12  * subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in all
  15  * copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * https://www.FreeRTOS.org
  25  * https://github.com/FreeRTOS
  26  *
  27  */
  28
  29 /* Kernel includes. */
  30 #include "FreeRTOS.h"
  31
  32 /* Machine includes */
  33 #include <tc1782.h>
  34 #include <machine/intrinsics.h>
  35 #include <machine/cint.h>
  36 /*---------------------------------------------------------------------------*/
  37
  38 /*
  39  * This reference is required by the Save/Restore Context Macros.
  40  */
  41 extern volatile uint32_t *pxCurrentTCB;
  42 /*-----------------------------------------------------------*/
  43
  44 /*
  45  * This file contains base definitions for all of the possible traps in the system.
  46  * It is suggested to provide implementations for all of the traps but for
  47  * the time being they simply trigger a DEBUG instruction so that it is easy
  48  * to see what caused a particular trap.
  49  *
  50  * Trap Class 6, the SYSCALL, is used exclusively by the operating system.
  51  */
  52
  53 /* The Trap Classes. */
  54 #define portMMU_TRAP                                                                            0
  55 #define portIPT_TRAP                                                                            1
  56 #define portIE_TRAP                                                                                     2
  57 #define portCM_TRAP                                                                                     3
  58 #define portSBP_TRAP                                                                            4
  59 #define portASSERT_TRAP                                                                         5
  60 #define portNMI_TRAP                                                                            7
  61
  62 /* MMU Trap Identifications. */
  63 #define portTIN_MMU_VIRTUAL_ADDRESS_FILL                                        0
  64 #define portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION                          1
  65
  66 /* Internal Protection Trap Identifications. */
  67 #define portTIN_IPT_PRIVILIGED_INSTRUCTION                                      1
  68 #define portTIN_IPT_MEMORY_PROTECTION_READ                                      2
  69 #define portTIN_IPT_MEMORY_PROTECTION_WRITE                                     3
  70 #define portTIN_IPT_MEMORY_PROTECTION_EXECUTION                         4
  71 #define portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS         5
  72 #define portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS                      6
  73 #define portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION  7
  74
  75 /* Instruction Error Trap Identifications. */
  76 #define portTIN_IE_ILLEGAL_OPCODE                                                       1
  77 #define portTIN_IE_UNIMPLEMENTED_OPCODE                                         2
  78 #define portTIN_IE_INVALID_OPERAND                                                      3
  79 #define portTIN_IE_DATA_ADDRESS_ALIGNMENT                                       4
  80 #define portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS                         5
  81
  82 /* Context Management Trap Identifications. */
  83 #define portTIN_CM_FREE_CONTEXT_LIST_DEPLETION                          1
  84 #define portTIN_CM_CALL_DEPTH_OVERFLOW                                          2
  85 #define portTIN_CM_CALL_DEPTH_UNDEFLOW                                          3
  86 #define portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW                          4
  87 #define portTIN_CM_CALL_STACK_UNDERFLOW                                         5
  88 #define portTIN_CM_CONTEXT_TYPE                                                         6
  89 #define portTIN_CM_NESTING_ERROR                                                        7
  90
  91 /* System Bus and Peripherals Trap Identifications. */
  92 #define portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR                     1
  93 #define portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR                       2
  94 #define portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR                      3
  95 #define portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR         4
  96 #define portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR                      5
  97 #define portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR                         6
  98
  99 /* Assertion Trap Identifications. */
 100 #define portTIN_ASSERT_ARITHMETIC_OVERFLOW                                      1
 101 #define portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW                       2
 102
 103 /* Non-maskable Interrupt Trap Identifications. */
 104 #define portTIN_NMI_NON_MASKABLE_INTERRUPT                                      0
 105 /*---------------------------------------------------------------------------*/
 106
 107 void vMMUTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 108 void vInternalProtectionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 109 void vInstructionErrorTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 110 void vContextManagementTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 111 void vSystemBusAndPeripheralsTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 112 void vAssertionTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 113 void vNonMaskableInterruptTrap( int iTrapIdentification ) __attribute__( ( longcall, weak ) );
 114 /*---------------------------------------------------------------------------*/
 115
 116 void vTrapInstallHandlers( void )
 117 {
 118         if( 0 == _install_trap_handler ( portMMU_TRAP, vMMUTrap ) )
 119         {
 120                 _debug();
 121         }
 122
 123         if( 0 == _install_trap_handler ( portIPT_TRAP, vInternalProtectionTrap ) )
 124         {
 125                 _debug();
 126         }
 127
 128         if( 0 == _install_trap_handler ( portIE_TRAP, vInstructionErrorTrap ) )
 129         {
 130                 _debug();
 131         }
 132
 133         if( 0 == _install_trap_handler ( portCM_TRAP, vContextManagementTrap ) )
 134         {
 135                 _debug();
 136         }
 137
 138         if( 0 == _install_trap_handler ( portSBP_TRAP, vSystemBusAndPeripheralsTrap ) )
 139         {
 140                 _debug();
 141         }
 142
 143         if( 0 == _install_trap_handler ( portASSERT_TRAP, vAssertionTrap ) )
 144         {
 145                 _debug();
 146         }
 147
 148         if( 0 == _install_trap_handler ( portNMI_TRAP, vNonMaskableInterruptTrap ) )
 149         {
 150                 _debug();
 151         }
 152 }
 153 /*-----------------------------------------------------------*/
 154
 155 void vMMUTrap( int iTrapIdentification )
 156 {
 157         switch( iTrapIdentification )
 158         {
 159         case portTIN_MMU_VIRTUAL_ADDRESS_FILL:
 160         case portTIN_MMU_VIRTUAL_ADDRESS_PROTECTION:
 161         default:
 162                 _debug();
 163                 break;
 164         }
 165 }
 166 /*---------------------------------------------------------------------------*/
 167
 168 void vInternalProtectionTrap( int iTrapIdentification )
 169 {
 170         /* Deliberate fall through to default. */
 171         switch( iTrapIdentification )
 172         {
 173                 case portTIN_IPT_PRIVILIGED_INSTRUCTION:
 174                         /* Instruction is not allowed at current execution level, eg DISABLE at User-0. */
 175
 176                 case portTIN_IPT_MEMORY_PROTECTION_READ:
 177                         /* Load word using invalid address. */
 178
 179                 case portTIN_IPT_MEMORY_PROTECTION_WRITE:
 180                         /* Store Word using invalid address. */
 181
 182                 case portTIN_IPT_MEMORY_PROTECTION_EXECUTION:
 183                         /* PC jumped to an address outside of the valid range. */
 184
 185                 case portTIN_IPT_MEMORY_PROTECTION_PERIPHERAL_ACCESS:
 186                         /* Access to a peripheral denied at current execution level. */
 187
 188                 case portTIN_IPT_MEMORY_PROTECTION_NULL_ADDRESS:
 189                         /* NULL Pointer. */
 190
 191                 case portTIN_IPT_MEMORY_PROTECTION_GLOBAL_REGISTER_WRITE_PROTECTION:
 192                         /* Tried to modify a global address pointer register. */
 193
 194                 default:
 195
 196                         pxCurrentTCB[ 0 ] = __MFCR( $PCXI );
 197                         _debug();
 198                         break;
 199         }
 200 }
 201 /*---------------------------------------------------------------------------*/
 202
 203 void vInstructionErrorTrap( int iTrapIdentification )
 204 {
 205         /* Deliberate fall through to default. */
 206         switch( iTrapIdentification )
 207         {
 208                 case portTIN_IE_ILLEGAL_OPCODE:
 209                 case portTIN_IE_UNIMPLEMENTED_OPCODE:
 210                 case portTIN_IE_INVALID_OPERAND:
 211                 case portTIN_IE_DATA_ADDRESS_ALIGNMENT:
 212                 case portTIN_IE_INVALID_LOCAL_MEMORY_ADDRESS:
 213                 default:
 214                         _debug();
 215                         break;
 216         }
 217 }
 218 /*---------------------------------------------------------------------------*/
 219
 220 void vContextManagementTrap( int iTrapIdentification )
 221 {
 222         /* Deliberate fall through to default. */
 223         switch( iTrapIdentification )
 224         {
 225                 case portTIN_CM_FREE_CONTEXT_LIST_DEPLETION:
 226                 case portTIN_CM_CALL_DEPTH_OVERFLOW:
 227                 case portTIN_CM_CALL_DEPTH_UNDEFLOW:
 228                 case portTIN_CM_FREE_CONTEXT_LIST_UNDERFLOW:
 229                 case portTIN_CM_CALL_STACK_UNDERFLOW:
 230                 case portTIN_CM_CONTEXT_TYPE:
 231                 case portTIN_CM_NESTING_ERROR:
 232                 default:
 233                         _debug();
 234                         break;
 235         }
 236 }
 237 /*---------------------------------------------------------------------------*/
 238
 239 void vSystemBusAndPeripheralsTrap( int iTrapIdentification )
 240 {
 241         /* Deliberate fall through to default. */
 242         switch( iTrapIdentification )
 243         {
 244                 case portTIN_SBP_PROGRAM_FETCH_SYNCHRONOUS_ERROR:
 245                 case portTIN_SBP_DATA_ACCESS_SYNCHRONOUS_ERROR:
 246                 case portTIN_SBP_DATA_ACCESS_ASYNCHRONOUS_ERROR:
 247                 case portTIN_SBP_COPROCESSOR_TRAP_ASYNCHRONOUS_ERROR:
 248                 case portTIN_SBP_PROGRAM_MEMORY_INTEGRITY_ERROR:
 249                 case portTIN_SBP_DATA_MEMORY_INTEGRITY_ERROR:
 250                 default:
 251                         _debug();
 252                         break;
 253         }
 254 }
 255 /*---------------------------------------------------------------------------*/
 256
 257 void vAssertionTrap( int iTrapIdentification )
 258 {
 259         /* Deliberate fall through to default. */
 260         switch( iTrapIdentification )
 261         {
 262                 case portTIN_ASSERT_ARITHMETIC_OVERFLOW:
 263                 case portTIN_ASSERT_STICKY_ARITHMETIC_OVERFLOW:
 264                 default:
 265                         _debug();
 266                         break;
 267         }
 268 }
 269 /*---------------------------------------------------------------------------*/
 270
 271 void vNonMaskableInterruptTrap( int iTrapIdentification )
 272 {
 273         /* Deliberate fall through to default. */
 274         switch( iTrapIdentification )
 275         {
 276                 case portTIN_NMI_NON_MASKABLE_INTERRUPT:
 277                 default:
 278                         _debug();
 279                         break;
 280         }
 281 }
 282 /*---------------------------------------------------------------------------*/