begriffs open source - cmsis-freertos/blob - Source/portable/GCC/ARM_CM33/secure/secure_context_port.c

   1 /*
   2  * FreeRTOS Kernel V10.4.4
   3  * Copyright (C) 2021 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
   4  *
   5  * SPDX-License-Identifier: MIT
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy of
   8  * this software and associated documentation files (the "Software"), to deal in
   9  * the Software without restriction, including without limitation the rights to
  10  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
  11  * the Software, and to permit persons to whom the Software is furnished to do so,
  12  * subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in all
  15  * copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
  19  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
  20  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  21  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * https://www.FreeRTOS.org
  25  * https://github.com/FreeRTOS
  26  *
  27  */
  28
  29 /* Secure context includes. */
  30 #include "secure_context.h"
  31
  32 /* Secure port macros. */
  33 #include "secure_port_macros.h"
  34
  35 secureportNON_SECURE_CALLABLE void SecureContext_LoadContext( SecureContextHandle_t xSecureContextHandle )
  36 {
  37     /* xSecureContextHandle value is in r0. */
  38     __asm volatile
  39     (
  40         "       .syntax unified                                                 \n"
  41         "                                                                                       \n"
  42         "       mrs r1, ipsr                                                    \n"/* r1 = IPSR. */
  43         "       cbz r1, load_ctx_therad_mode                    \n"/* Do nothing if the processor is running in the Thread Mode. */
  44         "       ldmia r0!, {r1, r2}                                             \n"/* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */
  45         #if ( configENABLE_MPU == 1 )
  46             "   ldmia r1!, {r3}                                                 \n"/* Read CONTROL register value from task's stack. r3 = CONTROL. */
  47             "   msr control, r3                                                 \n"/* CONTROL = r3. */
  48         #endif /* configENABLE_MPU */
  49         "       msr psplim, r2                                                  \n"/* PSPLIM = r2. */
  50         "       msr psp, r1                                                             \n"/* PSP = r1. */
  51         "                                                                                       \n"
  52         " load_ctx_therad_mode:                                         \n"
  53         "       nop                                                                             \n"
  54         "                                                                                       \n"
  55         ::: "r0", "r1", "r2"
  56     );
  57 }
  58 /*-----------------------------------------------------------*/
  59
  60 secureportNON_SECURE_CALLABLE void SecureContext_SaveContext( SecureContextHandle_t xSecureContextHandle )
  61 {
  62     /* xSecureContextHandle value is in r0. */
  63     __asm volatile
  64     (
  65         "       .syntax unified                                                 \n"
  66         "                                                                                       \n"
  67         "       mrs r1, ipsr                                                    \n"/* r1 = IPSR. */
  68         "       cbz r1, save_ctx_therad_mode                    \n"/* Do nothing if the processor is running in the Thread Mode. */
  69         "       mrs r1, psp                                                             \n"/* r1 = PSP. */
  70         #if ( configENABLE_FPU == 1 )
  71             "   vstmdb r1!, {s0}                                                \n"/* Trigger the defferred stacking of FPU registers. */
  72             "   vldmia r1!, {s0}                                                \n"/* Nullify the effect of the pervious statement. */
  73         #endif /* configENABLE_FPU */
  74         #if ( configENABLE_MPU == 1 )
  75             "   mrs r2, control                                                 \n"/* r2 = CONTROL. */
  76             "   stmdb r1!, {r2}                                                 \n"/* Store CONTROL value on the stack. */
  77         #endif /* configENABLE_MPU */
  78         "       str r1, [r0]                                                    \n"/* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */
  79         "       movs r1, %0                                                             \n"/* r1 = securecontextNO_STACK. */
  80         "       msr psplim, r1                                                  \n"/* PSPLIM = securecontextNO_STACK. */
  81         "       msr psp, r1                                                             \n"/* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */
  82         "                                                                                       \n"
  83         " save_ctx_therad_mode:                                         \n"
  84         "       nop                                                                             \n"
  85         "                                                                                       \n"
  86         ::"i" ( securecontextNO_STACK ) : "r1", "memory"
  87     );
  88 }
  89 /*-----------------------------------------------------------*/