1 #################################################################
2 # Makefile generated by Xilinx Platform Studio
3 # Project:C:\E\Dev\FreeRTOS\WorkingCopy3\Demo\PPC440_Xilinx_Virtex5_GCC\system.xmp
5 # WARNING : This file will be re-generated every time a command
6 # to run a make target is invoked. So, any changes made to this
7 # file manually, will be lost when make is invoked next.
8 #################################################################
10 # Name of the Microprocessor system
11 # The hardware specification of the system is in file :
12 # C:\E\Dev\FreeRTOS\WorkingCopy3\Demo\PPC440_Xilinx_Virtex5_GCC\system.mhs
13 # The software specification of the system is in file :
14 # C:\E\Dev\FreeRTOS\WorkingCopy3\Demo\PPC440_Xilinx_Virtex5_GCC\system.mss
16 include system_incl.make
18 #################################################################
20 #################################################################
27 #################################################################
29 #################################################################
31 @echo "Makefile to build a Microprocessor system :"
32 @echo "Run make with any of the following targets"
34 @echo " netlist : Generates the netlist for the given MHS "
35 @echo " bits : Runs Implementation tools to generate the bitstream"
36 @echo " exporttosdk: Export files to SDK"
38 @echo " libs : Configures the sw libraries for this system"
39 @echo " program : Compiles the program sources for all the processor instances"
41 @echo " init_bram: Initializes bitstream with BRAM data"
42 @echo " ace : Generate ace file from bitstream and elf"
43 @echo " download : Downloads the bitstream onto the board"
45 @echo " sim : Generates HDL simulation models and runs simulator for chosen simulation mode"
46 @echo " simmodel : Generates HDL simulation models for chosen simulation mode"
47 @echo " behavioral_model : Generates behavioral HDL models with BRAM initialization"
48 @echo " structural_model : Generates structural simulation HDL models with BRAM initialization"
49 @echo " timing : Generates timing simulation HDL models with BRAM initialization"
51 @echo " netlistclean: Deletes netlist"
52 @echo " bitsclean: Deletes bit, ncd, bmm files"
53 @echo " hwclean : Deletes implementation dir"
54 @echo " libsclean: Deletes sw libraries"
55 @echo " programclean: Deletes compiled ELF files"
56 @echo " swclean : Deletes sw libraries and ELF files"
57 @echo " simclean : Deletes simulation dir"
58 @echo " clean : Deletes all generated files/directories"
60 @echo " make <target> : (Default)"
61 @echo " Creates a Microprocessor system using default initializations"
62 @echo " specified for each processor in MSS file"
69 exporttosdk: $(SYSTEM_HW_HANDOFF_DEP)
71 netlist: $(POSTSYN_NETLIST)
75 program: $(ALL_USER_ELF_FILES)
77 download: $(DOWNLOAD_BIT) dummy
78 @echo "*********************************************"
79 @echo "Downloading Bitstream onto the target board"
80 @echo "*********************************************"
81 impact -batch etc/download.cmd
83 init_bram: $(DOWNLOAD_BIT)
85 sim: $(DEFAULT_SIM_SCRIPT)
86 cd simulation/behavioral; \
89 simmodel: $(DEFAULT_SIM_SCRIPT)
91 behavioral_model: $(BEHAVIORAL_SIM_SCRIPT)
93 structural_model: $(STRUCTURAL_SIM_SCRIPT)
95 clean: hwclean libsclean programclean simclean
98 hwclean: netlistclean bitsclean
99 rm -rf implementation synthesis xst hdl
100 rm -rf xst.srp $(SYSTEM).srp
101 rm -f __xps/ise/_xmsgs/bitinit.xmsgs
104 rm -f $(POSTSYN_NETLIST)
106 rm -f __xps/ise/_xmsgs/platgen.xmsgs
111 rm -f implementation/$(SYSTEM).ncd
112 rm -f implementation/$(SYSTEM)_bd.bmm
113 rm -f implementation/$(SYSTEM)_map.ncd
114 rm -f __xps/$(SYSTEM)_routed
117 rm -rf simulation/behavioral
119 rm -f __xps/ise/_xmsgs/simgen.xmsgs
121 swclean: libsclean programclean
124 libsclean: $(LIBSCLEAN_TARGETS)
126 rm -f __xps/ise/_xmsgs/libgen.xmsgs
128 programclean: $(PROGRAMCLEAN_TARGETS)
130 #################################################################
131 # SOFTWARE PLATFORM FLOW
132 #################################################################
135 $(LIBRARIES): $(MHSFILE) $(MSSFILE) __xps/libgen.opt
136 @echo "*********************************************"
137 @echo "Creating software libraries..."
138 @echo "*********************************************"
139 libgen $(LIBGEN_OPTIONS) $(MSSFILE)
145 #################################################################
146 # SOFTWARE APPLICATION RTOSDEMO
147 #################################################################
149 RTOSDemo_program: $(RTOSDEMO_OUTPUT)
151 $(RTOSDEMO_OUTPUT) : $(RTOSDEMO_SOURCES) $(RTOSDEMO_HEADERS) $(RTOSDEMO_LINKER_SCRIPT) \
152 $(LIBRARIES) __xps/rtosdemo_compiler.opt
153 @mkdir -p $(RTOSDEMO_OUTPUT_DIR)
154 $(RTOSDEMO_CC) $(RTOSDEMO_CC_OPT) $(RTOSDEMO_SOURCES) -o $(RTOSDEMO_OUTPUT) \
155 $(RTOSDEMO_OTHER_CC_FLAGS) $(RTOSDEMO_INCLUDES) $(RTOSDEMO_LIBPATH) \
156 $(RTOSDEMO_CFLAGS) $(RTOSDEMO_LFLAGS)
157 $(RTOSDEMO_CC_SIZE) $(RTOSDEMO_OUTPUT)
160 RTOSDemo_programclean:
161 rm -f $(RTOSDEMO_OUTPUT)
163 #################################################################
165 #################################################################
169 $(PPC440_0_BOOTLOOP): $(PPC440_BOOTLOOP)
170 @mkdir -p $(BOOTLOOP_DIR)
171 cp -f $(PPC440_BOOTLOOP) $(PPC440_0_BOOTLOOP)
173 #################################################################
174 # HARDWARE IMPLEMENTATION FLOW
175 #################################################################
179 $(WRAPPER_NGC_FILES): $(MHSFILE) __xps/platgen.opt \
180 $(CORE_STATE_DEVELOPMENT_FILES)
181 @echo "****************************************************"
182 @echo "Creating system netlist for hardware specification.."
183 @echo "****************************************************"
184 platgen $(PLATGEN_OPTIONS) $(MHSFILE)
186 $(POSTSYN_NETLIST): $(WRAPPER_NGC_FILES)
187 @echo "Running synthesis..."
188 bash -c "cd synthesis; ./synthesis.sh"
190 __xps/$(SYSTEM)_routed: $(FPGA_IMP_DEPENDENCY)
191 @echo "*********************************************"
192 @echo "Running Xilinx Implementation tools.."
193 @echo "*********************************************"
194 @cp -f $(UCF_FILE) implementation/$(SYSTEM).ucf
195 @cp -f etc/fast_runtime.opt implementation/xflow.opt
196 xflow -wd implementation -p $(DEVICE) -implement xflow.opt -ise ../__xps/ise/$(SYSTEM).ise $(SYSTEM).ngc
197 touch __xps/$(SYSTEM)_routed
199 $(SYSTEM_BIT): __xps/$(SYSTEM)_routed $(BITGEN_UT_FILE)
200 xilperl $(NON_CYG_XILINX_EDK_DIR)/data/fpga_impl/observe_par.pl $(OBSERVE_PAR_OPTIONS) implementation/$(SYSTEM).par
201 @echo "*********************************************"
202 @echo "Running Bitgen.."
203 @echo "*********************************************"
204 @cp -f $(BITGEN_UT_FILE) implementation/bitgen.ut
205 cd implementation; bitgen -w -f bitgen.ut $(SYSTEM); cd ..
207 $(DOWNLOAD_BIT): $(SYSTEM_BIT) $(BRAMINIT_ELF_FILES) __xps/bitinit.opt
208 @cp -f implementation/$(SYSTEM)_bd.bmm .
209 @echo "*********************************************"
210 @echo "Initializing BRAM contents of the bitstream"
211 @echo "*********************************************"
212 bitinit -p $(DEVICE) $(MHSFILE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_FILE_ARGS) \
213 -bt $(SYSTEM_BIT) -o $(DOWNLOAD_BIT)
214 @rm -f $(SYSTEM)_bd.bmm
216 $(SYSTEM_ACE): $(DOWNLOAD_BIT) $(RTOSDEMO_OUTPUT)
217 @echo "*********************************************"
218 @echo "Creating system ace file"
219 @echo "*********************************************"
220 xmd -tcl genace.tcl -jprog -hw $(DOWNLOAD_BIT) -elf $(RTOSDEMO_OUTPUT) -target ppc_hw -ace $(SYSTEM_ACE)
222 #################################################################
224 #################################################################
227 $(SYSTEM_HW_HANDOFF): $(MHSFILE) __xps/platgen.opt
228 mkdir -p $(SDK_EXPORT_DIR)
229 psf2Edward.exe -inp $(SYSTEM).xmp -xml $(SDK_EXPORT_DIR)/$(SYSTEM).xml $(SEARCHPATHOPT)
230 xdsgen.exe -inp $(SYSTEM).xmp -report $(SDK_EXPORT_DIR)/$(SYSTEM).html $(SEARCHPATHOPT) -make_docs_local
232 $(SYSTEM_HW_HANDOFF_BIT): $(SYSTEM_BIT)
233 @rm -rf $(SYSTEM_HW_HANDOFF_BIT)
234 @cp -f $(SYSTEM_BIT) $(SDK_EXPORT_DIR)/
236 $(SYSTEM_HW_HANDOFF_BMM): implementation/$(SYSTEM)_bd.bmm
237 @rm -rf $(SYSTEM_HW_HANDOFF_BMM)
238 @cp -f implementation/$(SYSTEM)_bd.bmm $(SDK_EXPORT_DIR)/
240 #################################################################
242 #################################################################
245 ################## BEHAVIORAL SIMULATION ##################
247 $(BEHAVIORAL_SIM_SCRIPT): $(MHSFILE) __xps/simgen.opt \
248 $(WRAPPER_NGC_FILES) \
249 $(BRAMINIT_ELF_FILES)
250 @echo "*********************************************"
251 @echo "Creating behavioral simulation models..."
252 @echo "*********************************************"
253 simgen $(SIMGEN_OPTIONS) -m behavioral $(MHSFILE)
255 ################## STRUCTURAL SIMULATION ##################
257 $(STRUCTURAL_SIM_SCRIPT): $(WRAPPER_NGC_FILES) __xps/simgen.opt \
258 $(BRAMINIT_ELF_FILES)
259 @echo "*********************************************"
260 @echo "Creating structural simulation models..."
261 @echo "*********************************************"
262 simgen $(SIMGEN_OPTIONS) -sd implementation -m structural $(MHSFILE)
265 ################## TIMING SIMULATION ##################
267 implementation/$(SYSTEM).ncd: __xps/$(SYSTEM)_routed
269 $(TIMING_SIM_SCRIPT): implementation/$(SYSTEM).ncd __xps/simgen.opt \
270 $(BRAMINIT_ELF_FILES)
271 @echo "*********************************************"
272 @echo "Creating timing simulation models..."
273 @echo "*********************************************"
274 simgen $(SIMGEN_OPTIONS) -sd implementation -m timing $(MHSFILE)