2 * FreeRTOS Kernel V11.2.0
3 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 * SPDX-License-Identifier: MIT
7 * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 * this software and associated documentation files (the "Software"), to deal in
9 * the Software without restriction, including without limitation the rights to
10 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 * the Software, and to permit persons to whom the Software is furnished to do so,
12 * subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in all
15 * copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * https://www.FreeRTOS.org
25 * https://github.com/FreeRTOS
38 /*-----------------------------------------------------------
39 * Port specific definitions.
41 * The settings in this file configure FreeRTOS correctly for the given hardware
44 * These settings should not be altered.
45 *-----------------------------------------------------------
48 /* Type definitions. */
50 #define portFLOAT float
51 #define portDOUBLE double
53 #define portSHORT short
54 #define portSTACK_TYPE size_t
55 #define portBASE_TYPE long
57 typedef portSTACK_TYPE StackType_t;
58 typedef portBASE_TYPE BaseType_t;
59 typedef uint64_t UBaseType_t;
61 typedef uint64_t TickType_t;
62 #define portMAX_DELAY ( ( TickType_t ) 0xffffffffffffffff )
64 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
65 * not need to be guarded with a critical section. */
66 #define portTICK_TYPE_IS_ATOMIC 1
68 /*-----------------------------------------------------------*/
70 /* Hardware specifics. */
71 #define portSTACK_GROWTH ( -1 )
72 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
73 #define portBYTE_ALIGNMENT 16
74 #define portPOINTER_SIZE_TYPE uint64_t
76 /*-----------------------------------------------------------*/
80 /* Called at the end of an ISR that can cause a context switch. */
81 #define portEND_SWITCHING_ISR( xSwitchRequired ) \
83 extern uint64_t ullPortYieldRequired; \
85 if( xSwitchRequired != pdFALSE ) \
87 ullPortYieldRequired = pdTRUE; \
91 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
93 #define portYIELD() __asm volatile ( "SVC 0" ::: "memory" )
95 #define portYIELD() __asm volatile ( "SMC 0" ::: "memory" )
98 /*-----------------------------------------------------------
99 * Critical section control
100 *----------------------------------------------------------*/
102 extern void vPortEnterCritical( void );
103 extern void vPortExitCritical( void );
104 extern UBaseType_t uxPortSetInterruptMask( void );
105 extern void vPortClearInterruptMask( UBaseType_t uxNewMaskValue );
106 extern void vPortInstallFreeRTOSVectorTable( void );
108 #define portDISABLE_INTERRUPTS() \
109 __asm volatile ( "MSR DAIFSET, #2" ::: "memory" ); \
110 __asm volatile ( "DSB SY" ); \
111 __asm volatile ( "ISB SY" );
113 #define portENABLE_INTERRUPTS() \
114 __asm volatile ( "MSR DAIFCLR, #2" ::: "memory" ); \
115 __asm volatile ( "DSB SY" ); \
116 __asm volatile ( "ISB SY" );
119 /* These macros do not globally disable/enable interrupts. They do mask off
120 * interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */
121 #define portENTER_CRITICAL() vPortEnterCritical();
122 #define portEXIT_CRITICAL() vPortExitCritical();
123 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMask()
124 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vPortClearInterruptMask( x )
126 /*-----------------------------------------------------------*/
128 /* Task function macros as described on the FreeRTOS.org WEB site. These are
129 * not required for this port but included in case common demo code that uses these
131 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
132 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
134 /* Prototype of the FreeRTOS tick handler. This must be installed as the
135 * handler for whichever peripheral is used to generate the RTOS tick. */
136 void FreeRTOS_Tick_Handler( void );
138 /* If configUSE_TASK_FPU_SUPPORT is set to 1 (or left undefined) then tasks are
139 * created without an FPU context and must call vPortTaskUsesFPU() to give
140 * themselves an FPU context before using any FPU instructions. If
141 * configUSE_TASK_FPU_SUPPORT is set to 2 then all tasks will have an FPU context
143 #if ( configUSE_TASK_FPU_SUPPORT != 2 )
144 void vPortTaskUsesFPU( void );
146 /* Each task has an FPU context already, so define this function away to
147 * nothing to prevent it from being called accidentally. */
148 #define vPortTaskUsesFPU()
150 #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
152 #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
153 #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
155 /* Architecture specific optimisations. */
156 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
157 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
160 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
162 /* Store/clear the ready priorities in a bit map. */
163 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
164 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
166 /*-----------------------------------------------------------*/
168 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( uxReadyPriorities ) )
170 #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
172 #if ( configASSERT_DEFINED == 1 )
173 void vPortValidateInterruptPriority( void );
174 #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
175 #endif /* configASSERT */
177 #define portNOP() __asm volatile ( "NOP" )
178 #define portINLINE __inline
180 /* The number of bits to shift for an interrupt priority is dependent on the
181 * number of bits implemented by the interrupt controller. */
182 #if configUNIQUE_INTERRUPT_PRIORITIES == 16
183 #define portPRIORITY_SHIFT 4
184 #define portMAX_BINARY_POINT_VALUE 3
185 #elif configUNIQUE_INTERRUPT_PRIORITIES == 32
186 #define portPRIORITY_SHIFT 3
187 #define portMAX_BINARY_POINT_VALUE 2
188 #elif configUNIQUE_INTERRUPT_PRIORITIES == 64
189 #define portPRIORITY_SHIFT 2
190 #define portMAX_BINARY_POINT_VALUE 1
191 #elif configUNIQUE_INTERRUPT_PRIORITIES == 128
192 #define portPRIORITY_SHIFT 1
193 #define portMAX_BINARY_POINT_VALUE 0
194 #elif configUNIQUE_INTERRUPT_PRIORITIES == 256
195 #define portPRIORITY_SHIFT 0
196 #define portMAX_BINARY_POINT_VALUE 0
197 #else /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
198 #error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
199 #endif /* if configUNIQUE_INTERRUPT_PRIORITIES == 16 */
201 #define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
209 #endif /* PORTMACRO_H */