begriffs open source - cmsis-freertos/blob - Demo/CORTEX_LM3Sxxxx

1 /*

2 * FreeRTOS Kernel V10.1.1

4 *

5 * Permission is hereby granted, free of charge, to any person obtaining a copy of

6 * this software and associated documentation files (the "Software"), to deal in

7 * the Software without restriction, including without limitation the rights to

8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of

9 * the Software, and to permit persons to whom the Software is furnished to do so,

10 * subject to the following conditions:

11 *

12 * The above copyright notice and this permission notice shall be included in all

13 * copies or substantial portions of the Software.

14 *

15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS

17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR

18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER

19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

21 *

22 * http://www.FreeRTOS.org

23 * http://aws.amazon.com/freertos

24 *

25 * 1 tab == 4 spaces!

26 */

28 /* Scheduler includes. */

29 #include "FreeRTOS.h"

31 /* Demo includes. */

32 #include "IntQueueTimer.h"

33 #include "IntQueue.h"

35 /* Library includes. */

36 #include "hw_ints.h"

37 #include "hw_memmap.h"

38 #include "hw_types.h"

39 #include "interrupt.h"

40 #include "sysctl.h"

41 #include "lmi_timer.h"

43 #define tmrTIMER_2_FREQUENCY ( 2000UL )

44 #define tmrTIMER_3_FREQUENCY ( 2001UL )

46 void vInitialiseTimerForIntQueueTest( void )

47 {

48 unsigned long ulFrequency;

50 /* Timer 2 and 3 are utilised for this test. */

51 SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER2 );

52 SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER3 );

53 TimerConfigure( TIMER2_BASE, TIMER_CFG_32_BIT_PER );

54 TimerConfigure( TIMER3_BASE, TIMER_CFG_32_BIT_PER );

56 /* Set the timer interrupts to be above the kernel. The interrupts are

57 assigned different priorities so they nest with each other. */

58 IntPrioritySet( INT_TIMER2A, configMAX_SYSCALL_INTERRUPT_PRIORITY + ( 1 << 5 ) ); /* Shift left 5 as only the top 3 bits are implemented. */

59 IntPrioritySet( INT_TIMER3A, configMAX_SYSCALL_INTERRUPT_PRIORITY );

61 /* Ensure interrupts do not start until the scheduler is running. */

62 portDISABLE_INTERRUPTS();

64 /* The rate at which the timers will interrupt. */

65 ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY;

66 TimerLoadSet( TIMER2_BASE, TIMER_A, ulFrequency );

67 IntEnable( INT_TIMER2A );

68 TimerIntEnable( TIMER2_BASE, TIMER_TIMA_TIMEOUT );

70 /* The rate at which the timers will interrupt. */

71 ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_3_FREQUENCY;

72 TimerLoadSet( TIMER3_BASE, TIMER_A, ulFrequency );

73 IntEnable( INT_TIMER3A );

74 TimerIntEnable( TIMER3_BASE, TIMER_TIMA_TIMEOUT );

76 /* Enable both timers. */

77 TimerEnable( TIMER2_BASE, TIMER_A );

78 TimerEnable( TIMER3_BASE, TIMER_A );

79 }

80 /*-----------------------------------------------------------*/

82 void vT2InterruptHandler( void )

83 {

84 TimerIntClear( TIMER2_BASE, TIMER_TIMA_TIMEOUT );

85 portEND_SWITCHING_ISR( xFirstTimerHandler() );

86 }

87 /*-----------------------------------------------------------*/

89 void vT3InterruptHandler( void )

90 {

91 TimerIntClear( TIMER3_BASE, TIMER_TIMA_TIMEOUT );

92 portEND_SWITCHING_ISR( xSecondTimerHandler() );

93 }