begriffs open source - cmsis-freertos/blob - Demo/PIC32MZ

1 /*

2 * FreeRTOS Kernel V10.1.1

4 *

5 * Permission is hereby granted, free of charge, to any person obtaining a copy of

6 * this software and associated documentation files (the "Software"), to deal in

7 * the Software without restriction, including without limitation the rights to

8 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of

9 * the Software, and to permit persons to whom the Software is furnished to do so,

10 * subject to the following conditions:

11 *

12 * The above copyright notice and this permission notice shall be included in all

13 * copies or substantial portions of the Software.

14 *

15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS

17 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR

18 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER

19 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

21 *

22 * http://www.FreeRTOS.org

23 * http://aws.amazon.com/freertos

24 *

25 * 1 tab == 4 spaces!

26 */

27

28

29 #include <xc.h>

30 #include <sys/asm.h>

31 #include "FreeRTOSConfig.h"

32

33 .set nomips16

34 .set noreorder

35

36

37 .global vRegTest1

38 .global vRegTest2

39

40 /************************************************************************/

41 /* Reg test macro helper. Test a register for a known value branching to

42 error_loop if not correct otherwise continuing on */

43 .macro portREG_TEST work_reg, test_reg, test_value

44

45 /* Check each register maintains the value assigned to it for the lifetime

46 of the task. */

47 addiu \work_reg, $0, 0x00

48 addiu \work_reg, \test_reg, -\test_value

49 beq \work_reg, $0, 1f

50 nop

51 /* The register value was not that expected. Jump to the error loop so the

52 cycle counter stops incrementing. */

53 b error_loop

54 nop

55 1:

56 .endm

57

58 /************************************************************************/

59 /* FPU reg test macro helper, Test an FPU register for a known value branching to

60 error_loop if not correct otherwise continuing on */

61 #if ( __mips_hard_float == 1) && ( configUSE_TASK_FPU_SUPPORT == 1 )

62 .macro portFPU_REG_TEST work_reg, test_reg, test_value

63 /* get the lower 32 bit value from the FPU and compare to the test value */

64 mfc1 \work_reg, \test_reg

65 addiu \work_reg, \work_reg, -\test_value

66 beq \work_reg, $0, 1f

67 nop

68

69 /* The register values was not that expected. Jump to the error loop */

70 b error_loop

71 nop

72 1:

73 .endm

74 #endif

75

76

77 /************************************************************************/

78 .set noreorder

79 .set noat

80 .ent error_loop

81

82 /* Reg test tasks call the error loop when they find an error. Sitting in the

83 tight error loop prevents them incrementing their ulRegTestnCycles counter, and

84 so allows the check softwate timer to know an error has been found. */

85 error_loop:

86 b .

87 nop

88

89 .end error_loop

90

91

92 .set noreorder

93 .set noat

94 .ent vRegTest1

95

96 vRegTest1:

97 /* Fill the registers with known values. */

98 addiu $1, $0, 0x11

99 addiu $2, $0, 0x12

100 addiu $3, $0, 0x13

101 /* $4 contains the address of the loop counter - don't mess with $4. */

102 addiu $5, $0, 0x15

103 addiu $6, $0, 0x16

104 addiu $7, $0, 0x17

105 addiu $8, $0, 0x18

106 addiu $9, $0, 0x19

107 addiu $10, $0, 0x110

108 addiu $11, $0, 0x111

109 addiu $12, $0, 0x112

110 addiu $13, $0, 0x113

111 addiu $14, $0, 0x114

112 addiu $15, $0, 0x115

113 addiu $16, $0, 0x116

114 addiu $17, $0, 0x117

115 addiu $18, $0, 0x118

116 addiu $19, $0, 0x119

117 addiu $20, $0, 0x120

118 addiu $21, $0, 0x121

119 addiu $23, $0, 0x123

120 addiu $24, $0, 0x124

121 addiu $25, $0, 0x125

122 addiu $30, $0, 0x130

123 addiu $22, $0, 0x131

124 mthi $22, $ac1

125 addiu $22, $0, 0x132

126 mtlo $22, $ac1

127 addiu $22, $0, 0x133

128 mthi $22, $ac2

129 addiu $22, $0, 0x134

130 mtlo $22, $ac2

131 addiu $22, $0, 0x135

132 mthi $22, $ac3

133 addiu $22, $0, 0x136

134 mtlo $22, $ac3

135

136 /* Test the FPU registers if they are present on the part. */

137 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )

138 addiu $22, $0, 0x180

139 mtc1 $22, $f0

140 addiu $22, $0, 0x181

141 mtc1 $22, $f1

142 addiu $22, $0, 0x182

143 mtc1 $22, $f2

144 addiu $22, $0, 0x183

145 mtc1 $22, $f3

146 addiu $22, $0, 0x184

147 mtc1 $22, $f4

148 addiu $22, $0, 0x185

149 mtc1 $22, $f5

150 addiu $22, $0, 0x186

151 mtc1 $22, $f6

152 addiu $22, $0, 0x187

153 mtc1 $22, $f7

154 addiu $22, $0, 0x188

155 mtc1 $22, $f8

156 addiu $22, $0, 0x189

157 mtc1 $22, $f9

158 addiu $22, $0, 0x18A

159 mtc1 $22, $f10

160 addiu $22, $0, 0x18B

161 mtc1 $22, $f11

162 addiu $22, $0, 0x18C

163 mtc1 $22, $f12

164 addiu $22, $0, 0x18D

165 mtc1 $22, $f13

166 addiu $22, $0, 0x18E

167 mtc1 $22, $f14

168 addiu $22, $0, 0x18F

169 mtc1 $22, $f15

170 addiu $22, $0, 0x190

171 mtc1 $22, $f16

172 addiu $22, $0, 0x191

173 mtc1 $22, $f17

174 addiu $22, $0, 0x192

175 mtc1 $22, $f18

176 addiu $22, $0, 0x193

177 mtc1 $22, $f19

178 addiu $22, $0, 0x194

179 mtc1 $22, $f20

180 addiu $22, $0, 0x195

181 mtc1 $22, $f21

182 addiu $22, $0, 0x196

183 mtc1 $22, $f22

184 addiu $22, $0, 0x197

185 mtc1 $22, $f23

186 addiu $22, $0, 0x198

187 mtc1 $22, $f24

188 addiu $22, $0, 0x199

189 mtc1 $22, $f25

190 addiu $22, $0, 0x19A

191 mtc1 $22, $f26

192 addiu $22, $0, 0x19B

193 mtc1 $22, $f27

194 addiu $22, $0, 0x19C

195 mtc1 $22, $f28

196 addiu $22, $0, 0x19D

197 mtc1 $22, $f29

198 addiu $22, $0, 0x19E

199 mtc1 $22, $f30

200 addiu $22, $0, 0x19F

201 mtc1 $22, $f31

202 #endif

203

204 vRegTest1Loop:

205 portREG_TEST $22, $1, 0x11

206 portREG_TEST $22, $2, 0x12

207 portREG_TEST $22, $3, 0x13

208 /* Do not test r4 as we are using it as a loop counter */

209 portREG_TEST $22, $5, 0x15

210 portREG_TEST $22, $6, 0x16

211 portREG_TEST $22, $7, 0x17

212 portREG_TEST $22, $8, 0x18

213 portREG_TEST $22, $9, 0x19

214 portREG_TEST $22, $10, 0x110

215 portREG_TEST $22, $11, 0x111

216 portREG_TEST $22, $12, 0x112

217 portREG_TEST $22, $13, 0x113

218 portREG_TEST $22, $14, 0x114

219 portREG_TEST $22, $15, 0x115

220 portREG_TEST $22, $16, 0x116

221 portREG_TEST $22, $17, 0x117

222 portREG_TEST $22, $18, 0x118

223 portREG_TEST $22, $19, 0x119

224 portREG_TEST $22, $20, 0x120

225 portREG_TEST $22, $21, 0x121

226 /* Do not test r22, used as a helper */

227 portREG_TEST $22, $23, 0x123

228 portREG_TEST $22, $24, 0x124

229 portREG_TEST $22, $25, 0x125

230 portREG_TEST $22, $30, 0x130

231

232 mfhi $22, $ac1

233 addiu $22, $22, -0x131

234 beq $22, $0, .+16

235 nop

236 b error_loop

237 nop

238

239 mflo $22, $ac1

240 addiu $22, $22, -0x132

241 beq $22, $0, .+16

242 nop

243 b error_loop

244 nop

245

246 mfhi $22, $ac2

247 addiu $22, $22, -0x133

248 beq $22, $0, .+16

249 nop

250 b error_loop

251 nop

252

253 mflo $22, $ac2

254 addiu $22, $22, -0x134

255 beq $22, $0, .+16

256 nop

257 b error_loop

258 nop

259

260 mfhi $22, $ac3

261 addiu $22, $22, -0x135

262 beq $22, $0, .+16

263 nop

264 b error_loop

265 nop

266

267 mflo $22, $ac3

268 addiu $22, $22, -0x136

269 beq $22, $0, .+16

270 nop

271 b error_loop

272 nop

273

274 /* Test the FPU registers if they are present on the part. */

275 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )

276 portFPU_REG_TEST $22, $f0, 0x180

277 portFPU_REG_TEST $22, $f1, 0x181

278 portFPU_REG_TEST $22, $f2, 0x182

279 portFPU_REG_TEST $22, $f3, 0x183

280 portFPU_REG_TEST $22, $f4, 0x184

281 portFPU_REG_TEST $22, $f5, 0x185

282 portFPU_REG_TEST $22, $f6, 0x186

283 portFPU_REG_TEST $22, $f7, 0x187

284 portFPU_REG_TEST $22, $f8, 0x188

285 portFPU_REG_TEST $22, $f9, 0x189

286 portFPU_REG_TEST $22, $f10, 0x18A

287 portFPU_REG_TEST $22, $f11, 0x18B

288 portFPU_REG_TEST $22, $f12, 0x18C

289 portFPU_REG_TEST $22, $f13, 0x18D

290 portFPU_REG_TEST $22, $f14, 0x18E

291 portFPU_REG_TEST $22, $f15, 0x18F

292 portFPU_REG_TEST $22, $f16, 0x190

293 portFPU_REG_TEST $22, $f17, 0x191

294 portFPU_REG_TEST $22, $f18, 0x192

295 portFPU_REG_TEST $22, $f19, 0x193

296 portFPU_REG_TEST $22, $f20, 0x194

297 portFPU_REG_TEST $22, $f21, 0x195

298 portFPU_REG_TEST $22, $f22, 0x196

299 portFPU_REG_TEST $22, $f23, 0x197

300 portFPU_REG_TEST $22, $f24, 0x198

301 portFPU_REG_TEST $22, $f25, 0x199

302 portFPU_REG_TEST $22, $f26, 0x19A

303 portFPU_REG_TEST $22, $f27, 0x19B

304 portFPU_REG_TEST $22, $f28, 0x19C

305 portFPU_REG_TEST $22, $f29, 0x19D

306 portFPU_REG_TEST $22, $f30, 0x19E

307 portFPU_REG_TEST $22, $f31, 0x19F

308 #endif

309

310 /* No errors detected. Increment the loop count so the check timer knows

311 this task is still running without error, then loop back to do it all

312 again. The address of the loop counter is in $4. */

313 lw $22, 0( $4 )

314 addiu $22, $22, 0x01

315 sw $22, 0( $4 )

316 b vRegTest1Loop

317 nop

318

319 .end vRegTest1

320

321 /************************************************************************/

322 .set noreorder

323 .set noat

324 .ent vRegTest2

325

326 vRegTest2:

327 addiu $1, $0, 0x21

328 addiu $2, $0, 0x22

329 addiu $3, $0, 0x23

330 /* $4 contains the address of the loop counter - don't mess with $4. */

331 addiu $5, $0, 0x25

332 addiu $6, $0, 0x26

333 addiu $7, $0, 0x27

334 addiu $8, $0, 0x28

335 addiu $9, $0, 0x29

336 addiu $10, $0, 0x210

337 addiu $11, $0, 0x211

338 addiu $12, $0, 0x212

339 addiu $13, $0, 0x213

340 addiu $14, $0, 0x214

341 addiu $15, $0, 0x215

342 addiu $16, $0, 0x216

343 addiu $17, $0, 0x217

344 addiu $18, $0, 0x218

345 addiu $19, $0, 0x219

346 addiu $20, $0, 0x220

347 addiu $21, $0, 0x221

348 addiu $23, $0, 0x223

349 addiu $24, $0, 0x224

350 addiu $25, $0, 0x225

351 addiu $30, $0, 0x230

352 addiu $22, $0, 0x231

353 mthi $22, $ac1

354 addiu $22, $0, 0x232

355 mtlo $22, $ac1

356 addiu $22, $0, 0x233

357 mthi $22, $ac2

358 addiu $22, $0, 0x234

359 mtlo $22, $ac2

360 addiu $22, $0, 0x235

361 mthi $22, $ac3

362 addiu $22, $0, 0x236

363 mtlo $22, $ac3

364

365 /* Test the FPU registers if they are present on the part. */

366 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )

367 addiu $22, $0, 0x280

368 mtc1 $22, $f0

369 addiu $22, $0, 0x281

370 mtc1 $22, $f1

371 addiu $22, $0, 0x282

372 mtc1 $22, $f2

373 addiu $22, $0, 0x283

374 mtc1 $22, $f3

375 addiu $22, $0, 0x284

376 mtc1 $22, $f4

377 addiu $22, $0, 0x285

378 mtc1 $22, $f5

379 addiu $22, $0, 0x286

380 mtc1 $22, $f6

381 addiu $22, $0, 0x287

382 mtc1 $22, $f7

383 addiu $22, $0, 0x288

384 mtc1 $22, $f8

385 addiu $22, $0, 0x289

386 mtc1 $22, $f9

387 addiu $22, $0, 0x28A

388 mtc1 $22, $f10

389 addiu $22, $0, 0x28B

390 mtc1 $22, $f11

391 addiu $22, $0, 0x28C

392 mtc1 $22, $f12

393 addiu $22, $0, 0x28D

394 mtc1 $22, $f13

395 addiu $22, $0, 0x28E

396 mtc1 $22, $f14

397 addiu $22, $0, 0x28F

398 mtc1 $22, $f15

399 addiu $22, $0, 0x290

400 mtc1 $22, $f16

401 addiu $22, $0, 0x291

402 mtc1 $22, $f17

403 addiu $22, $0, 0x292

404 mtc1 $22, $f18

405 addiu $22, $0, 0x293

406 mtc1 $22, $f19

407 addiu $22, $0, 0x294

408 mtc1 $22, $f20

409 addiu $22, $0, 0x295

410 mtc1 $22, $f21

411 addiu $22, $0, 0x296

412 mtc1 $22, $f22

413 addiu $22, $0, 0x297

414 mtc1 $22, $f23

415 addiu $22, $0, 0x298

416 mtc1 $22, $f24

417 addiu $22, $0, 0x299

418 mtc1 $22, $f25

419 addiu $22, $0, 0x29A

420 mtc1 $22, $f26

421 addiu $22, $0, 0x29B

422 mtc1 $22, $f27

423 addiu $22, $0, 0x29C

424 mtc1 $22, $f28

425 addiu $22, $0, 0x29D

426 mtc1 $22, $f29

427 addiu $22, $0, 0x29E

428 mtc1 $22, $f30

429 addiu $22, $0, 0x29F

430 mtc1 $22, $f31

431 #endif

432

433 vRegTest2Loop:

434 portREG_TEST $22, $1, 0x21

435 portREG_TEST $22, $2, 0x22

436 portREG_TEST $22, $3, 0x23

437 /* Do not test r4 as we are using it as a loop counter */

438 portREG_TEST $22, $5, 0x25

439 portREG_TEST $22, $6, 0x26

440 portREG_TEST $22, $7, 0x27

441 portREG_TEST $22, $8, 0x28

442 portREG_TEST $22, $9, 0x29

443 portREG_TEST $22, $10, 0x210

444 portREG_TEST $22, $11, 0x211

445 portREG_TEST $22, $12, 0x212

446 portREG_TEST $22, $13, 0x213

447 portREG_TEST $22, $14, 0x214

448 portREG_TEST $22, $15, 0x215

449 portREG_TEST $22, $16, 0x216

450 portREG_TEST $22, $17, 0x217

451 portREG_TEST $22, $18, 0x218

452 portREG_TEST $22, $19, 0x219

453 portREG_TEST $22, $20, 0x220

454 portREG_TEST $22, $21, 0x221

455 /* Do not test r22, used as a helper */

456 portREG_TEST $22, $23, 0x223

457 portREG_TEST $22, $24, 0x224

458 portREG_TEST $22, $25, 0x225

459 portREG_TEST $22, $30, 0x230

460

461 mfhi $22, $ac1

462 addiu $22, $22, -0x231

463 beq $22, $0, .+16

464 nop

465 b error_loop

466 nop

467

468 mflo $22, $ac1

469 addiu $22, $22, -0x232

470 beq $22, $0, .+16

471 nop

472 b error_loop

473 nop

474

475 mfhi $22, $ac2

476 addiu $22, $22, -0x233

477 beq $22, $0, .+16

478 nop

479 b error_loop

480 nop

481

482 mflo $22, $ac2

483 addiu $22, $22, -0x234

484 beq $22, $0, .+16

485 nop

486 b error_loop

487 nop

488

489 mfhi $22, $ac3

490 addiu $22, $22, -0x235

491 beq $22, $0, .+16

492 nop

493 b error_loop

494 nop

495

496 mflo $22, $ac3

497 addiu $22, $22, -0x236

498 beq $22, $0, .+16

499 nop

500 b error_loop

501 nop

502

503 /* Test the FPU registers if they are present on the part. */

504 #if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )

505 portFPU_REG_TEST $22, $f0, 0x280

506 portFPU_REG_TEST $22, $f1, 0x281

507 portFPU_REG_TEST $22, $f2, 0x282

508 portFPU_REG_TEST $22, $f3, 0x283

509 portFPU_REG_TEST $22, $f4, 0x284

510 portFPU_REG_TEST $22, $f5, 0x285

511 portFPU_REG_TEST $22, $f6, 0x286

512 portFPU_REG_TEST $22, $f7, 0x287

513 portFPU_REG_TEST $22, $f8, 0x288

514 portFPU_REG_TEST $22, $f9, 0x289

515 portFPU_REG_TEST $22, $f10, 0x28A

516 portFPU_REG_TEST $22, $f11, 0x28B

517 portFPU_REG_TEST $22, $f12, 0x28C

518 portFPU_REG_TEST $22, $f13, 0x28D

519 portFPU_REG_TEST $22, $f14, 0x28E

520 portFPU_REG_TEST $22, $f15, 0x28F

521 portFPU_REG_TEST $22, $f16, 0x290

522 portFPU_REG_TEST $22, $f17, 0x291

523 portFPU_REG_TEST $22, $f18, 0x292

524 portFPU_REG_TEST $22, $f19, 0x293

525 portFPU_REG_TEST $22, $f20, 0x294

526 portFPU_REG_TEST $22, $f21, 0x295

527 portFPU_REG_TEST $22, $f22, 0x296

528 portFPU_REG_TEST $22, $f23, 0x297

529 portFPU_REG_TEST $22, $f24, 0x298

530 portFPU_REG_TEST $22, $f25, 0x299

531 portFPU_REG_TEST $22, $f26, 0x29A

532 portFPU_REG_TEST $22, $f27, 0x29B

533 portFPU_REG_TEST $22, $f28, 0x29C

534 portFPU_REG_TEST $22, $f29, 0x29D

535 portFPU_REG_TEST $22, $f30, 0x29E

536 portFPU_REG_TEST $22, $f31, 0x29F

537 #endif

538

539 /* No errors detected. Increment the loop count so the check timer knows

540 this task is still running without error, then loop back to do it all

541 again. The address of the loop counter is in $4. */

542 lw $22, 0( $4 )

543 addiu $22, $22, 0x01

544 sw $22, 0( $4 )

545 b vRegTest2Loop

546 nop

548 .end vRegTest2