begriffs open source - cmsis-freertos/blob - Demo/ARM7_STR71x_IAR/71x

1 #include "FreeRTOSConfig.h"

3 ;* File Name : 71x_vect.s

4 ;* Author : MCD Application Team

5 ;* Date First Issued : 16/05/2003

6 ;* Description : This file used to initialize the exception and IRQ

7 ;* vectors, and to enter/return to/from exceptions handlers.

8 ;*******************************************************************************

9 ;* History:

10 ;* 13/01/2006 : V3.1

11 ;* 24/05/2005 : V3.0

12 ;* 30/11/2004 : V2.0

13 ;* 14/07/2004 : V1.3

14 ;* 01/01/2004 : V1.2

15 ;*******************************************************************************

16 ; THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH

17 ; CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.

18 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT

19 ; OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT

20 ; OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION

21 ; CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.

22 ;*******************************************************************************/

23

24 MODULE ?RESET

25 SECTION .intvec:CODE(2)

26 CODE32

27

28 EIC_base_addr EQU 0xFFFFF800; EIC base address.

29 CICR_off_addr EQU 0x04 ; Current Interrupt Channel Register.

30 IVR_off_addr EQU 0x18 ; Interrupt Vector Register.

31 IPR_off_addr EQU 0x40 ; Interrupt Pending Register.

32

33

34 ;*******************************************************************************

35 ; Import the __iar_program_start address from 71x_init.s

36 ;*******************************************************************************

37

38 IMPORT __iar_program_start

39

40 ;*******************************************************************************

41 ; Import exception handlers

42 ;*******************************************************************************

43

44 IMPORT Undefined_Handler

45 IMPORT Prefetch_Handler

46 IMPORT Abort_Handler

47 IMPORT FIQ_Handler

48

49 ;*******************************************************************************

50 ; Import IRQ handlers from 71x_it.c

51 ;*******************************************************************************

52

53 IMPORT Default_Handler

54 IMPORT vPortYieldProcessor

55 IMPORT vSerialISREntry

56 IMPORT vPortPreemptiveTickISR

57 IMPORT vPortNonPreemptiveTick

58

59 ;*******************************************************************************

60 ; Export Peripherals IRQ handlers table address

61 ;*******************************************************************************

62

63 EXPORT T0TIMI_Addr

64

65 ;*******************************************************************************

66 ; Exception vectors

67 ;*******************************************************************************

68 IVR_ADDR DEFINE 0xFFFFF818

69

70 LDR PC, Reset_Addr

71 LDR PC, Undefined_Addr

72 LDR PC, SWI_Addr

73 LDR PC, Prefetch_Addr

74 LDR PC, Abort_Addr

75 NOP ; Reserved vector

76 LDR PC, =IVR_ADDR

77 LDR PC, FIQ_Addr

78

79 ;*******************************************************************************

80 ; Exception handlers address table

81 ;*******************************************************************************

82

83 Reset_Addr DCD __iar_program_start

84 Undefined_Addr DCD UndefinedHandler

85 SWI_Addr DCD vPortYieldProcessor

86 Prefetch_Addr DCD PrefetchAbortHandler

87 Abort_Addr DCD DataAbortHandler

88 DCD 0 ; Reserved vector

89 IRQ_Addr DCD 0 ; Direct vectors are used. See the STR75x demo for an alternative implementation

90 FIQ_Addr DCD FIQHandler

91

92 ;*******************************************************************************

93 ; Peripherals IRQ handlers address table

94 ;*******************************************************************************

95

96 T0TIMI_Addr DCD Default_Handler

97 FLASH_Addr DCD Default_Handler

98 RCCU_Addr DCD Default_Handler

99 RTC_Addr DCD Default_Handler

100 #if configUSE_PREEMPTION == 0

101 WDG_Addr DCD vPortNonPreemptiveTick ; Tick ISR if the cooperative scheduler is used.

102 #else

103 WDG_Addr DCD vPortPreemptiveTickISR ; Tick ISR if the preemptive scheduler is used.

104 #endif

105 XTI_Addr DCD Default_Handler

106 USBHP_Addr DCD Default_Handler

107 I2C0ITERR_Addr DCD Default_Handler

108 I2C1ITERR_ADDR DCD Default_Handler

109 UART0_Addr DCD vSerialISREntry

110 UART1_Addr DCD Default_Handler

111 UART2_ADDR DCD Default_Handler

112 UART3_ADDR DCD Default_Handler

113 BSPI0_ADDR DCD Default_Handler

114 BSPI1_Addr DCD Default_Handler

115 I2C0_Addr DCD Default_Handler

116 I2C1_Addr DCD Default_Handler

117 CAN_Addr DCD Default_Handler

118 ADC12_Addr DCD Default_Handler

119 T1TIMI_Addr DCD Default_Handler

120 T2TIMI_Addr DCD Default_Handler

121 T3TIMI_Addr DCD Default_Handler

122 DCD 0 ; reserved

123 DCD 0 ; reserved

124 DCD 0 ; reserved

125 HDLC_Addr DCD Default_Handler

126 USBLP_Addr DCD Default_Handler

127 DCD 0 ; reserved

128 DCD 0 ; reserved

129 T0TOI_Addr DCD Default_Handler

130 T0OC1_Addr DCD Default_Handler

131 T0OC2_Addr DCD Default_Handler

132

133

134 ;*******************************************************************************

135 ; Exception Handlers

136 ;*******************************************************************************

137

138 ;*******************************************************************************

139 ;* Macro Name : SaveContext

140 ;* Description : This macro used to save the context before entering

141 ; an exception handler.

142 ;* Input : The range of registers to store.

143 ;* Output : none

144 ;*******************************************************************************

145

146 SaveContext MACRO reg1,reg2

147

148 STMFD sp!,{reg1-reg2,lr} ; Save The workspace plus the current return

149 ; address lr_ mode into the stack.

150 MRS r1,spsr ; Save the spsr_mode into r1.

151 STMFD sp!,{r1} ; Save spsr.

152 ENDM

153

154 ;*******************************************************************************

155 ;* Macro Name : RestoreContext

156 ;* Description : This macro used to restore the context to return from

157 ; an exception handler and continue the program execution.

158 ;* Input : The range of registers to restore.

159 ;* Output : none

160 ;*******************************************************************************

161

162 RestoreContext MACRO reg1,reg2

163

164 LDMFD sp!,{r1} ; Restore the saved spsr_mode into r1.

165 MSR spsr_cxsf,r1 ; Restore spsr_mode.

166 LDMFD sp!,{reg1-reg2,pc}^; Return to the instruction following...

167 ; ...the exception interrupt.

168 ENDM

169

170 ;*******************************************************************************

171 ;* Function Name : UndefinedHandler

172 ;* Description : This function called when undefined instruction

173 ; exception is entered.

174 ;* Input : none

175 ;* Output : none

176 ;*******************************************************************************

177 UndefinedHandler

178 SaveContext r0,r12 ; Save the workspace plus the current

179 ; return address lr_ und and spsr_und.

180 ldr r0,=Undefined_Handler

181 ldr lr,=Undefined_Handler_end

182 bx r0 ; Branch to Undefined_Handler

183 Undefined_Handler_end:

184 RestoreContext r0,r12 ; Return to the instruction following...

185 ; ...the undefined instruction.

186

187

188 ;*******************************************************************************

189 ;* Function Name : PrefetchAbortHandler

190 ;* Description : This function called when Prefetch Abort

191 ; exception is entered.

192 ;* Input : none

193 ;* Output : none

194 ;*******************************************************************************

195

196 PrefetchAbortHandler

197 SUB lr,lr,#4 ; Update the link register.

198 SaveContext r0,r12 ; Save the workspace plus the current

199 ; return address lr_abt and spsr_abt.

200 ldr r0,=Prefetch_Handler

201 ldr lr,=Prefetch_Handler_end

202

203 bx r0 ; Branch to Prefetch_Handler.

204 Prefetch_Handler_end:

205 RestoreContext r0,r12 ; Return to the instruction following that...

206 ; ...has generated the prefetch abort exception.

207

208 ;*******************************************************************************

209 ;* Function Name : DataAbortHandler

210 ;* Description : This function is called when Data Abort

211 ; exception is entered.

212 ;* Input : none

213 ;* Output : none

214 ;*******************************************************************************

215

216 DataAbortHandler

217 SUB lr,lr,#8 ; Update the link register.

218 SaveContext r0,r12 ; Save the workspace plus the current

219 ; return address lr_ abt and spsr_abt.

220 ldr r0,=Abort_Handler

221 ldr lr,=Abort_Handler_end

222

223 bx r0 ; Branch to Abort_Handler.

224 Abort_Handler_end:

225 RestoreContext r0,r12 ; Return to the instruction following that...

226 ; ...has generated the data abort exception.

227

228 ;*******************************************************************************

229 ;* Function Name : FIQHandler

230 ;* Description : This function is called when FIQ

231 ; exception is entered.

232 ;* Input : none

233 ;* Output : none

234 ;*******************************************************************************

235

236 FIQHandler

237 SUB lr,lr,#4 ; Update the link register.

238 SaveContext r0,r7 ; Save the workspace plus the current

239 ; return address lr_ fiq and spsr_fiq.

240 ldr r0,=FIQ_Handler

241 ldr lr,=FIQ_Handler_end

242

243 bx r0 ; Branch to FIQ_Handler.

244 FIQ_Handler_end:

245 RestoreContext r0,r7 ; Restore the context and return to the...

246 ; ...program execution.

247

248

249

250 LTORG

251

252 END