1 //*****************************************************************************
3 // sysctl.h - Prototypes for the system control driver.
5 // Copyright (c) 2005,2006 Luminary Micro, Inc. All rights reserved.
7 // Software License Agreement
9 // Luminary Micro, Inc. (LMI) is supplying this software for use solely and
10 // exclusively on LMI's Stellaris Family of microcontroller products.
12 // The software is owned by LMI and/or its suppliers, and is protected under
13 // applicable copyright laws. All rights are reserved. Any use in violation
14 // of the foregoing restrictions may subject the user to criminal sanctions
15 // under applicable laws, as well as to civil liability for the breach of the
16 // terms and conditions of this license.
18 // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
22 // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 // This is part of revision 991 of the Stellaris Driver Library.
26 //*****************************************************************************
36 //*****************************************************************************
38 // The following are values that can be passed to the
39 // SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
40 // SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
41 // ulPeripheral parameter. The peripherals in the fourth group (upper nibble
42 // is 3) can only be used with the SysCtlPeripheralPresent() API.
44 //*****************************************************************************
45 #define SYSCTL_PERIPH_PWM 0x00100000 // PWM
46 #define SYSCTL_PERIPH_ADC 0x00010000 // ADC
47 #define SYSCTL_PERIPH_WDOG 0x00000008 // Watchdog
48 #define SYSCTL_PERIPH_UART0 0x10000001 // UART 0
49 #define SYSCTL_PERIPH_UART1 0x10000002 // UART 1
50 #define SYSCTL_PERIPH_SSI 0x10000010 // SSI
51 #define SYSCTL_PERIPH_QEI 0x10000100 // QEI
52 #define SYSCTL_PERIPH_I2C 0x10001000 // I2C
53 #define SYSCTL_PERIPH_TIMER0 0x10010000 // Timer 0
54 #define SYSCTL_PERIPH_TIMER1 0x10020000 // Timer 1
55 #define SYSCTL_PERIPH_TIMER2 0x10040000 // Timer 2
56 #define SYSCTL_PERIPH_COMP0 0x11000000 // Analog comparator 0
57 #define SYSCTL_PERIPH_COMP1 0x12000000 // Analog comparator 1
58 #define SYSCTL_PERIPH_COMP2 0x14000000 // Analog comparator 2
59 #define SYSCTL_PERIPH_GPIOA 0x20000001 // GPIO A
60 #define SYSCTL_PERIPH_GPIOB 0x20000002 // GPIO B
61 #define SYSCTL_PERIPH_GPIOC 0x20000004 // GPIO C
62 #define SYSCTL_PERIPH_GPIOD 0x20000008 // GPIO D
63 #define SYSCTL_PERIPH_GPIOE 0x20000010 // GPIO E
64 #define SYSCTL_PERIPH_MPU 0x30000080 // Cortex-M3 MPU
65 #define SYSCTL_PERIPH_TEMP 0x30000020 // Temperature sensor
66 #define SYSCTL_PERIPH_PLL 0x30000010 // PLL
68 //*****************************************************************************
70 // The following are values that can be passed to the SysCtlPinPresent() API
71 // as the ulPin parameter.
73 //*****************************************************************************
74 #define SYSCTL_PIN_PWM0 0x00000001 // PWM0 pin
75 #define SYSCTL_PIN_PWM1 0x00000002 // PWM1 pin
76 #define SYSCTL_PIN_PWM2 0x00000004 // PWM2 pin
77 #define SYSCTL_PIN_PWM3 0x00000008 // PWM3 pin
78 #define SYSCTL_PIN_PWM4 0x00000010 // PWM4 pin
79 #define SYSCTL_PIN_PWM5 0x00000020 // PWM5 pin
80 #define SYSCTL_PIN_C0MINUS 0x00000040 // C0- pin
81 #define SYSCTL_PIN_C0PLUS 0x00000080 // C0+ pin
82 #define SYSCTL_PIN_C0O 0x00000100 // C0o pin
83 #define SYSCTL_PIN_C1MINUS 0x00000200 // C1- pin
84 #define SYSCTL_PIN_C1PLUS 0x00000400 // C1+ pin
85 #define SYSCTL_PIN_C1O 0x00000800 // C1o pin
86 #define SYSCTL_PIN_C2MINUS 0x00001000 // C2- pin
87 #define SYSCTL_PIN_C2PLUS 0x00002000 // C2+ pin
88 #define SYSCTL_PIN_C2O 0x00004000 // C2o pin
89 #define SYSCTL_PIN_ADC0 0x00010000 // ADC0 pin
90 #define SYSCTL_PIN_ADC1 0x00020000 // ADC1 pin
91 #define SYSCTL_PIN_ADC2 0x00040000 // ADC2 pin
92 #define SYSCTL_PIN_ADC3 0x00080000 // ADC3 pin
93 #define SYSCTL_PIN_ADC4 0x00100000 // ADC4 pin
94 #define SYSCTL_PIN_ADC5 0x00200000 // ADC5 pin
95 #define SYSCTL_PIN_ADC6 0x00400000 // ADC6 pin
96 #define SYSCTL_PIN_ADC7 0x00800000 // ADC7 pin
97 #define SYSCTL_PIN_CCP0 0x01000000 // CCP0 pin
98 #define SYSCTL_PIN_CCP1 0x02000000 // CCP1 pin
99 #define SYSCTL_PIN_CCP2 0x04000000 // CCP2 pin
100 #define SYSCTL_PIN_CCP3 0x08000000 // CCP3 pin
101 #define SYSCTL_PIN_CCP4 0x10000000 // CCP4 pin
102 #define SYSCTL_PIN_CCP5 0x20000000 // CCP5 pin
103 #define SYSCTL_PIN_32KHZ 0x80000000 // 32kHz pin
105 //*****************************************************************************
107 // The following are values that can be passed to the SysCtlLDOSet() API as
108 // the ulVoltage value, or returned by the SysCtlLDOGet() API.
110 //*****************************************************************************
111 #define SYSCTL_LDO_2_25V 0x00000005 // LDO output of 2.25V
112 #define SYSCTL_LDO_2_30V 0x00000004 // LDO output of 2.30V
113 #define SYSCTL_LDO_2_35V 0x00000003 // LDO output of 2.35V
114 #define SYSCTL_LDO_2_40V 0x00000002 // LDO output of 2.40V
115 #define SYSCTL_LDO_2_45V 0x00000001 // LDO output of 2.45V
116 #define SYSCTL_LDO_2_50V 0x00000000 // LDO output of 2.50V
117 #define SYSCTL_LDO_2_55V 0x0000001f // LDO output of 2.55V
118 #define SYSCTL_LDO_2_60V 0x0000001e // LDO output of 2.60V
119 #define SYSCTL_LDO_2_65V 0x0000001d // LDO output of 2.65V
120 #define SYSCTL_LDO_2_70V 0x0000001c // LDO output of 2.70V
121 #define SYSCTL_LDO_2_75V 0x0000001b // LDO output of 2.75V
123 //*****************************************************************************
125 // The following are values that can be passed to the SysCtlLDOConfigSet() API.
127 //*****************************************************************************
128 #define SYSCTL_LDOCFG_ARST 0x00000001 // Allow LDO failure to reset
129 #define SYSCTL_LDOCFG_NORST 0x00000000 // Do not reset on LDO failure
131 //*****************************************************************************
133 // The following are values that can be passed to the SysCtlIntEnable(),
134 // SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
135 // by the SysCtlIntStatus() API.
137 //*****************************************************************************
138 #define SYSCTL_INT_PLL_LOCK 0x00000040 // PLL lock interrupt
139 #define SYSCTL_INT_CUR_LIMIT 0x00000020 // Current limit interrupt
140 #define SYSCTL_INT_IOSC_FAIL 0x00000010 // Internal oscillator failure int
141 #define SYSCTL_INT_MOSC_FAIL 0x00000008 // Main oscillator failure int
142 #define SYSCTL_INT_POR 0x00000004 // Power on reset interrupt
143 #define SYSCTL_INT_BOR 0x00000002 // Brown out interrupt
144 #define SYSCTL_INT_PLL_FAIL 0x00000001 // PLL failure interrupt
146 //*****************************************************************************
148 // The following are values that can be passed to the SysCtlResetCauseClear()
149 // API or returned by the SysCtlResetCauseGet() API.
151 //*****************************************************************************
152 #define SYSCTL_CAUSE_LDO 0x00000020 // LDO power not OK reset
153 #define SYSCTL_CAUSE_SW 0x00000010 // Software reset
154 #define SYSCTL_CAUSE_WDOG 0x00000008 // Watchdog reset
155 #define SYSCTL_CAUSE_BOR 0x00000004 // Brown-out reset
156 #define SYSCTL_CAUSE_POR 0x00000002 // Power on reset
157 #define SYSCTL_CAUSE_EXT 0x00000001 // External reset
159 //*****************************************************************************
161 // The following are values that can be passed to the SysCtlBrownOutConfigSet()
162 // API as the ulConfig parameter.
164 //*****************************************************************************
165 #define SYSCTL_BOR_RESET 0x00000002 // Reset instead of interrupting
166 #define SYSCTL_BOR_RESAMPLE 0x00000001 // Resample BOR before asserting
168 //*****************************************************************************
170 // The following are values that can be passed to the SysCtlPWMClockSet() API
171 // as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()
174 //*****************************************************************************
175 #define SYSCTL_PWMDIV_1 0x00000000 // PWM clock is processor clock /1
176 #define SYSCTL_PWMDIV_2 0x00100000 // PWM clock is processor clock /2
177 #define SYSCTL_PWMDIV_4 0x00120000 // PWM clock is processor clock /4
178 #define SYSCTL_PWMDIV_8 0x00140000 // PWM clock is processor clock /8
179 #define SYSCTL_PWMDIV_16 0x00160000 // PWM clock is processor clock /16
180 #define SYSCTL_PWMDIV_32 0x00180000 // PWM clock is processor clock /32
181 #define SYSCTL_PWMDIV_64 0x001A0000 // PWM clock is processor clock /64
183 //*****************************************************************************
185 // The following are values that can be passed to the SysCtlADCSpeedSet() API
186 // as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()
189 //*****************************************************************************
190 #define SYSCTL_ADCSPEED_1MSPS 0x00000300 // 1,000,000 samples per second
191 #define SYSCTL_ADCSPEED_500KSPS 0x00000200 // 500,000 samples per second
192 #define SYSCTL_ADCSPEED_250KSPS 0x00000100 // 250,000 samples per second
193 #define SYSCTL_ADCSPEED_125KSPS 0x00000000 // 125,000 samples per second
195 //*****************************************************************************
197 // The following are values that can be passed to the SysCtlClockSet() API as
198 // the ulConfig parameter.
200 //*****************************************************************************
201 #define SYSCTL_SYSDIV_1 0x07800000 // Processor clock is osc/pll /1
202 #define SYSCTL_SYSDIV_2 0x00C00000 // Processor clock is osc/pll /2
203 #define SYSCTL_SYSDIV_3 0x01400000 // Processor clock is osc/pll /3
204 #define SYSCTL_SYSDIV_4 0x01C00000 // Processor clock is osc/pll /4
205 #define SYSCTL_SYSDIV_5 0x02400000 // Processor clock is osc/pll /5
206 #define SYSCTL_SYSDIV_6 0x02C00000 // Processor clock is osc/pll /6
207 #define SYSCTL_SYSDIV_7 0x03400000 // Processor clock is osc/pll /7
208 #define SYSCTL_SYSDIV_8 0x03C00000 // Processor clock is osc/pll /8
209 #define SYSCTL_SYSDIV_9 0x04400000 // Processor clock is osc/pll /9
210 #define SYSCTL_SYSDIV_10 0x04C00000 // Processor clock is osc/pll /10
211 #define SYSCTL_SYSDIV_11 0x05400000 // Processor clock is osc/pll /11
212 #define SYSCTL_SYSDIV_12 0x05C00000 // Processor clock is osc/pll /12
213 #define SYSCTL_SYSDIV_13 0x06400000 // Processor clock is osc/pll /13
214 #define SYSCTL_SYSDIV_14 0x06C00000 // Processor clock is osc/pll /14
215 #define SYSCTL_SYSDIV_15 0x07400000 // Processor clock is osc/pll /15
216 #define SYSCTL_SYSDIV_16 0x07C00000 // Processor clock is osc/pll /16
217 #define SYSCTL_USE_PLL 0x00000000 // System clock is the PLL clock
218 #define SYSCTL_USE_OSC 0x00003800 // System clock is the osc clock
219 #define SYSCTL_XTAL_3_57MHZ 0x00000100 // External crystal is 3.579545MHz
220 #define SYSCTL_XTAL_3_68MHZ 0x00000140 // External crystal is 3.6864MHz
221 #define SYSCTL_XTAL_4MHZ 0x00000180 // External crystal is 4MHz
222 #define SYSCTL_XTAL_4_09MHZ 0x000001C0 // External crystal is 4.096MHz
223 #define SYSCTL_XTAL_4_91MHZ 0x00000200 // External crystal is 4.9152MHz
224 #define SYSCTL_XTAL_5MHZ 0x00000240 // External crystal is 5MHz
225 #define SYSCTL_XTAL_5_12MHZ 0x00000280 // External crystal is 5.12MHz
226 #define SYSCTL_XTAL_6MHZ 0x000002C0 // External crystal is 6MHz
227 #define SYSCTL_XTAL_6_14MHZ 0x00000300 // External crystal is 6.144MHz
228 #define SYSCTL_XTAL_7_37MHZ 0x00000340 // External crystal is 7.3728MHz
229 #define SYSCTL_XTAL_8MHZ 0x00000380 // External crystal is 8MHz
230 #define SYSCTL_XTAL_8_19MHZ 0x000003C0 // External crystal is 8.192MHz
231 #define SYSCTL_OSC_MAIN 0x00000000 // Oscillator source is main osc
232 #define SYSCTL_OSC_INT 0x00000010 // Oscillator source is int. osc
233 #define SYSCTL_OSC_INT4 0x00000020 // Oscillator source is int. osc /4
234 #define SYSCTL_INT_OSC_DIS 0x00000002 // Disable internal oscillator
235 #define SYSCTL_MAIN_OSC_DIS 0x00000001 // Disable main oscillator
237 //*****************************************************************************
239 // Prototypes for the APIs.
241 //*****************************************************************************
242 extern unsigned long SysCtlSRAMSizeGet(void);
243 extern unsigned long SysCtlFlashSizeGet(void);
244 extern tBoolean SysCtlPinPresent(unsigned long ulPin);
245 extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
246 extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
247 extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
248 extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
249 extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
250 extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
251 extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
252 extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
253 extern void SysCtlPeripheralClockGating(tBoolean bEnable);
254 extern void SysCtlIntRegister(void (*pfnHandler)(void));
255 extern void SysCtlIntUnregister(void);
256 extern void SysCtlIntEnable(unsigned long ulInts);
257 extern void SysCtlIntDisable(unsigned long ulInts);
258 extern void SysCtlIntClear(unsigned long ulInts);
259 extern unsigned long SysCtlIntStatus(tBoolean bMasked);
260 extern void SysCtlLDOSet(unsigned long ulVoltage);
261 extern unsigned long SysCtlLDOGet(void);
262 extern void SysCtlLDOConfigSet(unsigned long ulConfig);
263 extern void SysCtlReset(void);
264 extern void SysCtlSleep(void);
265 extern void SysCtlDeepSleep(void);
266 extern unsigned long SysCtlResetCauseGet(void);
267 extern void SysCtlResetCauseClear(unsigned long ulCauses);
268 extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
269 unsigned long ulDelay);
270 extern void SysCtlClockSet(unsigned long ulConfig);
271 extern unsigned long SysCtlClockGet(void);
272 extern void SysCtlPWMClockSet(unsigned long ulConfig);
273 extern unsigned long SysCtlPWMClockGet(void);
274 extern void SysCtlADCSpeedSet(unsigned long ulSpeed);
275 extern unsigned long SysCtlADCSpeedGet(void);
276 extern void SysCtlIOSCVerificationSet(tBoolean bEnable);
277 extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
278 extern void SysCtlPLLVerificationSet(tBoolean bEnable);
279 extern void SysCtlClkVerificationClear(void);
285 #endif // __SYSCTL_H__
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