begriffs open source - cmsis-freertos/blob - Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick

1 /*

4

5 VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.

6

7 This file is part of the FreeRTOS distribution.

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9 FreeRTOS is free software; you can redistribute it and/or modify it under

10 the terms of the GNU General Public License (version 2) as published by the

11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.

12

13 ***************************************************************************

14 >>! NOTE: The modification to the GPL is included to allow you to !<<

15 >>! distribute a combined work that includes FreeRTOS without being !<<

16 >>! obliged to provide the source code for proprietary components !<<

17 >>! outside of the FreeRTOS kernel. !<<

18 ***************************************************************************

19

20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY

21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS

22 FOR A PARTICULAR PURPOSE. Full license text is available on the following

23 link: http://www.freertos.org/a00114.html

24

25 ***************************************************************************

26 * *

27 * FreeRTOS provides completely free yet professionally developed, *

28 * robust, strictly quality controlled, supported, and cross *

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38

39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading

40 the FAQ page "My application does not run, what could be wrong?". Have you

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64 engineered and independently SIL3 certified version for use in safety and

65 mission critical applications that require provable dependability.

66

67 1 tab == 4 spaces!

68 */

69

70 #include "FreeRTOS.h"

71 #include "task.h"

72

73 __declspec(interrupt:0) void vPIT0InterruptHandler( void );

74

75 /* Constants used to configure the interrupts. */

76 #define portPRESCALE_VALUE 64

77 #define portPRESCALE_REG_SETTING ( 5 << 8 )

78 #define portPIT_INTERRUPT_ENABLED ( 0x08 )

79 #define configPIT0_INTERRUPT_VECTOR ( 55 )

80

81 /*

82 * FreeRTOS.org requires two interrupts - a tick interrupt generated from a

83 * timer source, and a spare interrupt vector used for context switching.

84 * The configuration below uses PIT0 for the former, and vector 16 for the

85 * latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO

86 * NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided

87 * here for using alternative interrupt sources.

88 *

89 * To change the tick interrupt source:

90 *

91 * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever

92 * peripheral is to be used to generate the tick interrupt. The name of the

93 * handler function (currently vPIT0InterruptHandler()) should also be updated

94 * to indicate which peripheral is generating the interrupt.

95 *

96 * 2) Make sure the interrupt source is cleared within the interrupt handler function.

97 * Currently vPIT0InterruptHandler() clears the PIT0 interrupt.

98 *

99 * 3) Update the vector table within mcf5225x_vectors.s to install the tick

100 * interrupt handler in the correct vector position.

101 *

102 * To change the spare interrupt source:

103 *

104 * 1) Modify vApplicationSetupInterrupts() below to be correct for whichever

105 * interrupt vector is to be used. Make sure you use a spare interrupt on interrupt

106 * controller 0, otherwise the register used to request context switches will also

107 * require modification.

108 *

109 * 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h

110 * to be correct for your chosen interrupt vector.

111 *

112 * 3) Update the vector table within mcf5225x_vectors.s to install the handler

113 * _vPortYieldISR() in the correct vector position (by default vector number 16 is

114 * used).

115 */

116 void vApplicationSetupInterrupts( void )

117 {

118 const unsigned short usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );

119

120 /* Configure interrupt priority and level and unmask interrupt for PIT0. */

121 MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );

122 MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );

123

124 /* Do the same for vector 63 (interrupt controller 0. I don't think the

125 write to MCF_INTC0_IMRH is actually required here but is included for

126 completeness. */

127 MCF_INTC0_ICR16 = ( 0 | configKERNEL_INTERRUPT_PRIORITY << 3 );

128 MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK16 | 0x01 );

129

130 /* Configure PIT0 to generate the RTOS tick. */

131 MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

132 MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );

133 MCF_PIT0_PMR = usCompareMatchValue;

134 }

135 /*-----------------------------------------------------------*/

136

137 __declspec(interrupt:0) void vPIT0InterruptHandler( void )

138 {

139 unsigned long ulSavedInterruptMask;

140

141 /* Clear the PIT0 interrupt. */

142 MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;

143

144 /* Increment the RTOS tick. */

145 ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();

146 if( xTaskIncrementTick() != pdFALSE )

147 {

148 taskYIELD();

149 }

150 portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );

151 }