begriffs open source - cmsis-freertos/blob - Source/portable/MPLAB/PIC32MEC14xx/portmacro.h

1 /*

4

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7 This file is part of the FreeRTOS distribution.

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10 the terms of the GNU General Public License (version 2) as published by the

11 Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.

12

13 ***************************************************************************

14 >>! NOTE: The modification to the GPL is included to allow you to !<<

15 >>! distribute a combined work that includes FreeRTOS without being !<<

16 >>! obliged to provide the source code for proprietary components !<<

17 >>! outside of the FreeRTOS kernel. !<<

18 ***************************************************************************

19

20 FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY

21 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS

22 FOR A PARTICULAR PURPOSE. Full license text is available on the following

23 link: http://www.freertos.org/a00114.html

24

25 ***************************************************************************

26 * *

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38

39 http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading

40 the FAQ page "My application does not run, what could be wrong?". Have you

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64 engineered and independently SIL3 certified version for use in safety and

65 mission critical applications that require provable dependability.

66

67 1 tab == 4 spaces!

68 */

69

70 #ifndef PORTMACRO_H

71 #define PORTMACRO_H

72

73 #ifdef __cplusplus

74 extern "C" {

75 #endif

76

77 /*-----------------------------------------------------------

78 * Port specific definitions.

79 *

80 * The settings in this file configure FreeRTOS correctly for the

81 * given hardware and compiler.

82 *

83 * These settings should not be altered.

84 *-----------------------------------------------------------

85 */

86

87 /* Type definitions. */

88 #define portCHAR char

89 #define portFLOAT float

90 #define portDOUBLE double

91 #define portLONG long

92 #define portSHORT short

93 #define portSTACK_TYPE uint32_t

94 #define portBASE_TYPE long

95

96 typedef portSTACK_TYPE StackType_t;

97 typedef long BaseType_t;

98 typedef unsigned long UBaseType_t;

99

100 #if( configUSE_16_BIT_TICKS == 1 )

101 typedef uint16_t TickType_t;

102 #define portMAX_DELAY ( TickType_t ) 0xffff

103 #else

104 typedef uint32_t TickType_t;

105 #define portMAX_DELAY ( TickType_t ) 0xffffffffUL

106 #endif

107 /*-----------------------------------------------------------*/

108

109 /* Hardware specifics. */

110 #define portBYTE_ALIGNMENT 8

111 #define portSTACK_GROWTH -1

112 #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )

113 /*-----------------------------------------------------------*/

114

115 /* Critical section management. */

116 #define portIPL_SHIFT ( 10UL )

117 /* Don't straddle the CEE bit. Interrupts calling FreeRTOS functions should

118 never have higher IPL bits set anyway. */

119 #define portALL_IPL_BITS ( 0x7FUL << portIPL_SHIFT )

120 #define portSW0_BIT ( 0x01 << 8 )

121

122 /* Interrupt priority conversion */

123 #define portIPL_TO_CODE( iplNumber ) ( ( iplNumber >> 1 ) & 0x03ul )

124 #define portCODE_TO_IPL( iplCode ) ( ( iplCode << 1 ) | 0x01ul )

125

126 /*-----------------------------------------------------------*/

127

128 static inline uint32_t ulPortGetCP0Status( void )

129 {

130 uint32_t rv;

131

132 __asm volatile(

133 "\n\t"

134 "mfc0 %0,$12,0 \n\t"

135 : "=r" ( rv ) :: );

136

137 return rv;

138 }

139 /*-----------------------------------------------------------*/

140

141 static inline void vPortSetCP0Status( uint32_t new_status)

142 {

143 ( void ) new_status;

144

145 __asm__ __volatile__(

146 "\n\t"

147 "mtc0 %0,$12,0 \n\t"

148 "ehb \n\t"

149 :

150 :"r" ( new_status ) : );

151 }

152 /*-----------------------------------------------------------*/

153

154 static inline uint32_t ulPortGetCP0Cause( void )

155 {

156 uint32_t rv;

157

158 __asm volatile(

159 "\n\t"

160 "mfc0 %0,$13,0 \n\t"

161 : "=r" ( rv ) :: );

162

163 return rv;

164 }

165 /*-----------------------------------------------------------*/

166

167 static inline void vPortSetCP0Cause( uint32_t new_cause )

168 {

169 ( void ) new_cause;

170

171 __asm__ __volatile__(

172 "\n\t"

173 "mtc0 %0,$13,0 \n\t"

174 "ehb \n\t"

175 :

176 :"r" ( new_cause ) : );

177 }

178 /*-----------------------------------------------------------*/

179

180 /* This clears the IPL bits, then sets them to

181 configMAX_SYSCALL_INTERRUPT_PRIORITY. An extra check is performed if

182 configASSERT() is defined to ensure an assertion handler does not inadvertently

183 attempt to lower the IPL when the call to assert was triggered because the IPL

184 value was found to be above configMAX_SYSCALL_INTERRUPT_PRIORITY when an ISR

185 safe FreeRTOS API function was executed. ISR safe FreeRTOS API functions are

186 those that end in FromISR. FreeRTOS maintains a separate interrupt API to

187 ensure API function and interrupt entry is as fast and as simple as possible. */

188 #ifdef configASSERT

189 #define portDISABLE_INTERRUPTS() \

190 { \

191 uint32_t ulStatus; \

192 /* Mask interrupts at and below the kernel interrupt priority. */ \

193 ulStatus = ulPortGetCP0Status(); \

194 /* Is the current IPL below configMAX_SYSCALL_INTERRUPT_PRIORITY? */ \

195 if( ( ( ulStatus & portALL_IPL_BITS ) >> portIPL_SHIFT ) < configMAX_SYSCALL_INTERRUPT_PRIORITY ) \

196 { \

197 ulStatus &= ~portALL_IPL_BITS; \

198 vPortSetCP0Status( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \

199 } \

200 }

201 #else /* configASSERT */

202 #define portDISABLE_INTERRUPTS() \

203 { \

204 uint32_t ulStatus; \

205 /* Mask interrupts at and below the kernel interrupt priority. */ \

206 ulStatus = ulPortGetCP0Status(); \

207 ulStatus &= ~portALL_IPL_BITS; \

208 vPortSetCP0Status( ( ulStatus | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) ) ); \

209 }

210 #endif /* configASSERT */

211

212 #define portENABLE_INTERRUPTS() \

213 { \

214 uint32_t ulStatus; \

215 /* Unmask all interrupts. */ \

216 ulStatus = ulPortGetCP0Status(); \

217 ulStatus &= ~portALL_IPL_BITS; \

218 vPortSetCP0Status( ulStatus ); \

219 }

220

221

222 extern void vTaskEnterCritical( void );

223 extern void vTaskExitCritical( void );

224 #define portCRITICAL_NESTING_IN_TCB 1

225 #define portENTER_CRITICAL() vTaskEnterCritical()

226 #define portEXIT_CRITICAL() vTaskExitCritical()

227

228 extern UBaseType_t uxPortSetInterruptMaskFromISR();

229 extern void vPortClearInterruptMaskFromISR( UBaseType_t );

230 #define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()

231 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusRegister ) vPortClearInterruptMaskFromISR( uxSavedStatusRegister )

232

233 #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION

234 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1

235 #endif

236

237 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1

238

239 /* Check the configuration. */

240 #if( configMAX_PRIORITIES > 32 )

241 #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.

242 #endif

243

244 /* Store/clear the ready priorities in a bit map. */

245 #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )

246 #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )

247

248 /*-----------------------------------------------------------*/

249

250 #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - _clz( ( uxReadyPriorities ) ) )

251

252 #endif /* taskRECORD_READY_PRIORITY */

253