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1 /*

4

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67 1 tab == 4 spaces!

68 */

69

70 /*-----------------------------------------------------------

71 * Implementation of functions defined in portable.h for the ARM CM3 port.

72 *----------------------------------------------------------*/

73

74 /* Scheduler includes. */

75 #include "FreeRTOS.h"

76 #include "task.h"

77

78 #ifndef configKERNEL_INTERRUPT_PRIORITY

79 #define configKERNEL_INTERRUPT_PRIORITY 255

80 #endif

81

82 #if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0

83 #error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html

84 #endif

85

86 #ifndef configSYSTICK_CLOCK_HZ

87 #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ

88 /* Ensure the SysTick is clocked at the same frequency as the core. */

89 #define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )

90 #else

91 /* The way the SysTick is clocked is not modified in case it is not the same

92 as the core. */

93 #define portNVIC_SYSTICK_CLK_BIT ( 0 )

94 #endif

95

96 /* The __weak attribute does not work as you might expect with the Keil tools

97 so the configOVERRIDE_DEFAULT_TICK_CONFIGURATION constant must be set to 1 if

98 the application writer wants to provide their own implementation of

99 vPortSetupTimerInterrupt(). Ensure configOVERRIDE_DEFAULT_TICK_CONFIGURATION

100 is defined. */

101 #ifndef configOVERRIDE_DEFAULT_TICK_CONFIGURATION

102 #define configOVERRIDE_DEFAULT_TICK_CONFIGURATION 0

103 #endif

104

105 /* Constants required to manipulate the core. Registers first... */

106 #define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000e010 ) )

107 #define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile uint32_t * ) 0xe000e014 ) )

108 #define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile uint32_t * ) 0xe000e018 ) )

109 #define portNVIC_SYSPRI2_REG ( * ( ( volatile uint32_t * ) 0xe000ed20 ) )

110 /* ...then bits in the registers. */

111 #define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )

112 #define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )

113 #define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )

114 #define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )

115 #define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )

116

117 /* Masks off all bits but the VECTACTIVE bits in the ICSR register. */

118 #define portVECTACTIVE_MASK ( 0xFFUL )

119

120 #define portNVIC_PENDSV_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )

121 #define portNVIC_SYSTICK_PRI ( ( ( uint32_t ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )

122

123 /* Constants required to check the validity of an interrupt priority. */

124 #define portFIRST_USER_INTERRUPT_NUMBER ( 16 )

125 #define portNVIC_IP_REGISTERS_OFFSET_16 ( 0xE000E3F0 )

126 #define portAIRCR_REG ( * ( ( volatile uint32_t * ) 0xE000ED0C ) )

127 #define portMAX_8_BIT_VALUE ( ( uint8_t ) 0xff )

128 #define portTOP_BIT_OF_BYTE ( ( uint8_t ) 0x80 )

129 #define portMAX_PRIGROUP_BITS ( ( uint8_t ) 7 )

130 #define portPRIORITY_GROUP_MASK ( 0x07UL << 8UL )

131 #define portPRIGROUP_SHIFT ( 8UL )

132

133 /* Constants required to set up the initial stack. */

134 #define portINITIAL_XPSR ( 0x01000000 )

135

136 /* The systick is a 24-bit counter. */

137 #define portMAX_24_BIT_NUMBER ( 0xffffffUL )

138

139 /* A fiddle factor to estimate the number of SysTick counts that would have

140 occurred while the SysTick counter is stopped during tickless idle

141 calculations. */

142 #define portMISSED_COUNTS_FACTOR ( 45UL )

143

144 /* For strict compliance with the Cortex-M spec the task start address should

145 have bit-0 clear, as it is loaded into the PC on exit from an ISR. */

146 #define portSTART_ADDRESS_MASK ( ( StackType_t ) 0xfffffffeUL )

147

148 /* Each task maintains its own interrupt status in the critical nesting

149 variable. */

150 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;

151

152 /*

153 * Setup the timer to generate the tick interrupts. The implementation in this

154 * file is weak to allow application writers to change the timer used to

155 * generate the tick interrupt.

156 */

157 void vPortSetupTimerInterrupt( void );

158

159 /*

160 * Exception handlers.

161 */

162 void xPortPendSVHandler( void );

163 void xPortSysTickHandler( void );

164 void vPortSVCHandler( void );

165

166 /*

167 * Start first task is a separate function so it can be tested in isolation.

168 */

169 static void prvStartFirstTask( void );

170

171 /*

172 * Used to catch tasks that attempt to return from their implementing function.

173 */

174 static void prvTaskExitError( void );

175

176 /*-----------------------------------------------------------*/

177

178 /*

179 * The number of SysTick increments that make up one tick period.

180 */

181 #if configUSE_TICKLESS_IDLE == 1

182 static uint32_t ulTimerCountsForOneTick = 0;

183 #endif /* configUSE_TICKLESS_IDLE */

184

185 /*

186 * The maximum number of tick periods that can be suppressed is limited by the

187 * 24 bit resolution of the SysTick timer.

188 */

189 #if configUSE_TICKLESS_IDLE == 1

190 static uint32_t xMaximumPossibleSuppressedTicks = 0;

191 #endif /* configUSE_TICKLESS_IDLE */

192

193 /*

194 * Compensate for the CPU cycles that pass while the SysTick is stopped (low

195 * power functionality only.

196 */

197 #if configUSE_TICKLESS_IDLE == 1

198 static uint32_t ulStoppedTimerCompensation = 0;

199 #endif /* configUSE_TICKLESS_IDLE */

200

201 /*

202 * Used by the portASSERT_IF_INTERRUPT_PRIORITY_INVALID() macro to ensure

203 * FreeRTOS API functions are not called from interrupts that have been assigned

204 * a priority above configMAX_SYSCALL_INTERRUPT_PRIORITY.

205 */

206 #if ( configASSERT_DEFINED == 1 )

207 static uint8_t ucMaxSysCallPriority = 0;

208 static uint32_t ulMaxPRIGROUPValue = 0;

209 static const volatile uint8_t * const pcInterruptPriorityRegisters = ( uint8_t * ) portNVIC_IP_REGISTERS_OFFSET_16;

210 #endif /* configASSERT_DEFINED */

211

212 /*-----------------------------------------------------------*/

213

214 /*

215 * See header file for description.

216 */

217 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )

218 {

219 /* Simulate the stack frame as it would be created by a context switch

220 interrupt. */

221 pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */

222 *pxTopOfStack = portINITIAL_XPSR; /* xPSR */

223 pxTopOfStack--;

224 *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */

225 pxTopOfStack--;

226 *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */

227

228 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */

229 *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */

230 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */

231

232 return pxTopOfStack;

233 }

234 /*-----------------------------------------------------------*/

235

236 static void prvTaskExitError( void )

237 {

238 /* A function that implements a task must not exit or attempt to return to

239 its caller as there is nothing to return to. If a task wants to exit it

240 should instead call vTaskDelete( NULL ).

241

242 Artificially force an assert() to be triggered if configASSERT() is

243 defined, then stop here so application writers can catch the error. */

244 configASSERT( uxCriticalNesting == ~0UL );

245 portDISABLE_INTERRUPTS();

246 for( ;; );

247 }

248 /*-----------------------------------------------------------*/

249

250 __asm void vPortSVCHandler( void )

251 {

252 PRESERVE8

253

254 ldr r3, =pxCurrentTCB /* Restore the context. */

255 ldr r1, [r3] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */

256 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */

257 ldmia r0!, {r4-r11} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */

258 msr psp, r0 /* Restore the task stack pointer. */

259 isb

260 mov r0, #0

261 msr basepri, r0

262 orr r14, #0xd

263 bx r14

264 }

265 /*-----------------------------------------------------------*/

266

267 __asm void prvStartFirstTask( void )

268 {

269 PRESERVE8

270

271 /* Use the NVIC offset register to locate the stack. */

272 ldr r0, =0xE000ED08

273 ldr r0, [r0]

274 ldr r0, [r0]

275

276 /* Set the msp back to the start of the stack. */

277 msr msp, r0

278 /* Globally enable interrupts. */

279 cpsie i

280 cpsie f

281 dsb

282 isb

283 /* Call SVC to start the first task. */

284 svc 0

285 nop

286 nop

287 }

288 /*-----------------------------------------------------------*/

289

290 /*

291 * See header file for description.

292 */

293 BaseType_t xPortStartScheduler( void )

294 {

295 #if( configASSERT_DEFINED == 1 )

296 {

297 volatile uint32_t ulOriginalPriority;

298 volatile uint8_t * const pucFirstUserPriorityRegister = ( uint8_t * ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );

299 volatile uint8_t ucMaxPriorityValue;

300

301 /* Determine the maximum priority from which ISR safe FreeRTOS API

302 functions can be called. ISR safe functions are those that end in

303 "FromISR". FreeRTOS maintains separate thread and ISR API functions to

304 ensure interrupt entry is as fast and simple as possible.

305

306 Save the interrupt priority value that is about to be clobbered. */

307 ulOriginalPriority = *pucFirstUserPriorityRegister;

308

309 /* Determine the number of priority bits available. First write to all

310 possible bits. */

311 *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;

312

313 /* Read the value back to see how many bits stuck. */

314 ucMaxPriorityValue = *pucFirstUserPriorityRegister;

315

316 /* Use the same mask on the maximum system call priority. */

317 ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;

318

319 /* Calculate the maximum acceptable priority group value for the number

320 of bits read back. */

321 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;

322 while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )

323 {

324 ulMaxPRIGROUPValue--;

325 ucMaxPriorityValue <<= ( uint8_t ) 0x01;

326 }

327

328 /* Shift the priority group value back to its position within the AIRCR

329 register. */

330 ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;

331 ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;

332

333 /* Restore the clobbered interrupt priority register to its original

334 value. */

335 *pucFirstUserPriorityRegister = ulOriginalPriority;

336 }

337 #endif /* conifgASSERT_DEFINED */

338

339 /* Make PendSV and SysTick the lowest priority interrupts. */

340 portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;

341 portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;

342

343 /* Start the timer that generates the tick ISR. Interrupts are disabled

344 here already. */

345 vPortSetupTimerInterrupt();

346

347 /* Initialise the critical nesting count ready for the first task. */

348 uxCriticalNesting = 0;

349

350 /* Start the first task. */

351 prvStartFirstTask();

352

353 /* Should not get here! */

354 return 0;

355 }

356 /*-----------------------------------------------------------*/

357

358 void vPortEndScheduler( void )

359 {

360 /* Not implemented in ports where there is nothing to return to.

361 Artificially force an assert. */

362 configASSERT( uxCriticalNesting == 1000UL );

363 }

364 /*-----------------------------------------------------------*/

365

366 void vPortEnterCritical( void )

367 {

368 portDISABLE_INTERRUPTS();

369 uxCriticalNesting++;

370

371 /* This is not the interrupt safe version of the enter critical function so

372 assert() if it is being called from an interrupt context. Only API

373 functions that end in "FromISR" can be used in an interrupt. Only assert if

374 the critical nesting count is 1 to protect against recursive calls if the

375 assert function also uses a critical section. */

376 if( uxCriticalNesting == 1 )

377 {

378 configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );

379 }

380 }

381 /*-----------------------------------------------------------*/

382

383 void vPortExitCritical( void )

384 {

385 configASSERT( uxCriticalNesting );

386 uxCriticalNesting--;

387 if( uxCriticalNesting == 0 )

388 {

389 portENABLE_INTERRUPTS();

390 }

391 }

392 /*-----------------------------------------------------------*/

393

394 __asm void xPortPendSVHandler( void )

395 {

396 extern uxCriticalNesting;

397 extern pxCurrentTCB;

398 extern vTaskSwitchContext;

399

400 PRESERVE8

401

402 mrs r0, psp

403 isb

404

405 ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */

406 ldr r2, [r3]

407

408 stmdb r0!, {r4-r11} /* Save the remaining registers. */

409 str r0, [r2] /* Save the new top of stack into the first member of the TCB. */

410

411 stmdb sp!, {r3, r14}

412 mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY

413 msr basepri, r0

414 dsb

415 isb

416 bl vTaskSwitchContext

417 mov r0, #0

418 msr basepri, r0

419 ldmia sp!, {r3, r14}

420

421 ldr r1, [r3]

422 ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */

423 ldmia r0!, {r4-r11} /* Pop the registers and the critical nesting count. */

424 msr psp, r0

425 isb

426 bx r14

427 nop

428 }

429 /*-----------------------------------------------------------*/

430

431 void xPortSysTickHandler( void )

432 {

433 /* The SysTick runs at the lowest interrupt priority, so when this interrupt

434 executes all interrupts must be unmasked. There is therefore no need to

435 save and then restore the interrupt mask value as its value is already

436 known - therefore the slightly faster vPortRaiseBASEPRI() function is used

437 in place of portSET_INTERRUPT_MASK_FROM_ISR(). */

438 vPortRaiseBASEPRI();

439 {

440 /* Increment the RTOS tick. */

441 if( xTaskIncrementTick() != pdFALSE )

442 {

443 /* A context switch is required. Context switching is performed in

444 the PendSV interrupt. Pend the PendSV interrupt. */

445 portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;

446 }

447 }

448 vPortClearBASEPRIFromISR();

449 }

450 /*-----------------------------------------------------------*/

451

452 #if configUSE_TICKLESS_IDLE == 1

453

454 __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )

455 {

456 uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL;

457 TickType_t xModifiableIdleTime;

458

459 /* Make sure the SysTick reload value does not overflow the counter. */

460 if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )

461 {

462 xExpectedIdleTime = xMaximumPossibleSuppressedTicks;

463 }

464

465 /* Stop the SysTick momentarily. The time the SysTick is stopped for

466 is accounted for as best it can be, but using the tickless mode will

467 inevitably result in some tiny drift of the time maintained by the

468 kernel with respect to calendar time. */

469 portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;

470

471 /* Calculate the reload value required to wait xExpectedIdleTime

472 tick periods. -1 is used because this code will execute part way

473 through one of the tick periods. */

474 ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );

475 if( ulReloadValue > ulStoppedTimerCompensation )

476 {

477 ulReloadValue -= ulStoppedTimerCompensation;

478 }

479

480 /* Enter a critical section but don't use the taskENTER_CRITICAL()

481 method as that will mask interrupts that should exit sleep mode. */

482 __disable_irq();

483 __dsb( portSY_FULL_READ_WRITE );

484 __isb( portSY_FULL_READ_WRITE );

485

486 /* If a context switch is pending or a task is waiting for the scheduler

487 to be unsuspended then abandon the low power entry. */

488 if( eTaskConfirmSleepModeStatus() == eAbortSleep )

489 {

490 /* Restart from whatever is left in the count register to complete

491 this tick period. */

492 portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;

493

494 /* Restart SysTick. */

495 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;

496

497 /* Reset the reload register to the value required for normal tick

498 periods. */

499 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;

500

501 /* Re-enable interrupts - see comments above __disable_irq() call

502 above. */

503 __enable_irq();

504 }

505 else

506 {

507 /* Set the new reload value. */

508 portNVIC_SYSTICK_LOAD_REG = ulReloadValue;

509

510 /* Clear the SysTick count flag and set the count value back to

511 zero. */

512 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;

513

514 /* Restart SysTick. */

515 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;

516

517 /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can

518 set its parameter to 0 to indicate that its implementation contains

519 its own wait for interrupt or wait for event instruction, and so wfi

520 should not be executed again. However, the original expected idle

521 time variable must remain unmodified, so a copy is taken. */

522 xModifiableIdleTime = xExpectedIdleTime;

523 configPRE_SLEEP_PROCESSING( xModifiableIdleTime );

524 if( xModifiableIdleTime > 0 )

525 {

526 __dsb( portSY_FULL_READ_WRITE );

527 __wfi();

528 __isb( portSY_FULL_READ_WRITE );

529 }

530 configPOST_SLEEP_PROCESSING( xExpectedIdleTime );

531

532 /* Stop SysTick. Again, the time the SysTick is stopped for is

533 accounted for as best it can be, but using the tickless mode will

534 inevitably result in some tiny drift of the time maintained by the

535 kernel with respect to calendar time. */

536 ulSysTickCTRL = portNVIC_SYSTICK_CTRL_REG;

537 portNVIC_SYSTICK_CTRL_REG = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE_BIT );

538

539 /* Re-enable interrupts - see comments above __disable_irq() call

540 above. */

541 __enable_irq();

542

543 if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )

544 {

545 uint32_t ulCalculatedLoadValue;

546

547 /* The tick interrupt has already executed, and the SysTick

548 count reloaded with ulReloadValue. Reset the

549 portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick

550 period. */

551 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );

552

553 /* Don't allow a tiny value, or values that have somehow

554 underflowed because the post sleep hook did something

555 that took too long. */

556 if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )

557 {

558 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );

559 }

560

561 portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;

562

563 /* The tick interrupt handler will already have pended the tick

564 processing in the kernel. As the pending tick will be

565 processed as soon as this function exits, the tick value

566 maintained by the tick is stepped forward by one less than the

567 time spent waiting. */

568 ulCompleteTickPeriods = xExpectedIdleTime - 1UL;

569 }

570 else

571 {

572 /* Something other than the tick interrupt ended the sleep.

573 Work out how long the sleep lasted rounded to complete tick

574 periods (not the ulReload value which accounted for part

575 ticks). */

576 ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;

577

578 /* How many complete tick periods passed while the processor

579 was waiting? */

580 ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;

581

582 /* The reload value is set to whatever fraction of a single tick

583 period remains. */

584 portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;

585 }

586

587 /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG

588 again, then set portNVIC_SYSTICK_LOAD_REG back to its standard

589 value. The critical section is used to ensure the tick interrupt

590 can only execute once in the case that the reload register is near

591 zero. */

592 portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;

593 portENTER_CRITICAL();

594 {

595 portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;

596 vTaskStepTick( ulCompleteTickPeriods );

597 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;

598 }

599 portEXIT_CRITICAL();

600 }

601 }

602

603 #endif /* #if configUSE_TICKLESS_IDLE */

604

605 /*-----------------------------------------------------------*/

606

607 /*

608 * Setup the SysTick timer to generate the tick interrupts at the required

609 * frequency.

610 */

611 #if configOVERRIDE_DEFAULT_TICK_CONFIGURATION == 0

612

613 void vPortSetupTimerInterrupt( void )

614 {

615 /* Calculate the constants required to configure the tick interrupt. */

616 #if configUSE_TICKLESS_IDLE == 1

617 {

618 ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ );

619 xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;

620 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );

621 }

622 #endif /* configUSE_TICKLESS_IDLE */

623

624 /* Configure SysTick to interrupt at the requested rate. */

625 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;

626 portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );

627 }

628

629 #endif /* configOVERRIDE_DEFAULT_TICK_CONFIGURATION */

630 /*-----------------------------------------------------------*/

631

632 __asm uint32_t vPortGetIPSR( void )

633 {

634 PRESERVE8

635

636 mrs r0, ipsr

637 bx r14

638 }

639 /*-----------------------------------------------------------*/

640

641 #if( configASSERT_DEFINED == 1 )

642

643 void vPortValidateInterruptPriority( void )

644 {

645 uint32_t ulCurrentInterrupt;

646 uint8_t ucCurrentPriority;

647

648 /* Obtain the number of the currently executing interrupt. */

649 ulCurrentInterrupt = vPortGetIPSR();

650

651 /* Is the interrupt number a user defined interrupt? */

652 if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )

653 {

654 /* Look up the interrupt's priority. */

655 ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];

656

657 /* The following assertion will fail if a service routine (ISR) for

658 an interrupt that has been assigned a priority above

659 configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API

660 function. ISR safe FreeRTOS API functions must *only* be called

661 from interrupts that have been assigned a priority at or below

662 configMAX_SYSCALL_INTERRUPT_PRIORITY.

663

664 Numerically low interrupt priority numbers represent logically high

665 interrupt priorities, therefore the priority of the interrupt must

666 be set to a value equal to or numerically *higher* than

667 configMAX_SYSCALL_INTERRUPT_PRIORITY.

668

669 Interrupts that use the FreeRTOS API must not be left at their

670 default priority of zero as that is the highest possible priority,

671 which is guaranteed to be above configMAX_SYSCALL_INTERRUPT_PRIORITY,

672 and therefore also guaranteed to be invalid.

673

674 FreeRTOS maintains separate thread and ISR API functions to ensure

675 interrupt entry is as fast and simple as possible.

676

677 The following links provide detailed information:

678 http://www.freertos.org/RTOS-Cortex-M3-M4.html

679 http://www.freertos.org/FAQHelp.html */

680 configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );

681 }

682

683 /* Priority grouping: The interrupt controller (NVIC) allows the bits

684 that define each interrupt's priority to be split between bits that

685 define the interrupt's pre-emption priority bits and bits that define

686 the interrupt's sub-priority. For simplicity all bits must be defined

687 to be pre-emption priority bits. The following assertion will fail if

688 this is not the case (if some bits represent a sub-priority).

689

690 If the application only uses CMSIS libraries for interrupt

691 configuration then the correct setting can be achieved on all Cortex-M

692 devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the

693 scheduler. Note however that some vendor specific peripheral libraries

694 assume a non-zero priority group setting, in which cases using a value

695 of zero will result in unpredicable behaviour. */

696 configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );

697 }

698

699 #endif /* configASSERT_DEFINED */

700

701