begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.1-dev0">
  12       CMSIS_Core:
  13        - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  14     </release>
  15     <release version="5.0.0" date="2016-11-11">
  16       Changed open source license to Apache 2.0
  17       CMSIS_Core:
  18        - Added support for Cortex-M23 and Cortex-M33.
  19        - Added ARMv8-M device configurations for mainline and baseline.
  20        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  21        - Added cmsis_compiler.h to unify compiler behaviour.
  22        - Updated function SCB_EnableICache (for Cortex-M7).
  23        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  24       CMSIS-RTOS:
  25         - bug fix in RTX 4.82 (see revision history for details)
  26       CMSIS-RTOS2:
  27         - new API including compatibility layer to CMSIS-RTOS
  28         - reference implementation based on RTX5
  29         - supports all Cortex-M variants including TrustZone for ARMv8-M
  30       CMSIS-SVD:
  31        - reworked SVD format documentation
  32        - removed SVD file database documentation as SVD files are distributed in packs
  33        - updated SVDConv for Win32 and Linux
  34       CMSIS-DSP:
  35        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  36        - Added DSP libraries build projects to CMSIS pack.
  37     </release>
  38     <release version="4.5.0" date="2015-10-28">
  39       - CMSIS-Core     4.30.0  (see revision history for details)
  40       - CMSIS-DAP      1.1.0   (unchanged)
  41       - CMSIS-Driver   2.04.0  (see revision history for details)
  42       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  43       - CMSIS-PACK     1.4.1   (see revision history for details)
  44       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  45       - CMSIS-SVD      1.3.1   (see revision history for details)
  46     </release>
  47     <release version="4.4.0" date="2015-09-11">
  48       - CMSIS-Core     4.20   (see revision history for details)
  49       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  50       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  51       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  52       - CMSIS-RTOS
  53         -- API         1.02   (unchanged)
  54         -- RTX         4.79   (see revision history for details)
  55       - CMSIS-SVD      1.3.0  (see revision history for details)
  56       - CMSIS-DAP      1.1.0  (extended with SWO support)
  57     </release>
  58     <release version="4.3.0" date="2015-03-20">
  59       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
  60       - CMSIS-DSP      1.4.5  (see revision history for details)
  61       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
  62       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
  63       - CMSIS-RTOS
  64         -- API         1.02   (unchanged)
  65         -- RTX         4.78   (see revision history for details)
  66       - CMSIS-SVD      1.2    (unchanged)
  67     </release>
  68     <release version="4.2.0" date="2014-09-24">
  69       Adding Cortex-M7 support
  70       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
  71       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
  72       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
  73       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
  74       - CMSIS-RTOS RTX 4.75  (see revision history for details)
  75     </release>
  76     <release version="4.1.1" date="2014-06-30">
  77       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
  78     </release>
  79     <release version="4.1.0" date="2014-06-12">
  80       - CMSIS-Driver   2.02  (incompatible update)
  81       - CMSIS-Pack     1.3   (see revision history for details)
  82       - CMSIS-DSP      1.4.2 (unchanged)
  83       - CMSIS-Core     3.30  (unchanged)
  84       - CMSIS-RTOS RTX 4.74  (unchanged)
  85       - CMSIS-RTOS API 1.02  (unchanged)
  86       - CMSIS-SVD      1.10  (unchanged)
  87       PACK:
  88       - removed G++ specific files from PACK
  89       - added Component Startup variant "C Startup"
  90       - added Pack Checking Utility
  91       - updated conditions to reflect tool-chain dependency
  92       - added Taxonomy for Graphics
  93       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
  94     </release>
  95     <release version="4.0.0">
  96       - CMSIS-Driver   2.00  Preliminary (incompatible update)
  97       - CMSIS-Pack     1.1   Preliminary
  98       - CMSIS-DSP      1.4.2 (see revision history for details)
  99       - CMSIS-Core     3.30  (see revision history for details)
 100       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 101       - CMSIS-RTOS API 1.02  (unchanged)
 102       - CMSIS-SVD      1.10  (unchanged)
 103     </release>
 104     <release version="3.20.4">
 105       - CMSIS-RTOS 4.74 (see revision history for details)
 106       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 107     </release>
 108     <release version="3.20.3">
 109       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 110       - CMSIS-RTOS 4.73 (see revision history for details)
 111     </release>
 112     <release version="3.20.2">
 113       - CMSIS-Pack documentation has been added
 114       - CMSIS-Drivers header and documentation have been added to PACK
 115       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 116     </release>
 117     <release version="3.20.1">
 118       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 119       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 120     </release>
 121     <release version="3.20.0">
 122       The software portions that are deployed in the application program are now under a BSD license which allows usage
 123       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 124       The individual components have been update as listed below:
 125       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 126       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 127       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 128       - CMSIS-SVD is unchanged.
 129     </release>
 130   </releases>
 131
 132   <taxonomy>
 133     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 134     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 135     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 136     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 137     <description Cclass="File System">File Drive Support and File System</description>
 138     <description Cclass="Graphics">Graphical User Interface</description>
 139     <description Cclass="Network">Network Stack using Internet Protocols</description>
 140     <description Cclass="USB">Universal Serial Bus Stack</description>
 141     <description Cclass="Compiler">ARM Compiler Software Extensions</description>
 142   </taxonomy>
 143
 144   <devices>
 145     <!-- ******************************  Cortex-M0  ****************************** -->
 146     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 147       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 148       <description>
 149 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 150 - simple, easy-to-use programmers model
 151 - highly efficient ultra-low power operation
 152 - excellent code density
 153 - deterministic, high-performance interrupt handling
 154 - upward compatibility with the rest of the Cortex-M processor family.
 155       </description>
 156       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 157       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 158       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 159       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 160
 161       <device Dname="ARMCM0">
 162         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 163         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 164       </device>
 165     </family>
 166
 167     <!-- ******************************  Cortex-M0P  ****************************** -->
 168     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 169       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 170       <description>
 171 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 172 - simple, easy-to-use programmers model
 173 - highly efficient ultra-low power operation
 174 - excellent code density
 175 - deterministic, high-performance interrupt handling
 176 - upward compatibility with the rest of the Cortex-M processor family.
 177       </description>
 178       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 179       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 180       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 181       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 182
 183       <device Dname="ARMCM0P">
 184         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 185         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 186       </device>
 187     </family>
 188
 189     <!-- ******************************  Cortex-M3  ****************************** -->
 190     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 191       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 192       <description>
 193 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 194 - simple, easy-to-use programmers model
 195 - highly efficient ultra-low power operation
 196 - excellent code density
 197 - deterministic, high-performance interrupt handling
 198 - upward compatibility with the rest of the Cortex-M processor family.
 199       </description>
 200       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 201       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 202       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 203       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 204
 205       <device Dname="ARMCM3">
 206         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 207         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 208       </device>
 209     </family>
 210
 211     <!-- ******************************  Cortex-M4  ****************************** -->
 212     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 213       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 214       <description>
 215 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 216 - simple, easy-to-use programmers model
 217 - highly efficient ultra-low power operation
 218 - excellent code density
 219 - deterministic, high-performance interrupt handling
 220 - upward compatibility with the rest of the Cortex-M processor family.
 221       </description>
 222       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 223       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 224       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 225       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 226
 227       <device Dname="ARMCM4">
 228         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 229         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 230       </device>
 231
 232       <device Dname="ARMCM4_FP">
 233         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 234         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 235       </device>
 236     </family>
 237
 238     <!-- ******************************  Cortex-M7  ****************************** -->
 239     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 240       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 241       <description>
 242 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 243 - simple, easy-to-use programmers model
 244 - highly efficient ultra-low power operation
 245 - excellent code density
 246 - deterministic, high-performance interrupt handling
 247 - upward compatibility with the rest of the Cortex-M processor family.
 248       </description>
 249       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 250       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 251       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 252       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 253
 254       <device Dname="ARMCM7">
 255         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 256         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 257       </device>
 258
 259       <device Dname="ARMCM7_SP">
 260         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 261         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 262       </device>
 263
 264       <device Dname="ARMCM7_DP">
 265         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 266         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 267       </device>
 268     </family>
 269
 270     <!-- ******************************  Cortex-M23  ********************** -->
 271     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 272       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 273       <description>
 274 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 275 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 276 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 277       </description>
 278       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 279       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 280       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 281       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 282       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 283       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 284
 285       <device Dname="ARMCM23">
 286         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 287         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 288       </device>
 289
 290       <device Dname="ARMCM23_TZ">
 291         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 292         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 293       </device>
 294     </family>
 295
 296     <!-- ******************************  Cortex-M33  ****************************** -->
 297     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 298       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 299       <description>
 300 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 301 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 302       </description>
 303       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 304       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 305       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 306       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 307       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 308       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 309
 310       <device Dname="ARMCM33">
 311         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 312         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 313       </device>
 314
 315       <device Dname="ARMCM33_TZ">
 316         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 317         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 318       </device>
 319
 320       <device Dname="ARMCM33_DSP_FP">
 321         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 322         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 323       </device>
 324
 325       <device Dname="ARMCM33_DSP_FP_TZ">
 326         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 327         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 328       </device>
 329     </family>
 330
 331     <!-- ******************************  ARMSC000  ****************************** -->
 332     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 333       <description>
 334 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 335 - simple, easy-to-use programmers model
 336 - highly efficient ultra-low power operation
 337 - excellent code density
 338 - deterministic, high-performance interrupt handling
 339       </description>
 340       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 341       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 342       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 343       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 344
 345       <device Dname="ARMSC000">
 346         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 347         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 348       </device>
 349     </family>
 350
 351     <!-- ******************************  ARMSC300  ****************************** -->
 352     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 353       <description>
 354 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 355 - simple, easy-to-use programmers model
 356 - highly efficient ultra-low power operation
 357 - excellent code density
 358 - deterministic, high-performance interrupt handling
 359       </description>
 360       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 361       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 362       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 363       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 364
 365       <device Dname="ARMSC300">
 366         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 367         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 368       </device>
 369     </family>
 370
 371     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 372     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 373       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 374       <description>
 375 ARMv8-M Baseline based device with TrustZone
 376       </description>
 377       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 378       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 379       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 380       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 381       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 382       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 383
 384       <device Dname="ARMv8MBL">
 385         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 386         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 387       </device>
 388     </family>
 389
 390     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 391     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 392       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 393       <description>
 394 ARMv8-M Mainline based device with TrustZone
 395       </description>
 396       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 397       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 398       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 399       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 400       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 401       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 402
 403       <device Dname="ARMv8MML">
 404         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 405         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 406       </device>
 407
 408       <device Dname="ARMv8MML_DSP">
 409         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 411       </device>
 412
 413       <device Dname="ARMv8MML_SP">
 414         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 415         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 416       </device>
 417
 418       <device Dname="ARMv8MML_DSP_SP">
 419         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 420         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 421       </device>
 422
 423       <device Dname="ARMv8MML_DP">
 424         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 425         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 426       </device>
 427
 428       <device Dname="ARMv8MML_DSP_DP">
 429         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 430         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 431       </device>
 432     </family>
 433
 434   </devices>
 435
 436
 437   <apis>
 438     <!-- CMSIS-RTOS API -->
 439     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
 440       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 441       <files>
 442         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 443       </files>
 444     </api>
 445     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.0" exclusive="1">
 446       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 447       <files>
 448         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 449       </files>
 450     </api>
 451     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
 452       <description>USART Driver API for Cortex-M</description>
 453       <files>
 454         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 455         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 456       </files>
 457     </api>
 458     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
 459       <description>SPI Driver API for Cortex-M</description>
 460       <files>
 461         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 462         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 463       </files>
 464     </api>
 465     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
 466       <description>SAI Driver API for Cortex-M</description>
 467       <files>
 468         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 469         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 470       </files>
 471     </api>
 472     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
 473       <description>I2C Driver API for Cortex-M</description>
 474       <files>
 475         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 476         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 477       </files>
 478     </api>
 479     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
 480       <description>CAN Driver API for Cortex-M</description>
 481       <files>
 482         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 483         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 484       </files>
 485     </api>
 486     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
 487       <description>Flash Driver API for Cortex-M</description>
 488       <files>
 489         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 490         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 491       </files>
 492     </api>
 493     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
 494       <description>MCI Driver API for Cortex-M</description>
 495       <files>
 496         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 497         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 498       </files>
 499     </api>
 500     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
 501       <description>NAND Flash Driver API for Cortex-M</description>
 502       <files>
 503         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 504         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 505       </files>
 506     </api>
 507     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
 508       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 509       <files>
 510         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 511         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 512         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 513       </files>
 514     </api>
 515     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
 516       <description>Ethernet MAC Driver API for Cortex-M</description>
 517       <files>
 518         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 519         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 520       </files>
 521     </api>
 522     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
 523       <description>Ethernet PHY Driver API for Cortex-M</description>
 524       <files>
 525         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 526         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 527       </files>
 528     </api>
 529     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
 530       <description>USB Device Driver API for Cortex-M</description>
 531       <files>
 532         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 533         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 534       </files>
 535     </api>
 536     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
 537       <description>USB Host Driver API for Cortex-M</description>
 538       <files>
 539         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 540         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 541       </files>
 542     </api>
 543   </apis>
 544
 545   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 546   <conditions>
 547     <!-- compiler -->
 548     <condition id="ARMCC">
 549       <require Tcompiler="ARMCC"/>
 550     </condition>
 551     <condition id="GCC">
 552       <require Tcompiler="GCC"/>
 553     </condition>
 554     <condition id="IAR">
 555       <require Tcompiler="IAR"/>
 556     </condition>
 557     <condition id="ARMCC GCC">
 558       <accept Tcompiler="ARMCC"/>
 559       <accept Tcompiler="GCC"/>
 560     </condition>
 561     <condition id="ARMCC GCC IAR">
 562       <accept Tcompiler="ARMCC"/>
 563       <accept Tcompiler="GCC"/>
 564       <accept Tcompiler="IAR"/>
 565     </condition>
 566
 567     <!-- ARM architecture -->
 568     <condition id="ARMv6-M Device">
 569       <description>ARMv6-M architecture based device</description>
 570       <accept Dcore="Cortex-M0"/>
 571       <accept Dcore="Cortex-M0+"/>
 572       <accept Dcore="SC000"/>
 573     </condition>
 574     <condition id="ARMv7-M Device">
 575       <description>ARMv7-M architecture based device</description>
 576       <accept Dcore="Cortex-M3"/>
 577       <accept Dcore="Cortex-M4"/>
 578       <accept Dcore="Cortex-M7"/>
 579       <accept Dcore="SC300"/>
 580     </condition>
 581     <condition id="ARMv8-M Device">
 582       <description>ARMv8-M architecture based device</description>
 583       <accept Dcore="ARMV8MBL"/>
 584       <accept Dcore="ARMV8MML"/>
 585       <accept Dcore="Cortex-M23"/>
 586       <accept Dcore="Cortex-M33"/>
 587     </condition>
 588     <condition id="ARMv8-M TZ Device">
 589       <description>ARMv8-M architecture based device with TrustZone</description>
 590       <require condition="ARMv8-M Device"/>
 591       <require Dtz="TZ"/>
 592     </condition>
 593     <condition id="ARMv6_7-M Device">
 594       <description>ARMv6_7-M architecture based device</description>
 595       <accept condition="ARMv6-M Device"/>
 596       <accept condition="ARMv7-M Device"/>
 597     </condition>
 598     <condition id="ARMv6_7_8-M Device">
 599       <description>ARMv6_7_8-M architecture based device</description>
 600       <accept condition="ARMv6-M Device"/>
 601       <accept condition="ARMv7-M Device"/>
 602       <accept condition="ARMv8-M Device"/>
 603     </condition>
 604
 605     <!-- ARM core -->
 606     <condition id="CM0">
 607       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 608       <accept Dcore="Cortex-M0"/>
 609       <accept Dcore="Cortex-M0+"/>
 610       <accept Dcore="SC000"/>
 611     </condition>
 612     <condition id="CM3">
 613       <description>Cortex-M3 or SC300 processor based device</description>
 614       <accept Dcore="Cortex-M3"/>
 615       <accept Dcore="SC300"/>
 616     </condition>
 617     <condition id="CM4">
 618       <description>Cortex-M4 processor based device</description>
 619       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 620     </condition>
 621     <condition id="CM4_FP">
 622       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 623       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 624     </condition>
 625     <condition id="CM7">
 626       <description>Cortex-M7 processor based device</description>
 627       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 628     </condition>
 629     <condition id="CM7_FP">
 630       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 631       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 632       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 633     </condition>
 634     <condition id="CM7_SP">
 635       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 636       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 637     </condition>
 638     <condition id="CM7_DP">
 639       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 640       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 641     </condition>
 642     <condition id="CM23">
 643       <description>Cortex-M23 processor based device</description>
 644       <require Dcore="Cortex-M23"/>
 645     </condition>
 646     <condition id="CM33">
 647       <description>Cortex-M33 processor based device</description>
 648       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 649     </condition>
 650     <condition id="CM33_DSP">
 651       <description>Cortex-M33 processor based device with DSP extension</description>
 652       <require Dcore="Cortex-M33" Dfpu="NO_FPU" Ddsp="DSP"/>
 653     </condition>
 654     <condition id="CM33_FP">
 655       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 656       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 657     </condition>
 658     <condition id="CM33_SP">
 659       <description>Cortex-M33 processor based device using Floating Point Unit (SP)</description>
 660       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="NO_DSP"/>
 661     </condition>
 662     <condition id="CM33_DSP_SP">
 663       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP)</description>
 664       <require Dcore="Cortex-M33" Dfpu="SP_FPU" Ddsp="DSP"/>
 665     </condition>
 666     <condition id="ARMv8MBL">
 667       <description>ARMv8-M Baseline processor based device</description>
 668       <require Dcore="ARMV8MBL"/>
 669     </condition>
 670     <condition id="ARMv8MML">
 671       <description>ARMv8-M Mainline processor based device</description>
 672       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 673     </condition>
 674     <condition id="ARMv8MML_DSP">
 675       <description>ARMv8-M Mainline processor based device with DSP extension</description>
 676       <require Dcore="ARMV8MML" Dfpu="NO_FPU" Ddsp="DSP"/>
 677     </condition>
 678     <condition id="ARMv8MML_FP">
 679       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 680       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 681       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 682     </condition>
 683     <condition id="ARMv8MML_SP">
 684       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP)</description>
 685       <require Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 686     </condition>
 687     <condition id="ARMv8MML_DSP_SP">
 688       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP)</description>
 689       <require Dcore="ARMV8MML" Dfpu="SP_FPU" Ddsp="DSP"/>
 690     </condition>
 691     <condition id="ARMv8MML_DP">
 692       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP)</description>
 693       <require Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 694     </condition>
 695     <condition id="ARMv8MML_DSP_DP">
 696       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP)</description>
 697       <require Dcore="ARMV8MML" Dfpu="DP_FPU" Ddsp="DSP"/>
 698     </condition>
 699
 700     <!-- ARMCC compiler -->
 701     <condition id="CM0_ARMCC">
 702       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 703       <require condition="CM0"/>
 704       <require Tcompiler="ARMCC"/>
 705     </condition>
 706     <condition id="CM0_LE_ARMCC">
 707       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 708       <require condition="CM0_ARMCC"/>
 709       <require Dendian="Little-endian"/>
 710     </condition>
 711     <condition id="CM0_BE_ARMCC">
 712       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 713       <require condition="CM0_ARMCC"/>
 714       <require Dendian="Big-endian"/>
 715     </condition>
 716
 717     <condition id="CM3_ARMCC">
 718       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 719       <require condition="CM3"/>
 720       <require Tcompiler="ARMCC"/>
 721     </condition>
 722     <condition id="CM3_LE_ARMCC">
 723       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 724       <require condition="CM3_ARMCC"/>
 725       <require Dendian="Little-endian"/>
 726     </condition>
 727     <condition id="CM3_BE_ARMCC">
 728       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 729       <require condition="CM3_ARMCC"/>
 730       <require Dendian="Big-endian"/>
 731     </condition>
 732
 733     <condition id="CM4_ARMCC">
 734       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 735       <require condition="CM4"/>
 736       <require Tcompiler="ARMCC"/>
 737     </condition>
 738     <condition id="CM4_LE_ARMCC">
 739       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 740       <require condition="CM4_ARMCC"/>
 741       <require Dendian="Little-endian"/>
 742     </condition>
 743     <condition id="CM4_BE_ARMCC">
 744       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 745       <require condition="CM4_ARMCC"/>
 746       <require Dendian="Big-endian"/>
 747     </condition>
 748
 749     <condition id="CM4_FP_ARMCC">
 750       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 751       <require condition="CM4_FP"/>
 752       <require Tcompiler="ARMCC"/>
 753     </condition>
 754     <condition id="CM4_FP_LE_ARMCC">
 755       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 756       <require condition="CM4_FP_ARMCC"/>
 757       <require Dendian="Little-endian"/>
 758     </condition>
 759     <condition id="CM4_FP_BE_ARMCC">
 760       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 761       <require condition="CM4_FP_ARMCC"/>
 762       <require Dendian="Big-endian"/>
 763     </condition>
 764
 765     <!-- XMC 4000 Series devices from Infineon require a special library -->
 766     <condition id="CM4_LE_ARMCC_STD">
 767       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 768       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 769       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 770       <require Tcompiler="ARMCC"/>
 771     </condition>
 772     <condition id="CM4_LE_ARMCC_IFX">
 773       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 774       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 775       <require Tcompiler="ARMCC"/>
 776     </condition>
 777     <condition id="CM4_FP_LE_ARMCC_STD">
 778       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 779       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 780       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 781       <require Tcompiler="ARMCC"/>
 782     </condition>
 783     <condition id="CM4_FP_LE_ARMCC_IFX">
 784       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 785       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 786       <require Tcompiler="ARMCC"/>
 787     </condition>
 788
 789     <condition id="CM7_ARMCC">
 790       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 791       <require condition="CM7"/>
 792       <require Tcompiler="ARMCC"/>
 793     </condition>
 794     <condition id="CM7_LE_ARMCC">
 795       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 796       <require condition="CM7_ARMCC"/>
 797       <require Dendian="Little-endian"/>
 798     </condition>
 799     <condition id="CM7_BE_ARMCC">
 800       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 801       <require condition="CM7_ARMCC"/>
 802       <require Dendian="Big-endian"/>
 803     </condition>
 804
 805     <condition id="CM7_FP_ARMCC">
 806       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 807       <require condition="CM7_FP"/>
 808       <require Tcompiler="ARMCC"/>
 809     </condition>
 810     <condition id="CM7_FP_LE_ARMCC">
 811       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 812       <require condition="CM7_FP_ARMCC"/>
 813       <require Dendian="Little-endian"/>
 814     </condition>
 815     <condition id="CM7_FP_BE_ARMCC">
 816       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 817       <require condition="CM7_FP_ARMCC"/>
 818       <require Dendian="Big-endian"/>
 819     </condition>
 820
 821     <condition id="CM7_SP_ARMCC">
 822       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 823       <require condition="CM7_SP"/>
 824       <require Tcompiler="ARMCC"/>
 825     </condition>
 826     <condition id="CM7_SP_LE_ARMCC">
 827       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 828       <require condition="CM7_SP_ARMCC"/>
 829       <require Dendian="Little-endian"/>
 830     </condition>
 831     <condition id="CM7_SP_BE_ARMCC">
 832       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 833       <require condition="CM7_SP_ARMCC"/>
 834       <require Dendian="Big-endian"/>
 835     </condition>
 836
 837     <condition id="CM7_DP_ARMCC">
 838       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 839       <require condition="CM7_DP"/>
 840       <require Tcompiler="ARMCC"/>
 841     </condition>
 842     <condition id="CM7_DP_LE_ARMCC">
 843       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
 844       <require condition="CM7_DP_ARMCC"/>
 845       <require Dendian="Little-endian"/>
 846     </condition>
 847     <condition id="CM7_DP_BE_ARMCC">
 848       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
 849       <require condition="CM7_DP_ARMCC"/>
 850       <require Dendian="Big-endian"/>
 851     </condition>
 852
 853     <condition id="CM23_ARMCC">
 854       <description>Cortex-M23 processor based device for the ARM Compiler</description>
 855       <require condition="CM23"/>
 856       <require Tcompiler="ARMCC"/>
 857     </condition>
 858     <condition id="CM23_LE_ARMCC">
 859       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
 860       <require condition="CM23_ARMCC"/>
 861       <require Dendian="Little-endian"/>
 862     </condition>
 863     <condition id="CM23_BE_ARMCC">
 864       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
 865       <require condition="CM23_ARMCC"/>
 866       <require Dendian="Big-endian"/>
 867     </condition>
 868
 869     <condition id="CM33_ARMCC">
 870       <description>Cortex-M33 processor based device for the ARM Compiler</description>
 871       <require condition="CM33"/>
 872       <require Tcompiler="ARMCC"/>
 873     </condition>
 874     <condition id="CM33_LE_ARMCC">
 875       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
 876       <require condition="CM33_ARMCC"/>
 877       <require Dendian="Little-endian"/>
 878     </condition>
 879     <condition id="CM33_BE_ARMCC">
 880       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
 881       <require condition="CM33_ARMCC"/>
 882       <require Dendian="Big-endian"/>
 883     </condition>
 884
 885     <condition id="CM33_DSP_ARMCC">
 886       <description>Cortex-M33 processor based device with DSP extension for the ARM Compiler</description>
 887       <require condition="CM33_DSP"/>
 888       <require Tcompiler="ARMCC"/>
 889     </condition>
 890     <condition id="CM33_DSP_LE_ARMCC">
 891       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 892       <require condition="CM33_DSP_ARMCC"/>
 893       <require Dendian="Little-endian"/>
 894     </condition>
 895     <condition id="CM33_DSP_BE_ARMCC">
 896       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 897       <require condition="CM33_DSP_ARMCC"/>
 898       <require Dendian="Big-endian"/>
 899     </condition>
 900
 901     <condition id="CM33_FP_ARMCC">
 902       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
 903       <require condition="CM33_FP"/>
 904       <require Tcompiler="ARMCC"/>
 905     </condition>
 906     <condition id="CM33_FP_LE_ARMCC">
 907       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 908       <require condition="CM33_FP_ARMCC"/>
 909       <require Dendian="Little-endian"/>
 910     </condition>
 911     <condition id="CM33_FP_BE_ARMCC">
 912       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 913       <require condition="CM33_FP_ARMCC"/>
 914       <require Dendian="Big-endian"/>
 915     </condition>
 916
 917     <condition id="CM33_SP_ARMCC">
 918       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 919       <require condition="CM33_SP"/>
 920       <require Tcompiler="ARMCC"/>
 921     </condition>
 922     <condition id="CM33_SP_LE_ARMCC">
 923       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 924       <require condition="CM33_SP_ARMCC"/>
 925       <require Dendian="Little-endian"/>
 926     </condition>
 927     <condition id="CM33_SP_BE_ARMCC">
 928       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 929       <require condition="CM33_SP_ARMCC"/>
 930       <require Dendian="Big-endian"/>
 931     </condition>
 932
 933     <condition id="CM33_DSP_SP_ARMCC">
 934       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
 935       <require condition="CM33_DSP_SP"/>
 936       <require Tcompiler="ARMCC"/>
 937     </condition>
 938     <condition id="CM33_DSP_SP_LE_ARMCC">
 939       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 940       <require condition="CM33_DSP_SP_ARMCC"/>
 941       <require Dendian="Little-endian"/>
 942     </condition>
 943     <condition id="CM33_DSP_SP_BE_ARMCC">
 944       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 945       <require condition="CM33_DSP_SP_ARMCC"/>
 946       <require Dendian="Big-endian"/>
 947     </condition>
 948
 949     <condition id="ARMv8MBL_ARMCC">
 950       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
 951       <require condition="ARMv8MBL"/>
 952       <require Tcompiler="ARMCC"/>
 953     </condition>
 954     <condition id="ARMv8MBL_LE_ARMCC">
 955       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
 956       <require condition="ARMv8MBL_ARMCC"/>
 957       <require Dendian="Little-endian"/>
 958     </condition>
 959     <condition id="ARMv8MBL_BE_ARMCC">
 960       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
 961       <require condition="ARMv8MBL_ARMCC"/>
 962       <require Dendian="Big-endian"/>
 963     </condition>
 964
 965     <condition id="ARMv8MML_ARMCC">
 966       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
 967       <require condition="ARMv8MML"/>
 968       <require Tcompiler="ARMCC"/>
 969     </condition>
 970     <condition id="ARMv8MML_LE_ARMCC">
 971       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
 972       <require condition="ARMv8MML_ARMCC"/>
 973       <require Dendian="Little-endian"/>
 974     </condition>
 975     <condition id="ARMv8MML_BE_ARMCC">
 976       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
 977       <require condition="ARMv8MML_ARMCC"/>
 978       <require Dendian="Big-endian"/>
 979     </condition>
 980
 981     <condition id="ARMv8MML_DSP_ARMCC">
 982       <description>ARMv8-M Mainline processor based device with DSP extension for the ARM Compiler</description>
 983       <require condition="ARMv8MML_DSP"/>
 984       <require Tcompiler="ARMCC"/>
 985     </condition>
 986     <condition id="ARMv8MML_DSP_LE_ARMCC">
 987       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the ARM Compiler</description>
 988       <require condition="ARMv8MML_DSP_ARMCC"/>
 989       <require Dendian="Little-endian"/>
 990     </condition>
 991     <condition id="ARMv8MML_DSP_BE_ARMCC">
 992       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the ARM Compiler</description>
 993       <require condition="ARMv8MML_DSP_ARMCC"/>
 994       <require Dendian="Big-endian"/>
 995     </condition>
 996
 997     <condition id="ARMv8MML_FP_ARMCC">
 998       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
 999       <require condition="ARMv8MML_FP"/>
1000       <require Tcompiler="ARMCC"/>
1001     </condition>
1002     <condition id="ARMv8MML_FP_LE_ARMCC">
1003       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1004       <require condition="ARMv8MML_FP_ARMCC"/>
1005       <require Dendian="Little-endian"/>
1006     </condition>
1007     <condition id="ARMv8MML_FP_BE_ARMCC">
1008       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1009       <require condition="ARMv8MML_FP_ARMCC"/>
1010       <require Dendian="Big-endian"/>
1011     </condition>
1012
1013     <condition id="ARMv8MML_SP_ARMCC">
1014       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
1015       <require condition="ARMv8MML_SP"/>
1016       <require Tcompiler="ARMCC"/>
1017     </condition>
1018     <condition id="ARMv8MML_SP_LE_ARMCC">
1019       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1020       <require condition="ARMv8MML_SP_ARMCC"/>
1021       <require Dendian="Little-endian"/>
1022     </condition>
1023     <condition id="ARMv8MML_SP_BE_ARMCC">
1024       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1025       <require condition="ARMv8MML_SP_ARMCC"/>
1026       <require Dendian="Big-endian"/>
1027     </condition>
1028
1029     <condition id="ARMv8MML_DSP_SP_ARMCC">
1030       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the ARM Compiler</description>
1031       <require condition="ARMv8MML_DSP_SP"/>
1032       <require Tcompiler="ARMCC"/>
1033     </condition>
1034     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1035       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
1036       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1037       <require Dendian="Little-endian"/>
1038     </condition>
1039     <condition id="ARMv8MML_DSP_SP_BE_ARMCC">
1040       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
1041       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1042       <require Dendian="Big-endian"/>
1043     </condition>
1044
1045     <condition id="ARMv8MML_DP_ARMCC">
1046       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
1047       <require condition="ARMv8MML_DP"/>
1048       <require Tcompiler="ARMCC"/>
1049     </condition>
1050     <condition id="ARMv8MML_DP_LE_ARMCC">
1051       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1052       <require condition="ARMv8MML_DP_ARMCC"/>
1053       <require Dendian="Little-endian"/>
1054     </condition>
1055     <condition id="ARMv8MML_DP_BE_ARMCC">
1056       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1057       <require condition="ARMv8MML_DP_ARMCC"/>
1058       <require Dendian="Big-endian"/>
1059     </condition>
1060
1061     <condition id="ARMv8MML_DSP_DP_ARMCC">
1062       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the ARM Compiler</description>
1063       <require condition="ARMv8MML_DSP_DP"/>
1064       <require Tcompiler="ARMCC"/>
1065     </condition>
1066     <condition id="ARMv8MML_DSP_DP_LE_ARMCC">
1067       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1068       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1069       <require Dendian="Little-endian"/>
1070     </condition>
1071     <condition id="ARMv8MML_DSP_DP_BE_ARMCC">
1072       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1073       <require condition="ARMv8MML_DSP_DP_ARMCC"/>
1074       <require Dendian="Big-endian"/>
1075     </condition>
1076
1077     <!-- GCC compiler -->
1078     <condition id="CM0_GCC">
1079       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1080       <require condition="CM0"/>
1081       <require Tcompiler="GCC"/>
1082     </condition>
1083     <condition id="CM0_LE_GCC">
1084       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1085       <require condition="CM0_GCC"/>
1086       <require Dendian="Little-endian"/>
1087     </condition>
1088     <condition id="CM0_BE_GCC">
1089       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1090       <require condition="CM0_GCC"/>
1091       <require Dendian="Big-endian"/>
1092     </condition>
1093
1094     <condition id="CM3_GCC">
1095       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1096       <require condition="CM3"/>
1097       <require Tcompiler="GCC"/>
1098     </condition>
1099     <condition id="CM3_LE_GCC">
1100       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1101       <require condition="CM3_GCC"/>
1102       <require Dendian="Little-endian"/>
1103     </condition>
1104     <condition id="CM3_BE_GCC">
1105       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1106       <require condition="CM3_GCC"/>
1107       <require Dendian="Big-endian"/>
1108     </condition>
1109
1110     <condition id="CM4_GCC">
1111       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1112       <require condition="CM4"/>
1113       <require Tcompiler="GCC"/>
1114     </condition>
1115     <condition id="CM4_LE_GCC">
1116       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1117       <require condition="CM4_GCC"/>
1118       <require Dendian="Little-endian"/>
1119     </condition>
1120     <condition id="CM4_BE_GCC">
1121       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1122       <require condition="CM4_GCC"/>
1123       <require Dendian="Big-endian"/>
1124     </condition>
1125
1126     <condition id="CM4_FP_GCC">
1127       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1128       <require condition="CM4_FP"/>
1129       <require Tcompiler="GCC"/>
1130     </condition>
1131     <condition id="CM4_FP_LE_GCC">
1132       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1133       <require condition="CM4_FP_GCC"/>
1134       <require Dendian="Little-endian"/>
1135     </condition>
1136     <condition id="CM4_FP_BE_GCC">
1137       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1138       <require condition="CM4_FP_GCC"/>
1139       <require Dendian="Big-endian"/>
1140     </condition>
1141
1142     <!-- XMC 4000 Series devices from Infineon require a special library -->
1143     <condition id="CM4_LE_GCC_STD">
1144       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1145       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1146       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1147       <require Tcompiler="GCC"/>
1148     </condition>
1149     <condition id="CM4_LE_GCC_IFX">
1150       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1151       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1152       <require Tcompiler="GCC"/>
1153     </condition>
1154     <condition id="CM4_FP_LE_GCC_STD">
1155       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1156       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1157       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1158       <require Tcompiler="GCC"/>
1159     </condition>
1160     <condition id="CM4_FP_LE_GCC_IFX">
1161       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1162       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1163       <require Tcompiler="GCC"/>
1164     </condition>
1165
1166     <condition id="CM7_GCC">
1167       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1168       <require condition="CM7"/>
1169       <require Tcompiler="GCC"/>
1170     </condition>
1171     <condition id="CM7_LE_GCC">
1172       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1173       <require condition="CM7_GCC"/>
1174       <require Dendian="Little-endian"/>
1175     </condition>
1176     <condition id="CM7_BE_GCC">
1177       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1178       <require condition="CM7_GCC"/>
1179       <require Dendian="Big-endian"/>
1180     </condition>
1181
1182     <condition id="CM7_FP_GCC">
1183       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1184       <require condition="CM7_FP"/>
1185       <require Tcompiler="GCC"/>
1186     </condition>
1187     <condition id="CM7_FP_LE_GCC">
1188       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1189       <require condition="CM7_FP_GCC"/>
1190       <require Dendian="Little-endian"/>
1191     </condition>
1192     <condition id="CM7_FP_BE_GCC">
1193       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1194       <require condition="CM7_FP_GCC"/>
1195       <require Dendian="Big-endian"/>
1196     </condition>
1197
1198     <condition id="CM7_SP_GCC">
1199       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1200       <require condition="CM7_SP"/>
1201       <require Tcompiler="GCC"/>
1202     </condition>
1203     <condition id="CM7_SP_LE_GCC">
1204       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1205       <require condition="CM7_SP_GCC"/>
1206       <require Dendian="Little-endian"/>
1207     </condition>
1208     <condition id="CM7_SP_BE_GCC">
1209       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1210       <require condition="CM7_SP_GCC"/>
1211       <require Dendian="Big-endian"/>
1212     </condition>
1213
1214     <condition id="CM7_DP_GCC">
1215       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1216       <require condition="CM7_DP"/>
1217       <require Tcompiler="GCC"/>
1218     </condition>
1219     <condition id="CM7_DP_LE_GCC">
1220       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1221       <require condition="CM7_DP_GCC"/>
1222       <require Dendian="Little-endian"/>
1223     </condition>
1224     <condition id="CM7_DP_BE_GCC">
1225       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1226       <require condition="CM7_DP_GCC"/>
1227       <require Dendian="Big-endian"/>
1228     </condition>
1229
1230     <condition id="CM23_GCC">
1231       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1232       <require condition="CM23"/>
1233       <require Tcompiler="GCC"/>
1234     </condition>
1235     <condition id="CM23_LE_GCC">
1236       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1237       <require condition="CM23_GCC"/>
1238       <require Dendian="Little-endian"/>
1239     </condition>
1240     <condition id="CM23_BE_GCC">
1241       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1242       <require condition="CM23_GCC"/>
1243       <require Dendian="Big-endian"/>
1244     </condition>
1245
1246     <condition id="CM33_GCC">
1247       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1248       <require condition="CM33"/>
1249       <require Tcompiler="GCC"/>
1250     </condition>
1251     <condition id="CM33_LE_GCC">
1252       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1253       <require condition="CM33_GCC"/>
1254       <require Dendian="Little-endian"/>
1255     </condition>
1256     <condition id="CM33_BE_GCC">
1257       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1258       <require condition="CM33_GCC"/>
1259       <require Dendian="Big-endian"/>
1260     </condition>
1261
1262     <condition id="CM33_DSP_GCC">
1263       <description>Cortex-M33 processor based device with DSP extension for the GCC Compiler</description>
1264       <require condition="CM33_DSP"/>
1265       <require Tcompiler="GCC"/>
1266     </condition>
1267     <condition id="CM33_DSP_LE_GCC">
1268       <description>Cortex-M33 processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1269       <require condition="CM33_DSP_GCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="CM33_DSP_BE_GCC">
1273       <description>Cortex-M33 processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1274       <require condition="CM33_DSP_GCC"/>
1275       <require Dendian="Big-endian"/>
1276     </condition>
1277
1278     <condition id="CM33_FP_GCC">
1279       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1280       <require condition="CM33_FP"/>
1281       <require Tcompiler="GCC"/>
1282     </condition>
1283     <condition id="CM33_FP_LE_GCC">
1284       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1285       <require condition="CM33_FP_GCC"/>
1286       <require Dendian="Little-endian"/>
1287     </condition>
1288     <condition id="CM33_FP_BE_GCC">
1289       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1290       <require condition="CM33_FP_GCC"/>
1291       <require Dendian="Big-endian"/>
1292     </condition>
1293
1294     <condition id="CM33_SP_GCC">
1295       <description>Cortex-M33 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1296       <require condition="CM33_SP"/>
1297       <require Tcompiler="GCC"/>
1298     </condition>
1299     <condition id="CM33_SP_LE_GCC">
1300       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1301       <require condition="CM33_SP_GCC"/>
1302       <require Dendian="Little-endian"/>
1303     </condition>
1304     <condition id="CM33_SP_BE_GCC">
1305       <description>Cortex-M33 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1306       <require condition="CM33_SP_GCC"/>
1307       <require Dendian="Big-endian"/>
1308     </condition>
1309
1310     <condition id="CM33_DSP_SP_GCC">
1311       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1312       <require condition="CM33_DSP_SP"/>
1313       <require Tcompiler="GCC"/>
1314     </condition>
1315     <condition id="CM33_DSP_SP_LE_GCC">
1316       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1317       <require condition="CM33_DSP_SP_GCC"/>
1318       <require Dendian="Little-endian"/>
1319     </condition>
1320     <condition id="CM33_DSP_SP_BE_GCC">
1321       <description>Cortex-M33 processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1322       <require condition="CM33_DSP_SP_GCC"/>
1323       <require Dendian="Big-endian"/>
1324     </condition>
1325
1326     <condition id="ARMv8MBL_GCC">
1327       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1328       <require condition="ARMv8MBL"/>
1329       <require Tcompiler="GCC"/>
1330     </condition>
1331     <condition id="ARMv8MBL_LE_GCC">
1332       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1333       <require condition="ARMv8MBL_GCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336     <condition id="ARMv8MBL_BE_GCC">
1337       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1338       <require condition="ARMv8MBL_GCC"/>
1339       <require Dendian="Big-endian"/>
1340     </condition>
1341
1342     <condition id="ARMv8MML_GCC">
1343       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1344       <require condition="ARMv8MML"/>
1345       <require Tcompiler="GCC"/>
1346     </condition>
1347     <condition id="ARMv8MML_LE_GCC">
1348       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1349       <require condition="ARMv8MML_GCC"/>
1350       <require Dendian="Little-endian"/>
1351     </condition>
1352     <condition id="ARMv8MML_BE_GCC">
1353       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1354       <require condition="ARMv8MML_GCC"/>
1355       <require Dendian="Big-endian"/>
1356     </condition>
1357
1358     <condition id="ARMv8MML_DSP_GCC">
1359       <description>ARMv8-M Mainline processor based device with DSP extension for the GCC Compiler</description>
1360       <require condition="ARMv8MML_DSP"/>
1361       <require Tcompiler="GCC"/>
1362     </condition>
1363     <condition id="ARMv8MML_DSP_LE_GCC">
1364       <description>ARMv8-M Mainline processor based device with DSP extension in little endian mode for the GCC Compiler</description>
1365       <require condition="ARMv8MML_DSP_GCC"/>
1366       <require Dendian="Little-endian"/>
1367     </condition>
1368     <condition id="ARMv8MML_DSP_BE_GCC">
1369       <description>ARMv8-M Mainline processor based device with DSP extension in big endian mode for the GCC Compiler</description>
1370       <require condition="ARMv8MML_DSP_GCC"/>
1371       <require Dendian="Big-endian"/>
1372     </condition>
1373
1374     <condition id="ARMv8MML_FP_GCC">
1375       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1376       <require condition="ARMv8MML_FP"/>
1377       <require Tcompiler="GCC"/>
1378     </condition>
1379     <condition id="ARMv8MML_FP_LE_GCC">
1380       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1381       <require condition="ARMv8MML_FP_GCC"/>
1382       <require Dendian="Little-endian"/>
1383     </condition>
1384     <condition id="ARMv8MML_FP_BE_GCC">
1385       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1386       <require condition="ARMv8MML_FP_GCC"/>
1387       <require Dendian="Big-endian"/>
1388     </condition>
1389
1390     <condition id="ARMv8MML_SP_GCC">
1391       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1392       <require condition="ARMv8MML_SP"/>
1393       <require Tcompiler="GCC"/>
1394     </condition>
1395     <condition id="ARMv8MML_SP_LE_GCC">
1396       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1397       <require condition="ARMv8MML_SP_GCC"/>
1398       <require Dendian="Little-endian"/>
1399     </condition>
1400     <condition id="ARMv8MML_SP_BE_GCC">
1401       <description>ARMv8-M Mainline processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1402       <require condition="ARMv8MML_SP_GCC"/>
1403       <require Dendian="Big-endian"/>
1404     </condition>
1405
1406     <condition id="ARMv8MML_DSP_SP_GCC">
1407       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) for the GCC Compiler</description>
1408       <require condition="ARMv8MML_DSP_SP"/>
1409       <require Tcompiler="GCC"/>
1410     </condition>
1411     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1412       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1413       <require condition="ARMv8MML_DSP_SP_GCC"/>
1414       <require Dendian="Little-endian"/>
1415     </condition>
1416     <condition id="ARMv8MML_DSP_SP_BE_GCC">
1417       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1418       <require condition="ARMv8MML_DSP_SP_GCC"/>
1419       <require Dendian="Big-endian"/>
1420     </condition>
1421
1422     <condition id="ARMv8MML_DP_GCC">
1423       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1424       <require condition="ARMv8MML_DP"/>
1425       <require Tcompiler="GCC"/>
1426     </condition>
1427     <condition id="ARMv8MML_DP_LE_GCC">
1428       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1429       <require condition="ARMv8MML_DP_GCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432     <condition id="ARMv8MML_DP_BE_GCC">
1433       <description>ARMv8-M Mainline processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1434       <require condition="ARMv8MML_DP_GCC"/>
1435       <require Dendian="Big-endian"/>
1436     </condition>
1437
1438     <condition id="ARMv8MML_DSP_DP_GCC">
1439       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) for the GCC Compiler</description>
1440       <require condition="ARMv8MML_DSP_DP"/>
1441       <require Tcompiler="GCC"/>
1442     </condition>
1443     <condition id="ARMv8MML_DSP_DP_LE_GCC">
1444       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1445       <require condition="ARMv8MML_DSP_DP_GCC"/>
1446       <require Dendian="Little-endian"/>
1447     </condition>
1448     <condition id="ARMv8MML_DSP_DP_BE_GCC">
1449       <description>ARMv8-M Mainline processor based device with DSP extension using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1450       <require condition="ARMv8MML_DSP_DP_GCC"/>
1451       <require Dendian="Big-endian"/>
1452     </condition>
1453
1454     <!-- IAR compiler -->
1455     <condition id="CM0_IAR">
1456       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1457       <require condition="CM0"/>
1458       <require Tcompiler="IAR"/>
1459     </condition>
1460     <condition id="CM0_LE_IAR">
1461       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1462       <require condition="CM0_IAR"/>
1463       <require Dendian="Little-endian"/>
1464     </condition>
1465     <condition id="CM0_BE_IAR">
1466       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1467       <require condition="CM0_IAR"/>
1468       <require Dendian="Big-endian"/>
1469     </condition>
1470
1471     <condition id="CM3_IAR">
1472       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1473       <require condition="CM3"/>
1474       <require Tcompiler="IAR"/>
1475     </condition>
1476     <condition id="CM3_LE_IAR">
1477       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1478       <require condition="CM3_IAR"/>
1479       <require Dendian="Little-endian"/>
1480     </condition>
1481     <condition id="CM3_BE_IAR">
1482       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1483       <require condition="CM3_IAR"/>
1484       <require Dendian="Big-endian"/>
1485     </condition>
1486
1487     <condition id="CM4_IAR">
1488       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1489       <require condition="CM4"/>
1490       <require Tcompiler="IAR"/>
1491     </condition>
1492     <condition id="CM4_LE_IAR">
1493       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1494       <require condition="CM4_IAR"/>
1495       <require Dendian="Little-endian"/>
1496     </condition>
1497     <condition id="CM4_BE_IAR">
1498       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1499       <require condition="CM4_IAR"/>
1500       <require Dendian="Big-endian"/>
1501     </condition>
1502
1503     <condition id="CM4_FP_IAR">
1504       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1505       <require condition="CM4_FP"/>
1506       <require Tcompiler="IAR"/>
1507     </condition>
1508     <condition id="CM4_FP_LE_IAR">
1509       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1510       <require condition="CM4_FP_IAR"/>
1511       <require Dendian="Little-endian"/>
1512     </condition>
1513     <condition id="CM4_FP_BE_IAR">
1514       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1515       <require condition="CM4_FP_IAR"/>
1516       <require Dendian="Big-endian"/>
1517     </condition>
1518
1519     <condition id="CM7_IAR">
1520       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1521       <require condition="CM7"/>
1522       <require Tcompiler="IAR"/>
1523     </condition>
1524     <condition id="CM7_LE_IAR">
1525       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1526       <require condition="CM7_IAR"/>
1527       <require Dendian="Little-endian"/>
1528     </condition>
1529     <condition id="CM7_BE_IAR">
1530       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1531       <require condition="CM7_IAR"/>
1532       <require Dendian="Big-endian"/>
1533     </condition>
1534
1535     <condition id="CM7_FP_IAR">
1536       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1537       <require condition="CM7_FP"/>
1538       <require Tcompiler="IAR"/>
1539     </condition>
1540     <condition id="CM7_FP_LE_IAR">
1541       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1542       <require condition="CM7_FP_IAR"/>
1543       <require Dendian="Little-endian"/>
1544     </condition>
1545     <condition id="CM7_FP_BE_IAR">
1546       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1547       <require condition="CM7_FP_IAR"/>
1548       <require Dendian="Big-endian"/>
1549     </condition>
1550
1551     <condition id="CM7_SP_IAR">
1552       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1553       <require condition="CM7_SP"/>
1554       <require Tcompiler="IAR"/>
1555     </condition>
1556     <condition id="CM7_SP_LE_IAR">
1557       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1558       <require condition="CM7_SP_IAR"/>
1559       <require Dendian="Little-endian"/>
1560     </condition>
1561     <condition id="CM7_SP_BE_IAR">
1562       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1563       <require condition="CM7_SP_IAR"/>
1564       <require Dendian="Big-endian"/>
1565     </condition>
1566
1567     <condition id="CM7_DP_IAR">
1568       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1569       <require condition="CM7_DP"/>
1570       <require Tcompiler="IAR"/>
1571     </condition>
1572     <condition id="CM7_DP_LE_IAR">
1573       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1574       <require condition="CM7_DP_IAR"/>
1575       <require Dendian="Little-endian"/>
1576     </condition>
1577     <condition id="CM7_DP_BE_IAR">
1578       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1579       <require condition="CM7_DP_IAR"/>
1580       <require Dendian="Big-endian"/>
1581     </condition>
1582
1583     <!-- conditions selecting single devices and CMSIS Core -->
1584     <!-- used for component startup, GCC version is used for C-Startup -->
1585     <condition id="ARMCM0 CMSIS">
1586       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1587       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1588       <require Cclass="CMSIS" Cgroup="CORE"/>
1589     </condition>
1590     <condition id="ARMCM0 CMSIS GCC">
1591       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1592       <require condition="ARMCM0 CMSIS"/>
1593       <require condition="GCC"/>
1594     </condition>
1595
1596     <condition id="ARMCM0+ CMSIS">
1597       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1598       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1599       <require Cclass="CMSIS" Cgroup="CORE"/>
1600     </condition>
1601     <condition id="ARMCM0+ CMSIS GCC">
1602       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1603       <require condition="ARMCM0+ CMSIS"/>
1604       <require condition="GCC"/>
1605     </condition>
1606
1607     <condition id="ARMCM3 CMSIS">
1608       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1609       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1610       <require Cclass="CMSIS" Cgroup="CORE"/>
1611     </condition>
1612     <condition id="ARMCM3 CMSIS GCC">
1613       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1614       <require condition="ARMCM3 CMSIS"/>
1615       <require condition="GCC"/>
1616     </condition>
1617
1618     <condition id="ARMCM4 CMSIS">
1619       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1620       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1621       <require Cclass="CMSIS" Cgroup="CORE"/>
1622     </condition>
1623     <condition id="ARMCM4 CMSIS GCC">
1624       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1625       <require condition="ARMCM4 CMSIS"/>
1626       <require condition="GCC"/>
1627     </condition>
1628
1629     <condition id="ARMCM7 CMSIS">
1630       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1631       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1632       <require Cclass="CMSIS" Cgroup="CORE"/>
1633     </condition>
1634     <condition id="ARMCM7 CMSIS GCC">
1635       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1636       <require condition="ARMCM7 CMSIS"/>
1637       <require condition="GCC"/>
1638     </condition>
1639
1640     <condition id="ARMCM23 CMSIS">
1641       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1642       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1643       <require Cclass="CMSIS" Cgroup="CORE"/>
1644     </condition>
1645     <condition id="ARMCM23 CMSIS GCC">
1646       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1647       <require condition="ARMCM23 CMSIS"/>
1648       <require condition="GCC"/>
1649     </condition>
1650
1651     <condition id="ARMCM33 CMSIS">
1652       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1653       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1654       <require Cclass="CMSIS" Cgroup="CORE"/>
1655     </condition>
1656     <condition id="ARMCM33 CMSIS GCC">
1657       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1658       <require condition="ARMCM33 CMSIS"/>
1659       <require condition="GCC"/>
1660     </condition>
1661
1662     <condition id="ARMSC000 CMSIS">
1663       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1664       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1665       <require Cclass="CMSIS" Cgroup="CORE"/>
1666     </condition>
1667     <condition id="ARMSC000 CMSIS GCC">
1668       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1669       <require condition="ARMSC000 CMSIS"/>
1670       <require condition="GCC"/>
1671     </condition>
1672
1673     <condition id="ARMSC300 CMSIS">
1674       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1675       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1676       <require Cclass="CMSIS" Cgroup="CORE"/>
1677     </condition>
1678     <condition id="ARMSC300 CMSIS GCC">
1679       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1680       <require condition="ARMSC300 CMSIS"/>
1681       <require condition="GCC"/>
1682     </condition>
1683
1684     <condition id="ARMv8MBL CMSIS">
1685       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1686       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1687       <require Cclass="CMSIS" Cgroup="CORE"/>
1688     </condition>
1689     <condition id="ARMv8MBL CMSIS GCC">
1690       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1691       <require condition="ARMv8MBL CMSIS"/>
1692       <require condition="GCC"/>
1693     </condition>
1694
1695     <condition id="ARMv8MML CMSIS">
1696       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1697       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1698       <require Cclass="CMSIS" Cgroup="CORE"/>
1699     </condition>
1700     <condition id="ARMv8MML CMSIS GCC">
1701       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1702       <require condition="ARMv8MML CMSIS"/>
1703       <require condition="GCC"/>
1704     </condition>
1705
1706     <!-- CMSIS DSP -->
1707     <condition id="CMSIS DSP">
1708       <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
1709       <require condition="ARMv6_7-M Device"/>
1710       <require Cclass="CMSIS" Cgroup="CORE"/>
1711       <require condition="ARMCC GCC"/>
1712     </condition>
1713
1714     <!-- RTOS RTX -->
1715     <condition id="RTOS RTX">
1716       <description>Components required for RTOS RTX</description>
1717       <require condition="ARMv6_7-M Device"/>
1718       <require condition="ARMCC GCC IAR"/>
1719       <require Cclass="Device" Cgroup="Startup"/>
1720       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1721     </condition>
1722     <condition id="RTOS RTX5">
1723       <description>Components required for RTOS RTX5</description>
1724       <require condition="ARMv6_7_8-M Device"/>
1725       <require condition="ARMCC GCC"/>
1726       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1727     </condition>
1728     <condition id="RTOS2 RTX5">
1729       <description>Components required for RTOS2 RTX5</description>
1730       <require condition="ARMv6_7_8-M Device"/>
1731       <require condition="ARMCC GCC"/>
1732       <require Cclass="CMSIS"  Cgroup="CORE"/>
1733       <require Cclass="Device" Cgroup="Startup"/>
1734     </condition>
1735     <condition id="RTOS2 RTX5 NS">
1736       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1737       <require condition="ARMv8-M TZ Device"/>
1738       <require condition="ARMCC GCC"/>
1739       <require Cclass="CMSIS"  Cgroup="CORE"/>
1740       <require Cclass="Device" Cgroup="Startup"/>
1741     </condition>
1742
1743   </conditions>
1744
1745   <components>
1746     <!-- CMSIS-Core component -->
1747     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0"  condition="ARMv6_7_8-M Device" >
1748       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1749       <files>
1750         <!-- CPU independent -->
1751         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1752         <file category="include" name="CMSIS/Include/"/>
1753         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1754         <!-- Code template -->
1755         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     select="Secure mode 'main' module for ARMv8-M"/>
1756         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1757       </files>
1758     </component>
1759
1760     <!-- CMSIS-Startup components -->
1761     <!-- Cortex-M0 -->
1762     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1763       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1764       <files>
1765         <!-- include folder / device header file -->
1766         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1767         <!-- startup / system file -->
1768         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1769         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1770         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1771         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1772         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1773       </files>
1774     </component>
1775     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1776       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1777       <files>
1778         <!-- include folder / device header file -->
1779         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1780         <!-- startup / system file -->
1781         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1782         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1783         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1784       </files>
1785     </component>
1786
1787     <!-- Cortex-M0+ -->
1788     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1789       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1790       <files>
1791         <!-- include folder / device header file -->
1792         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1793         <!-- startup / system file -->
1794         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1795         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1796         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1797         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1798         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1799       </files>
1800     </component>
1801     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1802       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1803       <files>
1804         <!-- include folder / device header file -->
1805         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1806         <!-- startup / system file -->
1807         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1808         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1809         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1810       </files>
1811     </component>
1812
1813     <!-- Cortex-M3 -->
1814     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1815       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1816       <files>
1817         <!-- include folder / device header file -->
1818         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1819         <!-- startup / system file -->
1820         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1821         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1822         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1823         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1824         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1825       </files>
1826     </component>
1827     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1828       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1829       <files>
1830         <!-- include folder / device header file -->
1831         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1832         <!-- startup / system file -->
1833         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1834         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1835         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1836       </files>
1837     </component>
1838
1839     <!-- Cortex-M4 -->
1840     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1841       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1842       <files>
1843         <!-- include folder / device header file -->
1844         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1845         <!-- startup / system file -->
1846         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1847         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1848         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1849         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1850         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1851       </files>
1852     </component>
1853     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1854       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1855       <files>
1856         <!-- include folder / device header file -->
1857         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1858         <!-- startup / system file -->
1859         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1860         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1861         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1862       </files>
1863     </component>
1864
1865     <!-- Cortex-M7 -->
1866     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1867       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1868       <files>
1869         <!-- include folder / device header file -->
1870         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1871         <!-- startup / system file -->
1872         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1873         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1874         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1875         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1876         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1877       </files>
1878     </component>
1879     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1880       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1881       <files>
1882         <!-- include folder / device header file -->
1883         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1884         <!-- startup / system file -->
1885         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1886         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1887         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1888       </files>
1889     </component>
1890
1891     <!-- Cortex-M23 -->
1892     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
1893       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1894       <files>
1895         <!-- include folder / device header file -->
1896         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
1897         <!-- startup / system file -->
1898         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
1899         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
1900         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1901         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1902         <!-- SAU configuration -->
1903         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1904       </files>
1905     </component>
1906     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
1907       <description>System and Startup for Generic ARM Cortex-M23 device</description>
1908       <files>
1909         <!-- include folder / device header file -->
1910         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
1911         <!-- startup / system file -->
1912         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
1913         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1914         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
1915         <!-- SAU configuration -->
1916         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1917       </files>
1918     </component>
1919
1920     <!-- Cortex-M33 -->
1921     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM33 CMSIS">
1922       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1923       <files>
1924         <!-- include folder / device header file -->
1925         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
1926         <!-- startup / system file -->
1927         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s" version="1.0.0" attr="config" condition="ARMCC"/>
1928         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S" version="1.0.0" attr="config" condition="GCC"/>
1929         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1930         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
1931         <!-- SAU configuration -->
1932         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1933       </files>
1934     </component>
1935     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM33 CMSIS GCC">
1936       <description>System and Startup for Generic ARM Cortex-M33 device</description>
1937       <files>
1938         <!-- include folder / device header file -->
1939         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
1940         <!-- startup / system file -->
1941         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c" version="1.0.0" attr="config" condition="GCC"/>
1942         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
1943         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"      version="1.0.0" attr="config"/>
1944         <!-- SAU configuration -->
1945         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
1946       </files>
1947     </component>
1948
1949     <!-- Cortex-SC000 -->
1950     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1951       <description>System and Startup for Generic ARM SC000 device</description>
1952       <files>
1953         <!-- include folder / device header file -->
1954         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1955         <!-- startup / system file -->
1956         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1957         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1958         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1959         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1960         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1961       </files>
1962     </component>
1963     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1964       <description>System and Startup for Generic ARM SC000 device</description>
1965       <files>
1966         <!-- include folder / device header file -->
1967         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1968         <!-- startup / system file -->
1969         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1970         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1971         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
1972       </files>
1973     </component>
1974
1975     <!-- Cortex-SC300 -->
1976     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1977       <description>System and Startup for Generic ARM SC300 device</description>
1978       <files>
1979         <!-- include folder / device header file -->
1980         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1981         <!-- startup / system file -->
1982         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1983         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1984         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1985         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1986         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1987       </files>
1988     </component>
1989     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1990       <description>System and Startup for Generic ARM SC300 device</description>
1991       <files>
1992         <!-- include folder / device header file -->
1993         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1994         <!-- startup / system file -->
1995         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1996         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
1997         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
1998       </files>
1999     </component>
2000
2001     <!-- ARMv8MBL -->
2002     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2003       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2004       <files>
2005         <!-- include folder / device header file -->
2006         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2007         <!-- startup / system file -->
2008         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2009         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2010         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2011         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2012         <!-- SAU configuration -->
2013         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2014       </files>
2015     </component>
2016     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2017       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2018       <files>
2019         <!-- include folder / device header file -->
2020         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2021         <!-- startup / system file -->
2022         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2023         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2024         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2025         <!-- SAU configuration -->
2026         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2027       </files>
2028     </component>
2029
2030     <!-- ARMv8MML -->
2031     <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
2032       <description>System and Startup for Generic ARM ARMv8MML device</description>
2033       <files>
2034         <!-- include folder / device header file -->
2035         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2036         <!-- startup / system file -->
2037         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
2038         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
2039         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2040         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2041         <!-- SAU configuration -->
2042         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2043       </files>
2044     </component>
2045     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
2046       <description>System and Startup for Generic ARM ARMv8MML device</description>
2047       <files>
2048         <!-- include folder / device header file -->
2049         <file category="include"  name="Device/ARM/ARMv8MML/Include/"/>
2050         <!-- startup / system file -->
2051         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
2052         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2053         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"      version="1.0.0" attr="config"/>
2054         <!-- SAU configuration -->
2055         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2056       </files>
2057     </component>
2058
2059
2060     <!-- CMSIS-DSP component -->
2061     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
2062       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2063       <files>
2064         <!-- CPU independent -->
2065         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2066         <file category="header" name="CMSIS/Include/arm_math.h"/>
2067
2068         <!-- CPU and Compiler dependent -->
2069         <!-- ARMCC -->
2070         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2071         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2072         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2073         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2074         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2075         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2076         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2077         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2078         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2079         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2080         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2081         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2082         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2083         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2084 <!--
2085         <file category="library" condition="CM23_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2086         <file category="library" condition="CM33_LE_ARMCC"            name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2087         <file category="library" condition="CM33_DSP_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2088         <file category="library" condition="CM33_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2089         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2090         <file category="library" condition="ARMv8MBL_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2091         <file category="library" condition="ARMv8MML_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2092         <file category="library" condition="ARMv8MML_DSP_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2093         <file category="library" condition="ARMv8MML_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2094         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2095 -->
2096         <!-- GCC -->
2097         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2098         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2099         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2100         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2101         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2102         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2103         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2104 <!--
2105         <file category="library" condition="CM23_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2106         <file category="library" condition="CM33_LE_GCC"              name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2107         <file category="library" condition="CM33_DSP_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2108         <file category="library" condition="CM33_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2109         <file category="library" condition="CM33_DSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2110         <file category="library" condition="ARMv8MBL_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2111         <file category="library" condition="ARMv8MML_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2112         <file category="library" condition="ARMv8MML_DSP_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2113         <file category="library" condition="ARMv8MML_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2114         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"   name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2115 -->
2116       </files>
2117     </component>
2118
2119     <!-- CMSIS-RTOS Keil RTX component -->
2120     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTOS RTX">
2121       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2122       <RTE_Components_h>
2123         <!-- the following content goes into file 'RTE_Components.h' -->
2124         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2125         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2126       </RTE_Components_h>
2127       <files>
2128         <!-- CPU independent -->
2129         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2130         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2131         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2132
2133         <!-- RTX templates -->
2134         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2135         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2136         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2137         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2138         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2139         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2140         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2141         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2142         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2143         <!-- tool-chain specific template file -->
2144         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2145         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2146         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2147
2148         <!-- CPU and Compiler dependent -->
2149         <!-- ARMCC -->
2150         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2151         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2152         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2153         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2154         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2155         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2156         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2157         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2158         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2159         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2160         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2161         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2162         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2163         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2164         <!-- GCC -->
2165         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2166         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2167         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2168         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2169         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2170         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2171         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2172         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2173         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2174         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2175         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2176         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2177         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2178         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2179         <!-- IAR -->
2180         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2181         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2182         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2183         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2184         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2185         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2186         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2187         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2188         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2189         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2190         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2191         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2192       </files>
2193     </component>
2194
2195     <!-- CMSIS-RTOS Keil RTX5 component -->
2196     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0" Capiversion="1.0" condition="RTOS RTX5">
2197       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2198       <RTE_Components_h>
2199         <!-- the following content goes into file 'RTE_Components.h' -->
2200         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2201         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2202       </RTE_Components_h>
2203       <files>
2204         <!-- RTX header file -->
2205         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2206         <!-- RTX compatibility module for API V1 -->
2207         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2208       </files>
2209     </component>
2210
2211     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2212     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2213       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2214       <RTE_Components_h>
2215         <!-- the following content goes into file 'RTE_Components.h' -->
2216         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2217         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2218       </RTE_Components_h>
2219       <files>
2220         <!-- RTX documentation -->
2221         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2222
2223         <!-- RTX header files -->
2224         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2225         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2226
2227         <!-- RTX configuration -->
2228         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2229
2230         <!-- RTX templates -->
2231         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2232         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2233         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2234         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2235         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2236         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2237         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2238         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2239         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2240
2241         <!-- RTX libraries (CPU and Compiler dependent) -->
2242         <!-- ARMCC -->
2243         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2244         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2245         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2246         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2247         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2248         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2249         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2250         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2251         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2252         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2253         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2254         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2255         <!-- GCC -->
2256         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2257         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2258         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2259         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2260         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2261         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2262         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2263         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2264         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2265         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2266         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2267         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2268       </files>
2269     </component>
2270     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2271       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2272       <RTE_Components_h>
2273         <!-- the following content goes into file 'RTE_Components.h' -->
2274         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2275         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2276         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2277       </RTE_Components_h>
2278       <files>
2279         <!-- RTX documentation -->
2280         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2281
2282         <!-- RTX header files -->
2283         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2284         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2285
2286         <!-- RTX configuration -->
2287         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2288
2289         <!-- RTX templates -->
2290         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2291         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2292         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2293         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2294         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2295         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2296         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2297         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2298         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2299
2300         <!-- RTX libraries (CPU and Compiler dependent) -->
2301         <!-- ARMCC -->
2302         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2303         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2304         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2305         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2306         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2307         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2308         <!-- GCC -->
2309         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2310         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2311         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2312         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2313         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2314         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2315       </files>
2316     </component>
2317     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5">
2318       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2319       <RTE_Components_h>
2320         <!-- the following content goes into file 'RTE_Components.h' -->
2321         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2322         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2323         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2324       </RTE_Components_h>
2325       <files>
2326         <!-- RTX documentation -->
2327         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2328
2329         <!-- RTX header files -->
2330         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2331         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2332
2333         <!-- RTX configuration -->
2334         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2335
2336         <!-- RTX templates -->
2337         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2338         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2339         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2340         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2341         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2342         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2343         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2344         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2345         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2346
2347         <!-- RTX sources (core) -->
2348         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2349         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2350         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2351         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2352         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2353         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2354         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2355         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2356         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2357         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2358         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2359         <!-- RTX sources (handlers ARMCC) -->
2360         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2361         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2362         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2363         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2364         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2365         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2366         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2367         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2368         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2369         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2370         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2371         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2372         <!-- RTX sources (handlers GCC) -->
2373         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2374         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2375         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2377         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2378         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2379         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2380         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2381         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2382         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2383         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2384         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2385       </files>
2386     </component>
2387     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.0.0" Capiversion="2.0" condition="RTOS2 RTX5 NS">
2388       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2389       <RTE_Components_h>
2390         <!-- the following content goes into file 'RTE_Components.h' -->
2391         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2392         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2393         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2394         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2395       </RTE_Components_h>
2396       <files>
2397         <!-- RTX documentation -->
2398         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2399
2400         <!-- RTX header files -->
2401         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
2402         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2403
2404         <!-- RTX configuration -->
2405         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
2406
2407         <!-- RTX templates -->
2408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2416         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2417
2418         <!-- RTX sources (core) -->
2419         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2421         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2422         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2423         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2424         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2425         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2426         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2427         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2428         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2429         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2430         <!-- RTX sources (ARMCC handlers) -->
2431         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2432         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2433         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2434         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2435         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2436         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2437         <!-- RTX sources (GCC handlers) -->
2438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2444       </files>
2445     </component>
2446
2447   </components>
2448
2449   <boards>
2450     <board name="uVision Simulator" vendor="Keil">
2451       <description>uVision Simulator</description>
2452       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2453       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2454       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2455       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2456       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2457     </board>
2458   </boards>
2459
2460   <examples>
2461     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2462       <description>DSP_Lib Class Marks example</description>
2463       <board name="uVision Simulator" vendor="Keil"/>
2464       <project>
2465         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2466       </project>
2467       <attributes>
2468         <component Cclass="CMSIS" Cgroup="CORE"/>
2469         <component Cclass="CMSIS" Cgroup="DSP"/>
2470         <component Cclass="Device" Cgroup="Startup"/>
2471         <category>Getting Started</category>
2472       </attributes>
2473     </example>
2474
2475     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2476       <description>DSP_Lib Convolution example</description>
2477       <board name="uVision Simulator" vendor="Keil"/>
2478       <project>
2479         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2480       </project>
2481       <attributes>
2482         <component Cclass="CMSIS" Cgroup="CORE"/>
2483         <component Cclass="CMSIS" Cgroup="DSP"/>
2484         <component Cclass="Device" Cgroup="Startup"/>
2485         <category>Getting Started</category>
2486       </attributes>
2487     </example>
2488
2489     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2490       <description>DSP_Lib Dotproduct example</description>
2491       <board name="uVision Simulator" vendor="Keil"/>
2492       <project>
2493         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2494       </project>
2495       <attributes>
2496         <component Cclass="CMSIS" Cgroup="CORE"/>
2497         <component Cclass="CMSIS" Cgroup="DSP"/>
2498         <component Cclass="Device" Cgroup="Startup"/>
2499         <category>Getting Started</category>
2500       </attributes>
2501     </example>
2502
2503     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2504       <description>DSP_Lib FFT Bin example</description>
2505       <board name="uVision Simulator" vendor="Keil"/>
2506       <project>
2507         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2508       </project>
2509       <attributes>
2510         <component Cclass="CMSIS" Cgroup="CORE"/>
2511         <component Cclass="CMSIS" Cgroup="DSP"/>
2512         <component Cclass="Device" Cgroup="Startup"/>
2513         <category>Getting Started</category>
2514       </attributes>
2515     </example>
2516
2517     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2518       <description>DSP_Lib FIR example</description>
2519       <board name="uVision Simulator" vendor="Keil"/>
2520       <project>
2521         <environment name="uv" load="arm_fir_example.uvprojx"/>
2522       </project>
2523       <attributes>
2524         <component Cclass="CMSIS" Cgroup="CORE"/>
2525         <component Cclass="CMSIS" Cgroup="DSP"/>
2526         <component Cclass="Device" Cgroup="Startup"/>
2527         <category>Getting Started</category>
2528       </attributes>
2529     </example>
2530
2531     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2532       <description>DSP_Lib Graphic Equalizer example</description>
2533       <board name="uVision Simulator" vendor="Keil"/>
2534       <project>
2535         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2536       </project>
2537       <attributes>
2538         <component Cclass="CMSIS" Cgroup="CORE"/>
2539         <component Cclass="CMSIS" Cgroup="DSP"/>
2540         <component Cclass="Device" Cgroup="Startup"/>
2541         <category>Getting Started</category>
2542       </attributes>
2543     </example>
2544
2545     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2546       <description>DSP_Lib Linear Interpolation example</description>
2547       <board name="uVision Simulator" vendor="Keil"/>
2548       <project>
2549         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2550       </project>
2551       <attributes>
2552         <component Cclass="CMSIS" Cgroup="CORE"/>
2553         <component Cclass="CMSIS" Cgroup="DSP"/>
2554         <component Cclass="Device" Cgroup="Startup"/>
2555         <category>Getting Started</category>
2556       </attributes>
2557     </example>
2558
2559     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2560       <description>DSP_Lib Matrix example</description>
2561       <board name="uVision Simulator" vendor="Keil"/>
2562       <project>
2563         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2564       </project>
2565       <attributes>
2566         <component Cclass="CMSIS" Cgroup="CORE"/>
2567         <component Cclass="CMSIS" Cgroup="DSP"/>
2568         <component Cclass="Device" Cgroup="Startup"/>
2569         <category>Getting Started</category>
2570       </attributes>
2571     </example>
2572
2573     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2574       <description>DSP_Lib Signal Convergence example</description>
2575       <board name="uVision Simulator" vendor="Keil"/>
2576       <project>
2577         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2578       </project>
2579       <attributes>
2580         <component Cclass="CMSIS" Cgroup="CORE"/>
2581         <component Cclass="CMSIS" Cgroup="DSP"/>
2582         <component Cclass="Device" Cgroup="Startup"/>
2583         <category>Getting Started</category>
2584       </attributes>
2585     </example>
2586
2587     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2588       <description>DSP_Lib Sinus/Cosinus example</description>
2589       <board name="uVision Simulator" vendor="Keil"/>
2590       <project>
2591         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2592       </project>
2593       <attributes>
2594         <component Cclass="CMSIS" Cgroup="CORE"/>
2595         <component Cclass="CMSIS" Cgroup="DSP"/>
2596         <component Cclass="Device" Cgroup="Startup"/>
2597         <category>Getting Started</category>
2598       </attributes>
2599     </example>
2600
2601     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2602       <description>DSP_Lib Variance example</description>
2603       <board name="uVision Simulator" vendor="Keil"/>
2604       <project>
2605         <environment name="uv" load="arm_variance_example.uvprojx"/>
2606       </project>
2607       <attributes>
2608         <component Cclass="CMSIS" Cgroup="CORE"/>
2609         <component Cclass="CMSIS" Cgroup="DSP"/>
2610         <component Cclass="Device" Cgroup="Startup"/>
2611         <category>Getting Started</category>
2612       </attributes>
2613     </example>
2614
2615     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2616       <description>CMSIS-RTOS2 Blinky example</description>
2617       <board name="uVision Simulator" vendor="Keil"/>
2618       <project>
2619         <environment name="uv" load="Blinky.uvprojx"/>
2620       </project>
2621       <attributes>
2622         <component Cclass="CMSIS" Cgroup="CORE"/>
2623         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2624         <component Cclass="Device" Cgroup="Startup"/>
2625         <category>Getting Started</category>
2626       </attributes>
2627     </example>
2628
2629     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2630       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2631       <board name="uVision Simulator" vendor="Keil"/>
2632       <project>
2633         <environment name="uv" load="Blinky.uvprojx"/>
2634       </project>
2635       <attributes>
2636         <component Cclass="CMSIS" Cgroup="CORE"/>
2637         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2638         <component Cclass="Device" Cgroup="Startup"/>
2639         <category>Getting Started</category>
2640       </attributes>
2641     </example>
2642
2643     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2644       <description>Bare-metal secure/non-secure example without RTOS</description>
2645       <board name="uVision Simulator" vendor="Keil"/>
2646       <project>
2647         <environment name="uv" load="NoRTOS.uvmpw"/>
2648       </project>
2649       <attributes>
2650         <component Cclass="CMSIS" Cgroup="CORE"/>
2651         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2652         <component Cclass="Device" Cgroup="Startup"/>
2653         <category>Getting Started</category>
2654       </attributes>
2655     </example>
2656
2657     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2658       <description>Secure/non-secure RTOS example with thread context management</description>
2659       <board name="uVision Simulator" vendor="Keil"/>
2660       <project>
2661         <environment name="uv" load="RTOS.uvmpw"/>
2662       </project>
2663       <attributes>
2664         <component Cclass="CMSIS" Cgroup="CORE"/>
2665         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2666         <component Cclass="Device" Cgroup="Startup"/>
2667         <category>Getting Started</category>
2668       </attributes>
2669     </example>
2670
2671     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2672       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2673       <board name="uVision Simulator" vendor="Keil"/>
2674       <project>
2675         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2676       </project>
2677       <attributes>
2678         <component Cclass="CMSIS" Cgroup="CORE"/>
2679         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2680         <component Cclass="Device" Cgroup="Startup"/>
2681         <category>Getting Started</category>
2682       </attributes>
2683     </example>
2684
2685   </examples>
2686
2687 </package>