begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.0.2-dev4">
  12       CMSIS Device:
  13       - Added OS Tick API
  14     </release>
  15     <release version="5.0.2-dev3">
  16       CMSIS-Core_A:
  17       - Added ARM Compiler 6 support
  18       - Updated Cortex-A core functions
  19       - Updated Startup and System files
  20       CMSIS-RTOS2:
  21       - API 2.1.1 (see revision history for details)
  22       - RTX 5.2.0 (see revision history for details)
  23     </release>
  24     <release version="5.0.2-dev2">
  25       CMSIS-RTOS2:
  26       - RTX 5.1.1 (see revision history for details)
  27     </release>
  28     <release version="5.0.2-dev1">
  29       CMSIS-Core_A:
  30       - Added Cortex-A core support, ARMCC specific:
  31         - Core specific register definitions
  32         - Generic Interrupt Controller functions
  33         - Generic Timer functions
  34         - L1 and L2 Cache functions
  35         - MMU functions
  36       - Added ARMCA5, ARMCA7 and ARMCA9 devices
  37       - Added Startup, System and MMU configuration files
  38     </release>
  39     <release version="5.0.2-dev0">
  40       CMSIS-Core: 5.0.2 (see revision history for details)
  41       - Added macros __UNALIGNED_UINT16_READ, __UNALIGNED_UINT16_WRITE
  42       - Added macros __UNALIGNED_UINT32_READ, __UNALIGNED_UINT32_WRITE
  43       - Set macro __UNALIGNED_UINT32 to deprecated
  44     </release>
  45     <release version="5.0.1" date="2017-02-03">
  46       Package Description:
  47       - added taxonomy for Cclass RTOS
  48       CMSIS-RTOS2:
  49       - API 2.1   (see revision history for details)
  50       - RTX 5.1.0 (see revision history for details)
  51       CMSIS-Core: 5.0.1 (see revision history for details)
  52       - Added __PACKED_STRUCT macro
  53       - Added uVisior support
  54       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  55       - Updated template for secure main function (main_s.c)
  56       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  57       CMSIS-DSP: 1.5.1 (see revision history for details)
  58       - added ARMv8M DSP libraries.
  59       CMSIS-PACK:1.4.9 (see revision history for details)
  60       - added Pack Index File specification and schema file
  61     </release>
  62     <release version="5.0.0" date="2016-11-11">
  63       Changed open source license to Apache 2.0
  64       CMSIS_Core:
  65        - Added support for Cortex-M23 and Cortex-M33.
  66        - Added ARMv8-M device configurations for mainline and baseline.
  67        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  68        - Added cmsis_compiler.h to unify compiler behaviour.
  69        - Updated function SCB_EnableICache (for Cortex-M7).
  70        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  71       CMSIS-RTOS:
  72         - bug fix in RTX 4.82 (see revision history for details)
  73       CMSIS-RTOS2:
  74         - new API including compatibility layer to CMSIS-RTOS
  75         - reference implementation based on RTX5
  76         - supports all Cortex-M variants including TrustZone for ARMv8-M
  77       CMSIS-SVD:
  78        - reworked SVD format documentation
  79        - removed SVD file database documentation as SVD files are distributed in packs
  80        - updated SVDConv for Win32 and Linux
  81       CMSIS-DSP:
  82        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
  83        - Added DSP libraries build projects to CMSIS pack.
  84     </release>
  85     <release version="4.5.0" date="2015-10-28">
  86       - CMSIS-Core     4.30.0  (see revision history for details)
  87       - CMSIS-DAP      1.1.0   (unchanged)
  88       - CMSIS-Driver   2.04.0  (see revision history for details)
  89       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
  90       - CMSIS-PACK     1.4.1   (see revision history for details)
  91       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
  92       - CMSIS-SVD      1.3.1   (see revision history for details)
  93     </release>
  94     <release version="4.4.0" date="2015-09-11">
  95       - CMSIS-Core     4.20   (see revision history for details)
  96       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
  97       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
  98       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
  99       - CMSIS-RTOS
 100         -- API         1.02   (unchanged)
 101         -- RTX         4.79   (see revision history for details)
 102       - CMSIS-SVD      1.3.0  (see revision history for details)
 103       - CMSIS-DAP      1.1.0  (extended with SWO support)
 104     </release>
 105     <release version="4.3.0" date="2015-03-20">
 106       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 107       - CMSIS-DSP      1.4.5  (see revision history for details)
 108       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 109       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 110       - CMSIS-RTOS
 111         -- API         1.02   (unchanged)
 112         -- RTX         4.78   (see revision history for details)
 113       - CMSIS-SVD      1.2    (unchanged)
 114     </release>
 115     <release version="4.2.0" date="2014-09-24">
 116       Adding Cortex-M7 support
 117       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 118       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 119       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 120       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 121       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 122     </release>
 123     <release version="4.1.1" date="2014-06-30">
 124       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 125     </release>
 126     <release version="4.1.0" date="2014-06-12">
 127       - CMSIS-Driver   2.02  (incompatible update)
 128       - CMSIS-Pack     1.3   (see revision history for details)
 129       - CMSIS-DSP      1.4.2 (unchanged)
 130       - CMSIS-Core     3.30  (unchanged)
 131       - CMSIS-RTOS RTX 4.74  (unchanged)
 132       - CMSIS-RTOS API 1.02  (unchanged)
 133       - CMSIS-SVD      1.10  (unchanged)
 134       PACK:
 135       - removed G++ specific files from PACK
 136       - added Component Startup variant "C Startup"
 137       - added Pack Checking Utility
 138       - updated conditions to reflect tool-chain dependency
 139       - added Taxonomy for Graphics
 140       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 141     </release>
 142     <release version="4.0.0">
 143       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 144       - CMSIS-Pack     1.1   Preliminary
 145       - CMSIS-DSP      1.4.2 (see revision history for details)
 146       - CMSIS-Core     3.30  (see revision history for details)
 147       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 148       - CMSIS-RTOS API 1.02  (unchanged)
 149       - CMSIS-SVD      1.10  (unchanged)
 150     </release>
 151     <release version="3.20.4">
 152       - CMSIS-RTOS 4.74 (see revision history for details)
 153       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 154     </release>
 155     <release version="3.20.3">
 156       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 157       - CMSIS-RTOS 4.73 (see revision history for details)
 158     </release>
 159     <release version="3.20.2">
 160       - CMSIS-Pack documentation has been added
 161       - CMSIS-Drivers header and documentation have been added to PACK
 162       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 163     </release>
 164     <release version="3.20.1">
 165       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 166       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 167     </release>
 168     <release version="3.20.0">
 169       The software portions that are deployed in the application program are now under a BSD license which allows usage
 170       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 171       The individual components have been update as listed below:
 172       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 173       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 174       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 175       - CMSIS-SVD is unchanged.
 176     </release>
 177   </releases>
 178
 179   <taxonomy>
 180     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 181     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 182     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 183     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 184     <description Cclass="File System">File Drive Support and File System</description>
 185     <description Cclass="Graphics">Graphical User Interface</description>
 186     <description Cclass="Network">Network Stack using Internet Protocols</description>
 187     <description Cclass="USB">Universal Serial Bus Stack</description>
 188     <description Cclass="Compiler">Compiler Software Extensions</description>
 189     <description Cclass="RTOS">Real-time Operating System</description>
 190   </taxonomy>
 191
 192   <devices>
 193     <!-- ******************************  Cortex-M0  ****************************** -->
 194     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 195       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 196       <description>
 197 The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 198 - simple, easy-to-use programmers model
 199 - highly efficient ultra-low power operation
 200 - excellent code density
 201 - deterministic, high-performance interrupt handling
 202 - upward compatibility with the rest of the Cortex-M processor family.
 203       </description>
 204       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 205       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 206       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 207       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 208
 209       <device Dname="ARMCM0">
 210         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 211         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 212       </device>
 213     </family>
 214
 215     <!-- ******************************  Cortex-M0P  ****************************** -->
 216     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 217       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 218       <description>
 219 The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 220 - simple, easy-to-use programmers model
 221 - highly efficient ultra-low power operation
 222 - excellent code density
 223 - deterministic, high-performance interrupt handling
 224 - upward compatibility with the rest of the Cortex-M processor family.
 225       </description>
 226       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 227       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 228       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 229       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 230
 231       <device Dname="ARMCM0P">
 232         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 233         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 234       </device>
 235     </family>
 236
 237     <!-- ******************************  Cortex-M3  ****************************** -->
 238     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 239       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 240       <description>
 241 The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 242 - simple, easy-to-use programmers model
 243 - highly efficient ultra-low power operation
 244 - excellent code density
 245 - deterministic, high-performance interrupt handling
 246 - upward compatibility with the rest of the Cortex-M processor family.
 247       </description>
 248       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 249       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 250       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 251       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 252
 253       <device Dname="ARMCM3">
 254         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 255         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 256       </device>
 257     </family>
 258
 259     <!-- ******************************  Cortex-M4  ****************************** -->
 260     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 261       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 262       <description>
 263 The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 264 - simple, easy-to-use programmers model
 265 - highly efficient ultra-low power operation
 266 - excellent code density
 267 - deterministic, high-performance interrupt handling
 268 - upward compatibility with the rest of the Cortex-M processor family.
 269       </description>
 270       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 271       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 272       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 273       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 274
 275       <device Dname="ARMCM4">
 276         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 277         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 278       </device>
 279
 280       <device Dname="ARMCM4_FP">
 281         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 282         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 283       </device>
 284     </family>
 285
 286     <!-- ******************************  Cortex-M7  ****************************** -->
 287     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 288       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 289       <description>
 290 The Cortex-M7 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 291 - simple, easy-to-use programmers model
 292 - highly efficient ultra-low power operation
 293 - excellent code density
 294 - deterministic, high-performance interrupt handling
 295 - upward compatibility with the rest of the Cortex-M processor family.
 296       </description>
 297       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 298       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 299       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 300       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 301
 302       <device Dname="ARMCM7">
 303         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 304         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 305       </device>
 306
 307       <device Dname="ARMCM7_SP">
 308         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 309         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 310       </device>
 311
 312       <device Dname="ARMCM7_DP">
 313         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 314         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 315       </device>
 316     </family>
 317
 318     <!-- ******************************  Cortex-M23  ********************** -->
 319     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 320       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 321       <description>
 322 The ARM Cortex-M23 is based on the ARMv8-M baseline architecture.
 323 It is the smallest and most energy efficient ARM processor with ARM TrustZone technology.
 324 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 325       </description>
 326       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 327       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 328       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 329       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 330       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 331       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 332
 333       <device Dname="ARMCM23">
 334         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 335         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 336       </device>
 337
 338       <device Dname="ARMCM23_TZ">
 339         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 340         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 341       </device>
 342     </family>
 343
 344     <!-- ******************************  Cortex-M33  ****************************** -->
 345     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 346       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 347       <description>
 348 The ARM Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 349 class processor based on the ARMv8-M mainline architecture with ARM TrustZone security.
 350       </description>
 351       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 352       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 353       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 354       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 355       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 356       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 357
 358       <device Dname="ARMCM33">
 359         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 360         <description>
 361           no DSP Instructions, no Floating Point Unit, no TrustZone
 362         </description>
 363         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 364       </device>
 365
 366       <device Dname="ARMCM33_TZ">
 367         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 368         <description>
 369           no DSP Instructions, no Floating Point Unit, TrustZone
 370         </description>
 371         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 372       </device>
 373
 374       <device Dname="ARMCM33_DSP_FP">
 375         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 376         <description>
 377           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 378         </description>
 379         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 380       </device>
 381
 382       <device Dname="ARMCM33_DSP_FP_TZ">
 383         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 384         <description>
 385           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 386         </description>
 387         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 388       </device>
 389     </family>
 390
 391     <!-- ******************************  ARMSC000  ****************************** -->
 392     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 393       <description>
 394 The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 395 - simple, easy-to-use programmers model
 396 - highly efficient ultra-low power operation
 397 - excellent code density
 398 - deterministic, high-performance interrupt handling
 399       </description>
 400       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 401       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 402       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 403       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 404
 405       <device Dname="ARMSC000">
 406         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  ARMSC300  ****************************** -->
 412     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 413       <description>
 414 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 415 - simple, easy-to-use programmers model
 416 - highly efficient ultra-low power operation
 417 - excellent code density
 418 - deterministic, high-performance interrupt handling
 419       </description>
 420       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 421       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 422       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 423       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 424
 425       <device Dname="ARMSC300">
 426         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 427         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 428       </device>
 429     </family>
 430
 431     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 432     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 433       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 434       <description>
 435 ARMv8-M Baseline based device with TrustZone
 436       </description>
 437       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 438       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 439       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 440       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 441       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 442       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 443
 444       <device Dname="ARMv8MBL">
 445         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 446         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 447       </device>
 448     </family>
 449
 450     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 451     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 452       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 453       <description>
 454 ARMv8-M Mainline based device with TrustZone
 455       </description>
 456       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 457       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 458       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 459       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 460       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 461       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 462
 463       <device Dname="ARMv8MML">
 464         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 465         <description>
 466           no DSP Instructions, no Floating Point Unit, TrustZone
 467         </description>
 468         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 469       </device>
 470
 471       <device Dname="ARMv8MML_DSP">
 472         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 473         <description>
 474           DSP Instructions, no Floating Point Unit, TrustZone
 475         </description>
 476         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 477       </device>
 478
 479       <device Dname="ARMv8MML_SP">
 480         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 481         <description>
 482           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 483         </description>
 484         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 485       </device>
 486
 487       <device Dname="ARMv8MML_DSP_SP">
 488         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 489         <description>
 490           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 491         </description>
 492         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 493       </device>
 494
 495       <device Dname="ARMv8MML_DP">
 496         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 497         <description>
 498           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 499         </description>
 500         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 501       </device>
 502
 503       <device Dname="ARMv8MML_DSP_DP">
 504         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 505         <description>
 506           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 507         </description>
 508         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 509       </device>
 510     </family>
 511
 512     <!-- ******************************  Cortex-A5  ****************************** -->
 513     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 514       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 515       <description>
 516 The ARM Cortex-A5 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full
 517 virtual memory capabilities. The Cortex-A5 processor implements the ARMv7-A architecture profile and can execute 32-bit
 518 ARM instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 519       </description>
 520
 521       <device Dname="ARMCA5">
 522         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 523         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 524       </device>
 525     </family>
 526
 527     <!-- ******************************  Cortex-A7  ****************************** -->
 528     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 529       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 530       <description>
 531 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the ARMv7-A architecture.
 532 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 533 an optional integrated GIC, and an optional L2 cache controller.
 534       </description>
 535
 536       <device Dname="ARMCA7">
 537         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 538         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 539       </device>
 540     </family>
 541
 542     <!-- ******************************  Cortex-A9  ****************************** -->
 543     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 544       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 545       <description>
 546 The Cortex-A9 processor is a high-performance, low-power, ARM macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 547 The Cortex-A9 processor implements the ARMv7-A architecture and runs 32-bit ARM instructions, 16-bit and 32-bit Thumb instructions,
 548 and 8-bit Java bytecodes in Jazelle state.
 549       </description>
 550
 551       <device Dname="ARMCA9">
 552         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 553         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 554       </device>
 555     </family>
 556   </devices>
 557
 558
 559   <apis>
 560     <!-- CMSIS Device API -->
 561     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.0" exclusive="1">
 562       <description>CMSIS OS Tick API</description>
 563       <files>
 564         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 565       </files>
 566     </api>
 567     <!-- CMSIS-RTOS API -->
 568     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 569       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 570       <files>
 571         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 572       </files>
 573     </api>
 574     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.1" exclusive="1">
 575       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 576       <files>
 577         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 578         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 579       </files>
 580     </api>
 581     <!-- CMSIS Driver API -->
 582     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 583       <description>USART Driver API for Cortex-M</description>
 584       <files>
 585         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 586         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 587       </files>
 588     </api>
 589     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 590       <description>SPI Driver API for Cortex-M</description>
 591       <files>
 592         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 593         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 594       </files>
 595     </api>
 596     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 597       <description>SAI Driver API for Cortex-M</description>
 598       <files>
 599         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 600         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 601       </files>
 602     </api>
 603     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 604       <description>I2C Driver API for Cortex-M</description>
 605       <files>
 606         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 607         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 608       </files>
 609     </api>
 610     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.1.0" exclusive="0">
 611       <description>CAN Driver API for Cortex-M</description>
 612       <files>
 613         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 614         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 615       </files>
 616     </api>
 617     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 618       <description>Flash Driver API for Cortex-M</description>
 619       <files>
 620         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 621         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 622       </files>
 623     </api>
 624     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 625       <description>MCI Driver API for Cortex-M</description>
 626       <files>
 627         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 628         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 629       </files>
 630     </api>
 631     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.2.0" exclusive="0">
 632       <description>NAND Flash Driver API for Cortex-M</description>
 633       <files>
 634         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 635         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 636       </files>
 637     </api>
 638     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 639       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 640       <files>
 641         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 642         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 643         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 644       </files>
 645     </api>
 646     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 647       <description>Ethernet MAC Driver API for Cortex-M</description>
 648       <files>
 649         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 650         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 651       </files>
 652     </api>
 653     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 654       <description>Ethernet PHY Driver API for Cortex-M</description>
 655       <files>
 656         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 657         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 658       </files>
 659     </api>
 660     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 661       <description>USB Device Driver API for Cortex-M</description>
 662       <files>
 663         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 664         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 665       </files>
 666     </api>
 667     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 668       <description>USB Host Driver API for Cortex-M</description>
 669       <files>
 670         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 671         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 672       </files>
 673     </api>
 674   </apis>
 675
 676   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 677   <conditions>
 678     <!-- compiler -->
 679     <condition id="ARMCC6">
 680       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 681       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 682     </condition>
 683     <condition id="ARMCC5">
 684       <require Tcompiler="ARMCC" Toptions="AC5"/>
 685     </condition>
 686     <condition id="ARMCC">
 687       <require Tcompiler="ARMCC"/>
 688     </condition>
 689     <condition id="GCC">
 690       <require Tcompiler="GCC"/>
 691     </condition>
 692     <condition id="IAR">
 693       <require Tcompiler="IAR"/>
 694     </condition>
 695     <condition id="ARMCC GCC">
 696       <accept Tcompiler="ARMCC"/>
 697       <accept Tcompiler="GCC"/>
 698     </condition>
 699     <condition id="ARMCC GCC IAR">
 700       <accept Tcompiler="ARMCC"/>
 701       <accept Tcompiler="GCC"/>
 702       <accept Tcompiler="IAR"/>
 703     </condition>
 704
 705     <!-- ARM architecture -->
 706     <condition id="ARMv6-M Device">
 707       <description>ARMv6-M architecture based device</description>
 708       <accept Dcore="Cortex-M0"/>
 709       <accept Dcore="Cortex-M0+"/>
 710       <accept Dcore="SC000"/>
 711     </condition>
 712     <condition id="ARMv7-M Device">
 713       <description>ARMv7-M architecture based device</description>
 714       <accept Dcore="Cortex-M3"/>
 715       <accept Dcore="Cortex-M4"/>
 716       <accept Dcore="Cortex-M7"/>
 717       <accept Dcore="SC300"/>
 718     </condition>
 719     <condition id="ARMv8-M Device">
 720       <description>ARMv8-M architecture based device</description>
 721       <accept Dcore="ARMV8MBL"/>
 722       <accept Dcore="ARMV8MML"/>
 723       <accept Dcore="Cortex-M23"/>
 724       <accept Dcore="Cortex-M33"/>
 725     </condition>
 726     <condition id="ARMv8-M TZ Device">
 727       <description>ARMv8-M architecture based device with TrustZone</description>
 728       <require condition="ARMv8-M Device"/>
 729       <require Dtz="TZ"/>
 730     </condition>
 731     <condition id="ARMv6_7-M Device">
 732       <description>ARMv6_7-M architecture based device</description>
 733       <accept condition="ARMv6-M Device"/>
 734       <accept condition="ARMv7-M Device"/>
 735     </condition>
 736     <condition id="ARMv6_7_8-M Device">
 737       <description>ARMv6_7_8-M architecture based device</description>
 738       <accept condition="ARMv6-M Device"/>
 739       <accept condition="ARMv7-M Device"/>
 740       <accept condition="ARMv8-M Device"/>
 741     </condition>
 742     <condition id="ARMv7-A Device">
 743       <description>ARMv7-A architecture based device</description>
 744       <accept Dcore="Cortex-A5"/>
 745       <accept Dcore="Cortex-A7"/>
 746       <accept Dcore="Cortex-A9"/>
 747     </condition>
 748
 749     <!-- ARM core -->
 750     <condition id="CM0">
 751       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 752       <accept Dcore="Cortex-M0"/>
 753       <accept Dcore="Cortex-M0+"/>
 754       <accept Dcore="SC000"/>
 755     </condition>
 756     <condition id="CM3">
 757       <description>Cortex-M3 or SC300 processor based device</description>
 758       <accept Dcore="Cortex-M3"/>
 759       <accept Dcore="SC300"/>
 760     </condition>
 761     <condition id="CM4">
 762       <description>Cortex-M4 processor based device</description>
 763       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 764     </condition>
 765     <condition id="CM4_FP">
 766       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 767       <require Dcore="Cortex-M4" Dfpu="FPU"/>
 768     </condition>
 769     <condition id="CM7">
 770       <description>Cortex-M7 processor based device</description>
 771       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 772     </condition>
 773     <condition id="CM7_FP">
 774       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 775       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 776       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 777     </condition>
 778     <condition id="CM7_SP">
 779       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 780       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 781     </condition>
 782     <condition id="CM7_DP">
 783       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 784       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 785     </condition>
 786     <condition id="CM23">
 787       <description>Cortex-M23 processor based device</description>
 788       <require Dcore="Cortex-M23"/>
 789     </condition>
 790     <condition id="CM33">
 791       <description>Cortex-M33 processor based device</description>
 792       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 793     </condition>
 794     <condition id="CM33_FP">
 795       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 796       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 797     </condition>
 798     <condition id="ARMv8MBL">
 799       <description>ARMv8-M Baseline processor based device</description>
 800       <require Dcore="ARMV8MBL"/>
 801     </condition>
 802     <condition id="ARMv8MML">
 803       <description>ARMv8-M Mainline processor based device</description>
 804       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 805     </condition>
 806     <condition id="ARMv8MML_FP">
 807       <description>ARMv8-M Mainline processor based device using Floating Point Unit</description>
 808       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 809       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 810     </condition>
 811
 812     <condition id="CM33_NODSP_NOFPU">
 813       <description>CM33, no DSP, no FPU</description>
 814       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 815     </condition>
 816     <condition id="CM33_DSP_NOFPU">
 817       <description>CM33, DSP, no FPU</description>
 818       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 819     </condition>
 820     <condition id="CM33_NODSP_SP">
 821       <description>CM33, no DSP, SP FPU</description>
 822       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 823     </condition>
 824     <condition id="CM33_DSP_SP">
 825       <description>CM33, DSP, SP FPU</description>
 826       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 827     </condition>
 828
 829     <condition id="ARMv8MML_NODSP_NOFPU">
 830       <description>ARMv8MML, no DSP, no FPU</description>
 831       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 832     </condition>
 833     <condition id="ARMv8MML_DSP_NOFPU">
 834       <description>ARMv8MML, DSP, no FPU</description>
 835       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 836     </condition>
 837     <condition id="ARMv8MML_NODSP_SP">
 838       <description>ARMv8MML, no DSP, SP FPU</description>
 839       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 840     </condition>
 841     <condition id="ARMv8MML_DSP_SP">
 842       <description>ARMv8MML, DSP, SP FPU</description>
 843       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 844     </condition>
 845
 846     <!-- ARMCC compiler -->
 847     <condition id="CA_ARMCC5">
 848       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 5</description>
 849       <require condition="ARMv7-A Device"/>
 850       <require condition="ARMCC5"/>
 851     </condition>
 852     <condition id="CA_ARMCC6">
 853       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the ARM Compiler 6</description>
 854       <require condition="ARMv7-A Device"/>
 855       <require condition="ARMCC6"/>
 856     </condition>
 857
 858     <condition id="CM0_ARMCC">
 859       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the ARM Compiler</description>
 860       <require condition="CM0"/>
 861       <require Tcompiler="ARMCC"/>
 862     </condition>
 863     <condition id="CM0_LE_ARMCC">
 864       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
 865       <require condition="CM0_ARMCC"/>
 866       <require Dendian="Little-endian"/>
 867     </condition>
 868     <condition id="CM0_BE_ARMCC">
 869       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
 870       <require condition="CM0_ARMCC"/>
 871       <require Dendian="Big-endian"/>
 872     </condition>
 873
 874     <condition id="CM3_ARMCC">
 875       <description>Cortex-M3 or SC300 processor based device for the ARM Compiler</description>
 876       <require condition="CM3"/>
 877       <require Tcompiler="ARMCC"/>
 878     </condition>
 879     <condition id="CM3_LE_ARMCC">
 880       <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
 881       <require condition="CM3_ARMCC"/>
 882       <require Dendian="Little-endian"/>
 883     </condition>
 884     <condition id="CM3_BE_ARMCC">
 885       <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
 886       <require condition="CM3_ARMCC"/>
 887       <require Dendian="Big-endian"/>
 888     </condition>
 889
 890     <condition id="CM4_ARMCC">
 891       <description>Cortex-M4 processor based device for the ARM Compiler</description>
 892       <require condition="CM4"/>
 893       <require Tcompiler="ARMCC"/>
 894     </condition>
 895     <condition id="CM4_LE_ARMCC">
 896       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
 897       <require condition="CM4_ARMCC"/>
 898       <require Dendian="Little-endian"/>
 899     </condition>
 900     <condition id="CM4_BE_ARMCC">
 901       <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
 902       <require condition="CM4_ARMCC"/>
 903       <require Dendian="Big-endian"/>
 904     </condition>
 905
 906     <condition id="CM4_FP_ARMCC">
 907       <description>Cortex-M4 processor based device using Floating Point Unit for the ARM Compiler</description>
 908       <require condition="CM4_FP"/>
 909       <require Tcompiler="ARMCC"/>
 910     </condition>
 911     <condition id="CM4_FP_LE_ARMCC">
 912       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 913       <require condition="CM4_FP_ARMCC"/>
 914       <require Dendian="Little-endian"/>
 915     </condition>
 916     <condition id="CM4_FP_BE_ARMCC">
 917       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 918       <require condition="CM4_FP_ARMCC"/>
 919       <require Dendian="Big-endian"/>
 920     </condition>
 921
 922     <!-- XMC 4000 Series devices from Infineon require a special library -->
 923     <condition id="CM4_LE_ARMCC_STD">
 924       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
 925       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
 926       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 927       <require Tcompiler="ARMCC"/>
 928     </condition>
 929     <condition id="CM4_LE_ARMCC_IFX">
 930       <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
 931       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 932       <require Tcompiler="ARMCC"/>
 933     </condition>
 934     <condition id="CM4_FP_LE_ARMCC_STD">
 935       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
 936       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
 937       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
 938       <require Tcompiler="ARMCC"/>
 939     </condition>
 940     <condition id="CM4_FP_LE_ARMCC_IFX">
 941       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
 942       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
 943       <require Tcompiler="ARMCC"/>
 944     </condition>
 945
 946     <condition id="CM7_ARMCC">
 947       <description>Cortex-M7 processor based device for the ARM Compiler</description>
 948       <require condition="CM7"/>
 949       <require Tcompiler="ARMCC"/>
 950     </condition>
 951     <condition id="CM7_LE_ARMCC">
 952       <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
 953       <require condition="CM7_ARMCC"/>
 954       <require Dendian="Little-endian"/>
 955     </condition>
 956     <condition id="CM7_BE_ARMCC">
 957       <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
 958       <require condition="CM7_ARMCC"/>
 959       <require Dendian="Big-endian"/>
 960     </condition>
 961
 962     <condition id="CM7_FP_ARMCC">
 963       <description>Cortex-M7 processor based device using Floating Point Unit for the ARM Compiler</description>
 964       <require condition="CM7_FP"/>
 965       <require Tcompiler="ARMCC"/>
 966     </condition>
 967     <condition id="CM7_FP_LE_ARMCC">
 968       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
 969       <require condition="CM7_FP_ARMCC"/>
 970       <require Dendian="Little-endian"/>
 971     </condition>
 972     <condition id="CM7_FP_BE_ARMCC">
 973       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
 974       <require condition="CM7_FP_ARMCC"/>
 975       <require Dendian="Big-endian"/>
 976     </condition>
 977
 978     <condition id="CM7_SP_ARMCC">
 979       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the ARM Compiler</description>
 980       <require condition="CM7_SP"/>
 981       <require Tcompiler="ARMCC"/>
 982     </condition>
 983     <condition id="CM7_SP_LE_ARMCC">
 984       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the ARM Compiler</description>
 985       <require condition="CM7_SP_ARMCC"/>
 986       <require Dendian="Little-endian"/>
 987     </condition>
 988     <condition id="CM7_SP_BE_ARMCC">
 989       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the ARM Compiler</description>
 990       <require condition="CM7_SP_ARMCC"/>
 991       <require Dendian="Big-endian"/>
 992     </condition>
 993
 994     <condition id="CM7_DP_ARMCC">
 995       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the ARM Compiler</description>
 996       <require condition="CM7_DP"/>
 997       <require Tcompiler="ARMCC"/>
 998     </condition>
 999     <condition id="CM7_DP_LE_ARMCC">
1000       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the ARM Compiler</description>
1001       <require condition="CM7_DP_ARMCC"/>
1002       <require Dendian="Little-endian"/>
1003     </condition>
1004     <condition id="CM7_DP_BE_ARMCC">
1005       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the ARM Compiler</description>
1006       <require condition="CM7_DP_ARMCC"/>
1007       <require Dendian="Big-endian"/>
1008     </condition>
1009
1010     <condition id="CM23_ARMCC">
1011       <description>Cortex-M23 processor based device for the ARM Compiler</description>
1012       <require condition="CM23"/>
1013       <require Tcompiler="ARMCC"/>
1014     </condition>
1015     <condition id="CM23_LE_ARMCC">
1016       <description>Cortex-M23 processor based device in little endian mode for the ARM Compiler</description>
1017       <require condition="CM23_ARMCC"/>
1018       <require Dendian="Little-endian"/>
1019     </condition>
1020     <condition id="CM23_BE_ARMCC">
1021       <description>Cortex-M23 processor based device in big endian mode for the ARM Compiler</description>
1022       <require condition="CM23_ARMCC"/>
1023       <require Dendian="Big-endian"/>
1024     </condition>
1025
1026     <condition id="CM33_ARMCC">
1027       <description>Cortex-M33 processor based device for the ARM Compiler</description>
1028       <require condition="CM33"/>
1029       <require Tcompiler="ARMCC"/>
1030     </condition>
1031     <condition id="CM33_LE_ARMCC">
1032       <description>Cortex-M33 processor based device in little endian mode for the ARM Compiler</description>
1033       <require condition="CM33_ARMCC"/>
1034       <require Dendian="Little-endian"/>
1035     </condition>
1036     <condition id="CM33_BE_ARMCC">
1037       <description>Cortex-M33 processor based device in big endian mode for the ARM Compiler</description>
1038       <require condition="CM33_ARMCC"/>
1039       <require Dendian="Big-endian"/>
1040     </condition>
1041
1042     <condition id="CM33_FP_ARMCC">
1043       <description>Cortex-M33 processor based device using Floating Point Unit for the ARM Compiler</description>
1044       <require condition="CM33_FP"/>
1045       <require Tcompiler="ARMCC"/>
1046     </condition>
1047     <condition id="CM33_FP_LE_ARMCC">
1048       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1049       <require condition="CM33_FP_ARMCC"/>
1050       <require Dendian="Little-endian"/>
1051     </condition>
1052     <condition id="CM33_FP_BE_ARMCC">
1053       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1054       <require condition="CM33_FP_ARMCC"/>
1055       <require Dendian="Big-endian"/>
1056     </condition>
1057
1058     <condition id="CM33_NODSP_NOFPU_ARMCC">
1059       <description>CM33, no DSP, no FPU, ARM Compiler</description>
1060       <require condition="CM33_NODSP_NOFPU"/>
1061       <require Tcompiler="ARMCC"/>
1062     </condition>
1063     <condition id="CM33_DSP_NOFPU_ARMCC">
1064       <description>CM33, DSP, no FPU, ARM Compiler</description>
1065       <require condition="CM33_DSP_NOFPU"/>
1066       <require Tcompiler="ARMCC"/>
1067     </condition>
1068     <condition id="CM33_NODSP_SP_ARMCC">
1069       <description>CM33, no DSP, SP FPU, ARM Compiler</description>
1070       <require condition="CM33_NODSP_SP"/>
1071       <require Tcompiler="ARMCC"/>
1072     </condition>
1073     <condition id="CM33_DSP_SP_ARMCC">
1074       <description>CM33, DSP, SP FPU, ARM Compiler</description>
1075       <require condition="CM33_DSP_SP"/>
1076       <require Tcompiler="ARMCC"/>
1077     </condition>
1078     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1079       <description>CM33, little endian, no DSP, no FPU, ARM Compiler</description>
1080       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1081       <require Dendian="Little-endian"/>
1082     </condition>
1083     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1084       <description>CM33, little endian, DSP, no FPU, ARM Compiler</description>
1085       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1086       <require Dendian="Little-endian"/>
1087     </condition>
1088     <condition id="CM33_NODSP_SP_LE_ARMCC">
1089       <description>CM33, little endian, no DSP, SP FPU, ARM Compiler</description>
1090       <require condition="CM33_NODSP_SP_ARMCC"/>
1091       <require Dendian="Little-endian"/>
1092     </condition>
1093     <condition id="CM33_DSP_SP_LE_ARMCC">
1094       <description>CM33, little endian, DSP, SP FPU, ARM Compiler</description>
1095       <require condition="CM33_DSP_SP_ARMCC"/>
1096       <require Dendian="Little-endian"/>
1097     </condition>
1098
1099     <condition id="ARMv8MBL_ARMCC">
1100       <description>ARMv8-M Baseline processor based device for the ARM Compiler</description>
1101       <require condition="ARMv8MBL"/>
1102       <require Tcompiler="ARMCC"/>
1103     </condition>
1104     <condition id="ARMv8MBL_LE_ARMCC">
1105       <description>ARMv8-M Baseline processor based device in little endian mode for the ARM Compiler</description>
1106       <require condition="ARMv8MBL_ARMCC"/>
1107       <require Dendian="Little-endian"/>
1108     </condition>
1109     <condition id="ARMv8MBL_BE_ARMCC">
1110       <description>ARMv8-M Baseline processor based device in big endian mode for the ARM Compiler</description>
1111       <require condition="ARMv8MBL_ARMCC"/>
1112       <require Dendian="Big-endian"/>
1113     </condition>
1114
1115     <condition id="ARMv8MML_ARMCC">
1116       <description>ARMv8-M Mainline processor based device for the ARM Compiler</description>
1117       <require condition="ARMv8MML"/>
1118       <require Tcompiler="ARMCC"/>
1119     </condition>
1120     <condition id="ARMv8MML_LE_ARMCC">
1121       <description>ARMv8-M Mainline processor based device in little endian mode for the ARM Compiler</description>
1122       <require condition="ARMv8MML_ARMCC"/>
1123       <require Dendian="Little-endian"/>
1124     </condition>
1125     <condition id="ARMv8MML_BE_ARMCC">
1126       <description>ARMv8-M Mainline processor based device in big endian mode for the ARM Compiler</description>
1127       <require condition="ARMv8MML_ARMCC"/>
1128       <require Dendian="Big-endian"/>
1129     </condition>
1130
1131     <condition id="ARMv8MML_FP_ARMCC">
1132       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the ARM Compiler</description>
1133       <require condition="ARMv8MML_FP"/>
1134       <require Tcompiler="ARMCC"/>
1135     </condition>
1136     <condition id="ARMv8MML_FP_LE_ARMCC">
1137       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
1138       <require condition="ARMv8MML_FP_ARMCC"/>
1139       <require Dendian="Little-endian"/>
1140     </condition>
1141     <condition id="ARMv8MML_FP_BE_ARMCC">
1142       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
1143       <require condition="ARMv8MML_FP_ARMCC"/>
1144       <require Dendian="Big-endian"/>
1145     </condition>
1146
1147     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1148       <description>ARMv8MML, no DSP, no FPU, ARM Compiler</description>
1149       <require condition="ARMv8MML_NODSP_NOFPU"/>
1150       <require Tcompiler="ARMCC"/>
1151     </condition>
1152     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1153       <description>ARMv8MML, DSP, no FPU, ARM Compiler</description>
1154       <require condition="ARMv8MML_DSP_NOFPU"/>
1155       <require Tcompiler="ARMCC"/>
1156     </condition>
1157     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1158       <description>ARMv8MML, no DSP, SP FPU, ARM Compiler</description>
1159       <require condition="ARMv8MML_NODSP_SP"/>
1160       <require Tcompiler="ARMCC"/>
1161     </condition>
1162     <condition id="ARMv8MML_DSP_SP_ARMCC">
1163       <description>ARMv8MML, DSP, SP FPU, ARM Compiler</description>
1164       <require condition="ARMv8MML_DSP_SP"/>
1165       <require Tcompiler="ARMCC"/>
1166     </condition>
1167     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1168       <description>ARMv8MML, little endian, no DSP, no FPU, ARM Compiler</description>
1169       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1170       <require Dendian="Little-endian"/>
1171     </condition>
1172     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1173       <description>ARMv8MML, little endian, DSP, no FPU, ARM Compiler</description>
1174       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1175       <require Dendian="Little-endian"/>
1176     </condition>
1177     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1178       <description>ARMv8MML, little endian, no DSP, SP FPU, ARM Compiler</description>
1179       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1180       <require Dendian="Little-endian"/>
1181     </condition>
1182     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1183       <description>ARMv8MML, little endian, DSP, SP FPU, ARM Compiler</description>
1184       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1185       <require Dendian="Little-endian"/>
1186     </condition>
1187
1188     <!-- GCC compiler -->
1189     <condition id="CA_GCC">
1190       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1191       <require condition="ARMv7-A Device"/>
1192       <require Tcompiler="GCC"/>
1193     </condition>
1194
1195     <condition id="CM0_GCC">
1196       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1197       <require condition="CM0"/>
1198       <require Tcompiler="GCC"/>
1199     </condition>
1200     <condition id="CM0_LE_GCC">
1201       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1202       <require condition="CM0_GCC"/>
1203       <require Dendian="Little-endian"/>
1204     </condition>
1205     <condition id="CM0_BE_GCC">
1206       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1207       <require condition="CM0_GCC"/>
1208       <require Dendian="Big-endian"/>
1209     </condition>
1210
1211     <condition id="CM3_GCC">
1212       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1213       <require condition="CM3"/>
1214       <require Tcompiler="GCC"/>
1215     </condition>
1216     <condition id="CM3_LE_GCC">
1217       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1218       <require condition="CM3_GCC"/>
1219       <require Dendian="Little-endian"/>
1220     </condition>
1221     <condition id="CM3_BE_GCC">
1222       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1223       <require condition="CM3_GCC"/>
1224       <require Dendian="Big-endian"/>
1225     </condition>
1226
1227     <condition id="CM4_GCC">
1228       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1229       <require condition="CM4"/>
1230       <require Tcompiler="GCC"/>
1231     </condition>
1232     <condition id="CM4_LE_GCC">
1233       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1234       <require condition="CM4_GCC"/>
1235       <require Dendian="Little-endian"/>
1236     </condition>
1237     <condition id="CM4_BE_GCC">
1238       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1239       <require condition="CM4_GCC"/>
1240       <require Dendian="Big-endian"/>
1241     </condition>
1242
1243     <condition id="CM4_FP_GCC">
1244       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1245       <require condition="CM4_FP"/>
1246       <require Tcompiler="GCC"/>
1247     </condition>
1248     <condition id="CM4_FP_LE_GCC">
1249       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1250       <require condition="CM4_FP_GCC"/>
1251       <require Dendian="Little-endian"/>
1252     </condition>
1253     <condition id="CM4_FP_BE_GCC">
1254       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1255       <require condition="CM4_FP_GCC"/>
1256       <require Dendian="Big-endian"/>
1257     </condition>
1258
1259     <!-- XMC 4000 Series devices from Infineon require a special library -->
1260     <condition id="CM4_LE_GCC_STD">
1261       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
1262       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
1263       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1264       <require Tcompiler="GCC"/>
1265     </condition>
1266     <condition id="CM4_LE_GCC_IFX">
1267       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
1268       <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1269       <require Tcompiler="GCC"/>
1270     </condition>
1271     <condition id="CM4_FP_LE_GCC_STD">
1272       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
1273       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
1274       <deny Dvendor="Infineon:7" Dname="XMC4*"/>
1275       <require Tcompiler="GCC"/>
1276     </condition>
1277     <condition id="CM4_FP_LE_GCC_IFX">
1278       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
1279       <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
1280       <require Tcompiler="GCC"/>
1281     </condition>
1282
1283     <condition id="CM7_GCC">
1284       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1285       <require condition="CM7"/>
1286       <require Tcompiler="GCC"/>
1287     </condition>
1288     <condition id="CM7_LE_GCC">
1289       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1290       <require condition="CM7_GCC"/>
1291       <require Dendian="Little-endian"/>
1292     </condition>
1293     <condition id="CM7_BE_GCC">
1294       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1295       <require condition="CM7_GCC"/>
1296       <require Dendian="Big-endian"/>
1297     </condition>
1298
1299     <condition id="CM7_FP_GCC">
1300       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1301       <require condition="CM7_FP"/>
1302       <require Tcompiler="GCC"/>
1303     </condition>
1304     <condition id="CM7_FP_LE_GCC">
1305       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1306       <require condition="CM7_FP_GCC"/>
1307       <require Dendian="Little-endian"/>
1308     </condition>
1309     <condition id="CM7_FP_BE_GCC">
1310       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1311       <require condition="CM7_FP_GCC"/>
1312       <require Dendian="Big-endian"/>
1313     </condition>
1314
1315     <condition id="CM7_SP_GCC">
1316       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1317       <require condition="CM7_SP"/>
1318       <require Tcompiler="GCC"/>
1319     </condition>
1320     <condition id="CM7_SP_LE_GCC">
1321       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1322       <require condition="CM7_SP_GCC"/>
1323       <require Dendian="Little-endian"/>
1324     </condition>
1325     <condition id="CM7_SP_BE_GCC">
1326       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1327       <require condition="CM7_SP_GCC"/>
1328       <require Dendian="Big-endian"/>
1329     </condition>
1330
1331     <condition id="CM7_DP_GCC">
1332       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1333       <require condition="CM7_DP"/>
1334       <require Tcompiler="GCC"/>
1335     </condition>
1336     <condition id="CM7_DP_LE_GCC">
1337       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1338       <require condition="CM7_DP_GCC"/>
1339       <require Dendian="Little-endian"/>
1340     </condition>
1341     <condition id="CM7_DP_BE_GCC">
1342       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1343       <require condition="CM7_DP_GCC"/>
1344       <require Dendian="Big-endian"/>
1345     </condition>
1346
1347     <condition id="CM23_GCC">
1348       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1349       <require condition="CM23"/>
1350       <require Tcompiler="GCC"/>
1351     </condition>
1352     <condition id="CM23_LE_GCC">
1353       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1354       <require condition="CM23_GCC"/>
1355       <require Dendian="Little-endian"/>
1356     </condition>
1357     <condition id="CM23_BE_GCC">
1358       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1359       <require condition="CM23_GCC"/>
1360       <require Dendian="Big-endian"/>
1361     </condition>
1362
1363     <condition id="CM33_GCC">
1364       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1365       <require condition="CM33"/>
1366       <require Tcompiler="GCC"/>
1367     </condition>
1368     <condition id="CM33_LE_GCC">
1369       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1370       <require condition="CM33_GCC"/>
1371       <require Dendian="Little-endian"/>
1372     </condition>
1373     <condition id="CM33_BE_GCC">
1374       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1375       <require condition="CM33_GCC"/>
1376       <require Dendian="Big-endian"/>
1377     </condition>
1378
1379     <condition id="CM33_FP_GCC">
1380       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1381       <require condition="CM33_FP"/>
1382       <require Tcompiler="GCC"/>
1383     </condition>
1384     <condition id="CM33_FP_LE_GCC">
1385       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1386       <require condition="CM33_FP_GCC"/>
1387       <require Dendian="Little-endian"/>
1388     </condition>
1389     <condition id="CM33_FP_BE_GCC">
1390       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1391       <require condition="CM33_FP_GCC"/>
1392       <require Dendian="Big-endian"/>
1393     </condition>
1394
1395     <condition id="CM33_NODSP_NOFPU_GCC">
1396       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1397       <require condition="CM33_NODSP_NOFPU"/>
1398       <require Tcompiler="GCC"/>
1399     </condition>
1400     <condition id="CM33_DSP_NOFPU_GCC">
1401       <description>CM33, DSP, no FPU, GCC Compiler</description>
1402       <require condition="CM33_DSP_NOFPU"/>
1403       <require Tcompiler="GCC"/>
1404     </condition>
1405     <condition id="CM33_NODSP_SP_GCC">
1406       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1407       <require condition="CM33_NODSP_SP"/>
1408       <require Tcompiler="GCC"/>
1409     </condition>
1410     <condition id="CM33_DSP_SP_GCC">
1411       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1412       <require condition="CM33_DSP_SP"/>
1413       <require Tcompiler="GCC"/>
1414     </condition>
1415     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1416       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1417       <require condition="CM33_NODSP_NOFPU_GCC"/>
1418       <require Dendian="Little-endian"/>
1419     </condition>
1420     <condition id="CM33_DSP_NOFPU_LE_GCC">
1421       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1422       <require condition="CM33_DSP_NOFPU_GCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425     <condition id="CM33_NODSP_SP_LE_GCC">
1426       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1427       <require condition="CM33_NODSP_SP_GCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430     <condition id="CM33_DSP_SP_LE_GCC">
1431       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1432       <require condition="CM33_DSP_SP_GCC"/>
1433       <require Dendian="Little-endian"/>
1434     </condition>
1435
1436     <condition id="ARMv8MBL_GCC">
1437       <description>ARMv8-M Baseline processor based device for the GCC Compiler</description>
1438       <require condition="ARMv8MBL"/>
1439       <require Tcompiler="GCC"/>
1440     </condition>
1441     <condition id="ARMv8MBL_LE_GCC">
1442       <description>ARMv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1443       <require condition="ARMv8MBL_GCC"/>
1444       <require Dendian="Little-endian"/>
1445     </condition>
1446     <condition id="ARMv8MBL_BE_GCC">
1447       <description>ARMv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1448       <require condition="ARMv8MBL_GCC"/>
1449       <require Dendian="Big-endian"/>
1450     </condition>
1451
1452     <condition id="ARMv8MML_GCC">
1453       <description>ARMv8-M Mainline processor based device for the GCC Compiler</description>
1454       <require condition="ARMv8MML"/>
1455       <require Tcompiler="GCC"/>
1456     </condition>
1457     <condition id="ARMv8MML_LE_GCC">
1458       <description>ARMv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1459       <require condition="ARMv8MML_GCC"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462     <condition id="ARMv8MML_BE_GCC">
1463       <description>ARMv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1464       <require condition="ARMv8MML_GCC"/>
1465       <require Dendian="Big-endian"/>
1466     </condition>
1467
1468     <condition id="ARMv8MML_FP_GCC">
1469       <description>ARMv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1470       <require condition="ARMv8MML_FP"/>
1471       <require Tcompiler="GCC"/>
1472     </condition>
1473     <condition id="ARMv8MML_FP_LE_GCC">
1474       <description>ARMv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1475       <require condition="ARMv8MML_FP_GCC"/>
1476       <require Dendian="Little-endian"/>
1477     </condition>
1478     <condition id="ARMv8MML_FP_BE_GCC">
1479       <description>ARMv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1480       <require condition="ARMv8MML_FP_GCC"/>
1481       <require Dendian="Big-endian"/>
1482     </condition>
1483
1484     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1485       <description>ARMv8MML, no DSP, no FPU, GCC Compiler</description>
1486       <require condition="ARMv8MML_NODSP_NOFPU"/>
1487       <require Tcompiler="GCC"/>
1488     </condition>
1489     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1490       <description>ARMv8MML, DSP, no FPU, GCC Compiler</description>
1491       <require condition="ARMv8MML_DSP_NOFPU"/>
1492       <require Tcompiler="GCC"/>
1493     </condition>
1494     <condition id="ARMv8MML_NODSP_SP_GCC">
1495       <description>ARMv8MML, no DSP, SP FPU, GCC Compiler</description>
1496       <require condition="ARMv8MML_NODSP_SP"/>
1497       <require Tcompiler="GCC"/>
1498     </condition>
1499     <condition id="ARMv8MML_DSP_SP_GCC">
1500       <description>ARMv8MML, DSP, SP FPU, GCC Compiler</description>
1501       <require condition="ARMv8MML_DSP_SP"/>
1502       <require Tcompiler="GCC"/>
1503     </condition>
1504     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1505       <description>ARMv8MML, little endian, no DSP, no FPU, GCC Compiler</description>
1506       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1507       <require Dendian="Little-endian"/>
1508     </condition>
1509     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1510       <description>ARMv8MML, little endian, DSP, no FPU, GCC Compiler</description>
1511       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1515       <description>ARMv8MML, little endian, no DSP, SP FPU, GCC Compiler</description>
1516       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1520       <description>ARMv8MML, little endian, DSP, SP FPU, GCC Compiler</description>
1521       <require condition="ARMv8MML_DSP_SP_GCC"/>
1522       <require Dendian="Little-endian"/>
1523     </condition>
1524
1525     <!-- IAR compiler -->
1526     <condition id="CA_IAR">
1527       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1528       <require condition="ARMv7-A Device"/>
1529       <require Tcompiler="IAR"/>
1530     </condition>
1531
1532     <condition id="CM0_IAR">
1533       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1534       <require condition="CM0"/>
1535       <require Tcompiler="IAR"/>
1536     </condition>
1537     <condition id="CM0_LE_IAR">
1538       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1539       <require condition="CM0_IAR"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="CM0_BE_IAR">
1543       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1544       <require condition="CM0_IAR"/>
1545       <require Dendian="Big-endian"/>
1546     </condition>
1547
1548     <condition id="CM3_IAR">
1549       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1550       <require condition="CM3"/>
1551       <require Tcompiler="IAR"/>
1552     </condition>
1553     <condition id="CM3_LE_IAR">
1554       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1555       <require condition="CM3_IAR"/>
1556       <require Dendian="Little-endian"/>
1557     </condition>
1558     <condition id="CM3_BE_IAR">
1559       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1560       <require condition="CM3_IAR"/>
1561       <require Dendian="Big-endian"/>
1562     </condition>
1563
1564     <condition id="CM4_IAR">
1565       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1566       <require condition="CM4"/>
1567       <require Tcompiler="IAR"/>
1568     </condition>
1569     <condition id="CM4_LE_IAR">
1570       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1571       <require condition="CM4_IAR"/>
1572       <require Dendian="Little-endian"/>
1573     </condition>
1574     <condition id="CM4_BE_IAR">
1575       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1576       <require condition="CM4_IAR"/>
1577       <require Dendian="Big-endian"/>
1578     </condition>
1579
1580     <condition id="CM4_FP_IAR">
1581       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1582       <require condition="CM4_FP"/>
1583       <require Tcompiler="IAR"/>
1584     </condition>
1585     <condition id="CM4_FP_LE_IAR">
1586       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1587       <require condition="CM4_FP_IAR"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590     <condition id="CM4_FP_BE_IAR">
1591       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1592       <require condition="CM4_FP_IAR"/>
1593       <require Dendian="Big-endian"/>
1594     </condition>
1595
1596     <condition id="CM7_IAR">
1597       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1598       <require condition="CM7"/>
1599       <require Tcompiler="IAR"/>
1600     </condition>
1601     <condition id="CM7_LE_IAR">
1602       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1603       <require condition="CM7_IAR"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="CM7_BE_IAR">
1607       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1608       <require condition="CM7_IAR"/>
1609       <require Dendian="Big-endian"/>
1610     </condition>
1611
1612     <condition id="CM7_FP_IAR">
1613       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1614       <require condition="CM7_FP"/>
1615       <require Tcompiler="IAR"/>
1616     </condition>
1617     <condition id="CM7_FP_LE_IAR">
1618       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1619       <require condition="CM7_FP_IAR"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="CM7_FP_BE_IAR">
1623       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1624       <require condition="CM7_FP_IAR"/>
1625       <require Dendian="Big-endian"/>
1626     </condition>
1627
1628     <condition id="CM7_SP_IAR">
1629       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1630       <require condition="CM7_SP"/>
1631       <require Tcompiler="IAR"/>
1632     </condition>
1633     <condition id="CM7_SP_LE_IAR">
1634       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1635       <require condition="CM7_SP_IAR"/>
1636       <require Dendian="Little-endian"/>
1637     </condition>
1638     <condition id="CM7_SP_BE_IAR">
1639       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1640       <require condition="CM7_SP_IAR"/>
1641       <require Dendian="Big-endian"/>
1642     </condition>
1643
1644     <condition id="CM7_DP_IAR">
1645       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1646       <require condition="CM7_DP"/>
1647       <require Tcompiler="IAR"/>
1648     </condition>
1649     <condition id="CM7_DP_LE_IAR">
1650       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1651       <require condition="CM7_DP_IAR"/>
1652       <require Dendian="Little-endian"/>
1653     </condition>
1654     <condition id="CM7_DP_BE_IAR">
1655       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1656       <require condition="CM7_DP_IAR"/>
1657       <require Dendian="Big-endian"/>
1658     </condition>
1659
1660     <!-- conditions selecting single devices and CMSIS Core -->
1661     <!-- used for component startup, GCC version is used for C-Startup -->
1662     <condition id="ARMCM0 CMSIS">
1663       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
1664       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1665       <require Cclass="CMSIS" Cgroup="CORE"/>
1666     </condition>
1667     <condition id="ARMCM0 CMSIS GCC">
1668       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1669       <require condition="ARMCM0 CMSIS"/>
1670       <require condition="GCC"/>
1671     </condition>
1672
1673     <condition id="ARMCM0+ CMSIS">
1674       <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
1675       <require Dvendor="ARM:82" Dname="ARMCM0P"/>
1676       <require Cclass="CMSIS" Cgroup="CORE"/>
1677     </condition>
1678     <condition id="ARMCM0+ CMSIS GCC">
1679       <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1680       <require condition="ARMCM0+ CMSIS"/>
1681       <require condition="GCC"/>
1682     </condition>
1683
1684     <condition id="ARMCM3 CMSIS">
1685       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
1686       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1687       <require Cclass="CMSIS" Cgroup="CORE"/>
1688     </condition>
1689     <condition id="ARMCM3 CMSIS GCC">
1690       <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1691       <require condition="ARMCM3 CMSIS"/>
1692       <require condition="GCC"/>
1693     </condition>
1694
1695     <condition id="ARMCM4 CMSIS">
1696       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
1697       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1698       <require Cclass="CMSIS" Cgroup="CORE"/>
1699     </condition>
1700     <condition id="ARMCM4 CMSIS GCC">
1701       <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1702       <require condition="ARMCM4 CMSIS"/>
1703       <require condition="GCC"/>
1704     </condition>
1705
1706     <condition id="ARMCM7 CMSIS">
1707       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
1708       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1709       <require Cclass="CMSIS" Cgroup="CORE"/>
1710     </condition>
1711     <condition id="ARMCM7 CMSIS GCC">
1712       <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1713       <require condition="ARMCM7 CMSIS"/>
1714       <require condition="GCC"/>
1715     </condition>
1716
1717     <condition id="ARMCM23 CMSIS">
1718       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core</description>
1719       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1720       <require Cclass="CMSIS" Cgroup="CORE"/>
1721     </condition>
1722     <condition id="ARMCM23 CMSIS GCC">
1723       <description>Generic ARM Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1724       <require condition="ARMCM23 CMSIS"/>
1725       <require condition="GCC"/>
1726     </condition>
1727
1728     <condition id="ARMCM33 CMSIS">
1729       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core</description>
1730       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1731       <require Cclass="CMSIS" Cgroup="CORE"/>
1732     </condition>
1733     <condition id="ARMCM33 CMSIS GCC">
1734       <description>Generic ARM Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1735       <require condition="ARMCM33 CMSIS"/>
1736       <require condition="GCC"/>
1737     </condition>
1738
1739     <condition id="ARMSC000 CMSIS">
1740       <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
1741       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1742       <require Cclass="CMSIS" Cgroup="CORE"/>
1743     </condition>
1744     <condition id="ARMSC000 CMSIS GCC">
1745       <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
1746       <require condition="ARMSC000 CMSIS"/>
1747       <require condition="GCC"/>
1748     </condition>
1749
1750     <condition id="ARMSC300 CMSIS">
1751       <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
1752       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1753       <require Cclass="CMSIS" Cgroup="CORE"/>
1754     </condition>
1755     <condition id="ARMSC300 CMSIS GCC">
1756       <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
1757       <require condition="ARMSC300 CMSIS"/>
1758       <require condition="GCC"/>
1759     </condition>
1760
1761     <condition id="ARMv8MBL CMSIS">
1762       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
1763       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1764       <require Cclass="CMSIS" Cgroup="CORE"/>
1765     </condition>
1766     <condition id="ARMv8MBL CMSIS GCC">
1767       <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
1768       <require condition="ARMv8MBL CMSIS"/>
1769       <require condition="GCC"/>
1770     </condition>
1771
1772     <condition id="ARMv8MML CMSIS">
1773       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
1774       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1775       <require Cclass="CMSIS" Cgroup="CORE"/>
1776     </condition>
1777     <condition id="ARMv8MML CMSIS GCC">
1778       <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
1779       <require condition="ARMv8MML CMSIS"/>
1780       <require condition="GCC"/>
1781     </condition>
1782
1783     <condition id="ARMCA5 CMSIS">
1784       <description>Generic ARM Cortex-A5 device startup and depends on CMSIS Core</description>
1785       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1786       <require Cclass="CMSIS" Cgroup="CORE"/>
1787     </condition>
1788
1789     <condition id="ARMCA7 CMSIS">
1790       <description>Generic ARM Cortex-A7 device startup and depends on CMSIS Core</description>
1791       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1792       <require Cclass="CMSIS" Cgroup="CORE"/>
1793     </condition>
1794
1795     <condition id="ARMCA9 CMSIS">
1796       <description>Generic ARM Cortex-A9 device startup and depends on CMSIS Core</description>
1797       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1798       <require Cclass="CMSIS" Cgroup="CORE"/>
1799     </condition>
1800
1801     <!-- CMSIS DSP -->
1802     <condition id="CMSIS DSP">
1803       <description>Components required for DSP</description>
1804       <require condition="ARMv6_7_8-M Device"/>
1805       <require condition="ARMCC GCC"/>
1806       <require Cclass="CMSIS" Cgroup="CORE"/>
1807     </condition>
1808
1809     <!-- RTOS RTX -->
1810     <condition id="RTOS RTX">
1811       <description>Components required for RTOS RTX</description>
1812       <require condition="ARMv6_7-M Device"/>
1813       <require condition="ARMCC GCC IAR"/>
1814       <require Cclass="Device" Cgroup="Startup"/>
1815       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1816     </condition>
1817     <condition id="RTOS RTX5">
1818       <description>Components required for RTOS RTX5</description>
1819       <require condition="ARMv6_7_8-M Device"/>
1820       <require condition="ARMCC GCC IAR"/>
1821       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
1822     </condition>
1823     <condition id="RTOS2 RTX5">
1824       <description>Components required for RTOS2 RTX5</description>
1825       <require condition="ARMv6_7_8-M Device"/>
1826       <require condition="ARMCC GCC IAR"/>
1827       <require Cclass="CMSIS"  Cgroup="CORE"/>
1828       <require Cclass="Device" Cgroup="Startup"/>
1829     </condition>
1830     <condition id="RTOS2 RTX5 v7-A">
1831       <description>Components required for RTOS2 RTX5 v7-A</description>
1832       <require condition="ARMv7-A Device"/>
1833       <require condition="ARMCC GCC IAR"/>
1834       <require Cclass="CMSIS"  Cgroup="CORE"/>
1835       <require Cclass="Device" Cgroup="Startup"/>
1836       <require Cclass="Device" Cgroup="OS Tick"/>
1837     </condition>
1838     <condition id="RTOS2 RTX5 Lib">
1839       <description>Components required for RTOS2 RTX5 Library</description>
1840       <require condition="ARMv6_7_8-M Device"/>
1841       <require condition="ARMCC GCC IAR"/>
1842       <require Cclass="CMSIS"  Cgroup="CORE"/>
1843       <require Cclass="Device" Cgroup="Startup"/>
1844     </condition>
1845     <condition id="RTOS2 RTX5 NS">
1846       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
1847       <require condition="ARMv8-M TZ Device"/>
1848       <require condition="ARMCC GCC"/>
1849       <require Cclass="CMSIS"  Cgroup="CORE"/>
1850       <require Cclass="Device" Cgroup="Startup"/>
1851     </condition>
1852
1853   </conditions>
1854
1855   <components>
1856     <!-- CMSIS-Core component -->
1857     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.1"  condition="ARMv6_7_8-M Device" >
1858       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1859       <files>
1860         <!-- CPU independent -->
1861         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
1862         <file category="include" name="CMSIS/Include/"/>
1863         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
1864         <!-- Code template -->
1865         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
1866         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
1867       </files>
1868     </component>
1869
1870     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.0.0"  condition="ARMv7-A Device" >
1871       <description>CMSIS-CORE for Cortex-A</description>
1872       <files>
1873         <!-- CPU independent -->
1874         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
1875         <file category="include" name="CMSIS/Core_A/Include/"/>
1876       </files>
1877     </component>
1878
1879     <!-- CMSIS-Startup components -->
1880     <!-- Cortex-M0 -->
1881     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
1882       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1883       <files>
1884         <!-- include folder / device header file -->
1885         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1886         <!-- startup / system file -->
1887         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1888         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1889         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1890         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1891         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1892       </files>
1893     </component>
1894     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1895       <description>System and Startup for Generic ARM Cortex-M0 device</description>
1896       <files>
1897         <!-- include folder / device header file -->
1898         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1899         <!-- startup / system file -->
1900         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1901         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1902         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
1903       </files>
1904     </component>
1905
1906     <!-- Cortex-M0+ -->
1907     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1908       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1909       <files>
1910         <!-- include folder / device header file -->
1911         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1912         <!-- startup / system file -->
1913         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1914         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1915         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1916         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1917         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1918       </files>
1919     </component>
1920     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1921       <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1922       <files>
1923         <!-- include folder / device header file -->
1924         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1925         <!-- startup / system file -->
1926         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1927         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
1928         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
1929       </files>
1930     </component>
1931
1932     <!-- Cortex-M3 -->
1933     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
1934       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1935       <files>
1936         <!-- include folder / device header file -->
1937         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1938         <!-- startup / system file -->
1939         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1940         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1941         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1942         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1943         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1944       </files>
1945     </component>
1946     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1947       <description>System and Startup for Generic ARM Cortex-M3 device</description>
1948       <files>
1949         <!-- include folder / device header file -->
1950         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1951         <!-- startup / system file -->
1952         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1953         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1954         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
1955       </files>
1956     </component>
1957
1958     <!-- Cortex-M4 -->
1959     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
1960       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1961       <files>
1962         <!-- include folder / device header file -->
1963         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1964         <!-- startup / system file -->
1965         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1966         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1967         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1968         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1969         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1970       </files>
1971     </component>
1972     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1973       <description>System and Startup for Generic ARM Cortex-M4 device</description>
1974       <files>
1975         <!-- include folder / device header file -->
1976         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1977         <!-- startup / system file -->
1978         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1979         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1980         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
1981       </files>
1982     </component>
1983
1984     <!-- Cortex-M7 -->
1985     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
1986       <description>System and Startup for Generic ARM Cortex-M7 device</description>
1987       <files>
1988         <!-- include folder / device header file -->
1989         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
1990         <!-- startup / system file -->
1991         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1992         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1993         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
1994         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1995         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
1996       </files>
1997     </component>
1998     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1999       <description>System and Startup for Generic ARM Cortex-M7 device</description>
2000       <files>
2001         <!-- include folder / device header file -->
2002         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2003         <!-- startup / system file -->
2004         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2005         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2006         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2007       </files>
2008     </component>
2009
2010     <!-- Cortex-M23 -->
2011     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2012       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2013       <files>
2014         <!-- include folder / device header file -->
2015         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2016         <!-- startup / system file -->
2017         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2018         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2019         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2020         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2021         <!-- SAU configuration -->
2022         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2023       </files>
2024     </component>
2025     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2026       <description>System and Startup for Generic ARM Cortex-M23 device</description>
2027       <files>
2028         <!-- include folder / device header file -->
2029         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2030         <!-- startup / system file -->
2031         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2032         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2033         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2034         <!-- SAU configuration -->
2035         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2036       </files>
2037     </component>
2038
2039     <!-- Cortex-M33 -->
2040     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2041       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2042       <files>
2043         <!-- include folder / device header file -->
2044         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2045         <!-- startup / system file -->
2046         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2047         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2048         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2049         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2050         <!-- SAU configuration -->
2051         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2052       </files>
2053     </component>
2054     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2055       <description>System and Startup for Generic ARM Cortex-M33 device</description>
2056       <files>
2057         <!-- include folder / device header file -->
2058         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2059         <!-- startup / system file -->
2060         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2061         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2062         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2063         <!-- SAU configuration -->
2064         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2065       </files>
2066     </component>
2067
2068     <!-- Cortex-SC000 -->
2069     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2070       <description>System and Startup for Generic ARM SC000 device</description>
2071       <files>
2072         <!-- include folder / device header file -->
2073         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2074         <!-- startup / system file -->
2075         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2076         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2077         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2078         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2079         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2080       </files>
2081     </component>
2082     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2083       <description>System and Startup for Generic ARM SC000 device</description>
2084       <files>
2085         <!-- include folder / device header file -->
2086         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2087         <!-- startup / system file -->
2088         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2089         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2090         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2091       </files>
2092     </component>
2093
2094     <!-- Cortex-SC300 -->
2095     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2096       <description>System and Startup for Generic ARM SC300 device</description>
2097       <files>
2098         <!-- include folder / device header file -->
2099         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2100         <!-- startup / system file -->
2101         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2102         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2103         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2104         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2105         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2106       </files>
2107     </component>
2108     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2109       <description>System and Startup for Generic ARM SC300 device</description>
2110       <files>
2111         <!-- include folder / device header file -->
2112         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2113         <!-- startup / system file -->
2114         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2115         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2116         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2117       </files>
2118     </component>
2119
2120     <!-- ARMv8MBL -->
2121     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2122       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2123       <files>
2124         <!-- include folder / device header file -->
2125         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2126         <!-- startup / system file -->
2127         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2128         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2129         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2130         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2131         <!-- SAU configuration -->
2132         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2133       </files>
2134     </component>
2135     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2136       <description>System and Startup for Generic ARM ARMv8MBL device</description>
2137       <files>
2138         <!-- include folder / device header file -->
2139         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2140         <!-- startup / system file -->
2141         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2142         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2143         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2144         <!-- SAU configuration -->
2145         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2146       </files>
2147     </component>
2148
2149     <!-- ARMv8MML -->
2150     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2151       <description>System and Startup for Generic ARM ARMv8MML device</description>
2152       <files>
2153         <!-- include folder / device header file -->
2154         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2155         <!-- startup / system file -->
2156         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2157         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2159         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2160         <!-- SAU configuration -->
2161         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2162       </files>
2163     </component>
2164     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2165       <description>System and Startup for Generic ARM ARMv8MML device</description>
2166       <files>
2167         <!-- include folder / device header file -->
2168         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2169         <!-- startup / system file -->
2170         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2172         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2173         <!-- SAU configuration -->
2174         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2175       </files>
2176     </component>
2177
2178     <!-- Cortex-A5 -->
2179     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2180       <description>System and Startup for Generic ARM Cortex-A5 device</description>
2181       <files>
2182         <!-- include folder / device header file -->
2183         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2184         <!-- startup / system / mmu files -->
2185         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2186         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2187         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2188         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2189         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2190         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2191         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2192         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2193
2194       </files>
2195     </component>
2196
2197     <!-- Cortex-A7 -->
2198     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2199       <description>System and Startup for Generic ARM Cortex-A7 device</description>
2200       <files>
2201         <!-- include folder / device header file -->
2202         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2203         <!-- startup / system / mmu files -->
2204         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2205         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2206         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2207         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2208         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2209         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2210         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2211         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2212       </files>
2213     </component>
2214
2215     <!-- Cortex-A9 -->
2216     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA9 CMSIS">
2217       <description>System and Startup for Generic ARM Cortex-A9 device</description>
2218       <files>
2219         <!-- include folder / device header file -->
2220         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2221         <!-- startup / system / mmu files -->
2222         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2223         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2224         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2225         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2226         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2227         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2228         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2229         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2230       </files>
2231     </component>
2232
2233     <!-- CMSIS-DSP component -->
2234     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.1" condition="CMSIS DSP">
2235       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2236       <files>
2237         <!-- CPU independent -->
2238         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2239         <file category="header" name="CMSIS/Include/arm_math.h"/>
2240
2241         <!-- CPU and Compiler dependent -->
2242         <!-- ARMCC -->
2243         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2244         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2245         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2246         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2247         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2248         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2249         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2250         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2251         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2252         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2253         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2254         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2255         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2256         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2257
2258         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2259         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2260         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2261         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2262         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2263         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2264         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2265         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2266         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2267         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2268         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2269         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2270
2271         <!-- GCC -->
2272         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2273         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2274         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2275         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2276         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2277         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2278         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2279
2280         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2281         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2282         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2283         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2284         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2285         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2286         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2287         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2288         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2289         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2290         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2291         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2292
2293       </files>
2294     </component>
2295
2296     <!-- CMSIS-RTOS Keil RTX component -->
2297     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0.0" condition="RTOS RTX">
2298       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2299       <RTE_Components_h>
2300         <!-- the following content goes into file 'RTE_Components.h' -->
2301         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2302         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2303       </RTE_Components_h>
2304       <files>
2305         <!-- CPU independent -->
2306         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2307         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2308         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2309
2310         <!-- RTX templates -->
2311         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2312         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2313         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2314         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2315         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2316         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2317         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2318         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2319         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2320         <!-- tool-chain specific template file -->
2321         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2322         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2323         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2324
2325         <!-- CPU and Compiler dependent -->
2326         <!-- ARMCC -->
2327         <file category="library" condition="CM0_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2328         <file category="library" condition="CM0_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2329         <file category="library" condition="CM3_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2330         <file category="library" condition="CM3_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2331         <file category="library" condition="CM4_LE_ARMCC_STD"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2332         <file category="library" condition="CM4_LE_ARMCC_IFX"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2333         <file category="library" condition="CM4_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2334         <file category="library" condition="CM4_FP_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2335         <file category="library" condition="CM4_FP_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2336         <file category="library" condition="CM4_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2337         <file category="library" condition="CM7_LE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2338         <file category="library" condition="CM7_BE_ARMCC"        name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2339         <file category="library" condition="CM7_FP_LE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"      src="CMSIS/RTOS/RTX/SRC/ARM"/>
2340         <file category="library" condition="CM7_FP_BE_ARMCC"     name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2341         <!-- GCC -->
2342         <file category="library" condition="CM0_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2343         <file category="library" condition="CM0_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2344         <file category="library" condition="CM3_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2345         <file category="library" condition="CM3_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2346         <file category="library" condition="CM4_LE_GCC_STD"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2347         <file category="library" condition="CM4_LE_GCC_IFX"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2348         <file category="library" condition="CM4_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2349         <file category="library" condition="CM4_FP_LE_GCC_STD"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2350         <file category="library" condition="CM4_FP_LE_GCC_IFX"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2351         <file category="library" condition="CM4_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2352         <file category="library" condition="CM7_LE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2353         <file category="library" condition="CM7_BE_GCC"          name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2354         <file category="library" condition="CM7_FP_LE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"     src="CMSIS/RTOS/RTX/SRC/GCC"/>
2355         <file category="library" condition="CM7_FP_BE_GCC"       name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2356         <!-- IAR -->
2357         <file category="library" condition="CM0_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2358         <file category="library" condition="CM0_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2359         <file category="library" condition="CM3_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2360         <file category="library" condition="CM3_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2361         <file category="library" condition="CM4_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2362         <file category="library" condition="CM4_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2363         <file category="library" condition="CM4_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2364         <file category="library" condition="CM4_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2365         <file category="library" condition="CM7_LE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2366         <file category="library" condition="CM7_BE_IAR"          name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2367         <file category="library" condition="CM7_FP_LE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"        src="CMSIS/RTOS/RTX/SRC/IAR"/>
2368         <file category="library" condition="CM7_FP_BE_IAR"       name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2369       </files>
2370     </component>
2371
2372     <!-- CMSIS-RTOS Keil RTX5 component -->
2373     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.2.0" Capiversion="1.0.0" condition="RTOS RTX5">
2374       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2375       <RTE_Components_h>
2376         <!-- the following content goes into file 'RTE_Components.h' -->
2377         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2378         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2379       </RTE_Components_h>
2380       <files>
2381         <!-- RTX header file -->
2382         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2383         <!-- RTX compatibility module for API V1 -->
2384         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2385       </files>
2386     </component>
2387
2388     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2389     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 Lib">
2390       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Library)</description>
2391       <RTE_Components_h>
2392         <!-- the following content goes into file 'RTE_Components.h' -->
2393         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2394         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2395       </RTE_Components_h>
2396       <files>
2397         <!-- RTX documentation -->
2398         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2399
2400         <!-- RTX header files -->
2401         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2402
2403         <!-- RTX configuration -->
2404         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2405         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2406
2407         <!-- RTX templates -->
2408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2414         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2415         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2416         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="2.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2417         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2418
2419         <!-- RTX library configuration -->
2420         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2421
2422         <!-- RTX libraries (CPU and Compiler dependent) -->
2423         <!-- ARMCC -->
2424         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2425         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2426         <file category="library" condition="CM4_LE_ARMCC_STD"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2427         <file category="library" condition="CM4_FP_LE_ARMCC_STD"  name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2428         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2429         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2430         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2431         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2432         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2433         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2434         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2435         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2436         <!-- GCC -->
2437         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2438         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2439         <file category="library" condition="CM4_LE_GCC_STD"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2440         <file category="library" condition="CM4_FP_LE_GCC_STD"    name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2441         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2442         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2443         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2444         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2445         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2446         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2447         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2448         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2449         <!-- IAR -->
2450         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2451         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2452         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2453         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2454         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2455         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2456       </files>
2457     </component>
2458     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2459       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Library)</description>
2460       <RTE_Components_h>
2461         <!-- the following content goes into file 'RTE_Components.h' -->
2462         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2463         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2464         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2465       </RTE_Components_h>
2466       <files>
2467         <!-- RTX documentation -->
2468         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2469
2470         <!-- RTX header files -->
2471         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2472
2473         <!-- RTX configuration -->
2474         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2475         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2476
2477         <!-- RTX templates -->
2478         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2479         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2480         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2481         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2482         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2483         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2484         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2485         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2486         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2487
2488         <!-- RTX library configuration -->
2489         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2490
2491         <!-- RTX libraries (CPU and Compiler dependent) -->
2492         <!-- ARMCC -->
2493         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2494         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2495         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2496         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2497         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2498         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2499         <!-- GCC -->
2500         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2501         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2502         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2503         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2504         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2505         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2506       </files>
2507     </component>
2508     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5">
2509       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and ARMv8-M (Source)</description>
2510       <RTE_Components_h>
2511         <!-- the following content goes into file 'RTE_Components.h' -->
2512         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2513         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2514         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2515       </RTE_Components_h>
2516       <files>
2517         <!-- RTX documentation -->
2518         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2519
2520         <!-- RTX header files -->
2521         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2522
2523         <!-- RTX configuration -->
2524         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2525         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2526
2527         <!-- RTX templates -->
2528         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2529         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2530         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2531         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2532         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2533         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2534         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2535         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2536         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2537
2538         <!-- RTX sources (core) -->
2539         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2540         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2541         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2542         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2543         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2544         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2545         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2546         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2547         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2548         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2549         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2550         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2551         <!-- RTX sources (library configuration) -->
2552         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2553         <!-- RTX sources (handlers ARMCC) -->
2554         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2555         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2556         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2557         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2558         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2559         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2560         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2561         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2562         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2563         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2564         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2565         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2566         <!-- RTX sources (handlers GCC) -->
2567         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2568         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2569         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2570         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2571         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2572         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2573         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2574         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2575         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2576         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2577         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2578         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2579         <!-- RTX sources (handlers IAR) -->
2580         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2581         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2582         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2583         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2584         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2585         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2586         <!-- OS Tick (SysTick) -->
2587         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2588       </files>
2589     </component>
2590     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 v7-A">
2591       <description>CMSIS-RTOS2 RTX5 for ARMv7-A (Source)</description>
2592       <RTE_Components_h>
2593         <!-- the following content goes into file 'RTE_Components.h' -->
2594         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2595         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2596         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2597       </RTE_Components_h>
2598       <files>
2599         <!-- RTX documentation -->
2600         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2601
2602         <!-- RTX header files -->
2603         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2604
2605         <!-- RTX configuration -->
2606         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2607         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2608
2609         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2610
2611         <!-- RTX templates -->
2612         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2613         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2614         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2615         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2616         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2617         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2618         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2619         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2620         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2621
2622         <!-- RTX sources (core) -->
2623         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2624         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2625         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2626         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2627         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2628         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2629         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2630         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2631         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2632         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2633         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2634         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2635         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_gic.c"/>
2636         <!-- RTX sources (library configuration) -->
2637         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2638         <!-- RTX sources (handlers ARMCC) -->
2639         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2640         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2641         <!-- RTX sources (handlers GCC) -->
2642         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2643         <!-- RTX sources (handlers IAR) -->
2644         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2645       </files>
2646     </component>
2647     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.2.0" Capiversion="2.1.1" condition="RTOS2 RTX5 NS">
2648       <description>CMSIS-RTOS2 RTX5 for ARMv8-M Non-Secure Domain (Source)</description>
2649       <RTE_Components_h>
2650         <!-- the following content goes into file 'RTE_Components.h' -->
2651         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2652         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2653         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2654         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 ARMv8-M Non-secure domain */
2655       </RTE_Components_h>
2656       <files>
2657         <!-- RTX documentation -->
2658         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2659
2660         <!-- RTX header files -->
2661         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2662
2663         <!-- RTX configuration -->
2664         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.1.0"/>
2665         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2666
2667         <!-- RTX templates -->
2668         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2669         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2670         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2671         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2672         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2673         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2674         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2675         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.0" select="CMSIS-RTOS2 Timer"/>
2676         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2677
2678         <!-- RTX sources (core) -->
2679         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2680         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2681         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2682         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2683         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2684         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2685         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2686         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2687         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2688         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2689         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2690         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2691         <!-- RTX sources (library configuration) -->
2692         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2693         <!-- RTX sources (ARMCC handlers) -->
2694         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
2695         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
2696         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
2697         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
2698         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
2699         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
2700         <!-- RTX sources (GCC handlers) -->
2701         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
2702         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
2703         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
2704         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
2705         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
2706         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
2707         <!-- OS Tick (SysTick) -->
2708         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2709       </files>
2710     </component>
2711
2712   </components>
2713
2714   <boards>
2715     <board name="uVision Simulator" vendor="Keil">
2716       <description>uVision Simulator</description>
2717       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
2718       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
2719       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
2720       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
2721       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
2722       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
2723       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
2724       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
2725       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
2726       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
2727       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
2728       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
2729       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
2730       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
2731       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
2732       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
2733       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
2734       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
2735    </board>
2736   </boards>
2737
2738   <examples>
2739     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
2740       <description>DSP_Lib Class Marks example</description>
2741       <board name="uVision Simulator" vendor="Keil"/>
2742       <project>
2743         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
2744       </project>
2745       <attributes>
2746         <component Cclass="CMSIS" Cgroup="CORE"/>
2747         <component Cclass="CMSIS" Cgroup="DSP"/>
2748         <component Cclass="Device" Cgroup="Startup"/>
2749         <category>Getting Started</category>
2750       </attributes>
2751     </example>
2752
2753     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
2754       <description>DSP_Lib Convolution example</description>
2755       <board name="uVision Simulator" vendor="Keil"/>
2756       <project>
2757         <environment name="uv" load="arm_convolution_example.uvprojx"/>
2758       </project>
2759       <attributes>
2760         <component Cclass="CMSIS" Cgroup="CORE"/>
2761         <component Cclass="CMSIS" Cgroup="DSP"/>
2762         <component Cclass="Device" Cgroup="Startup"/>
2763         <category>Getting Started</category>
2764       </attributes>
2765     </example>
2766
2767     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
2768       <description>DSP_Lib Dotproduct example</description>
2769       <board name="uVision Simulator" vendor="Keil"/>
2770       <project>
2771         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
2772       </project>
2773       <attributes>
2774         <component Cclass="CMSIS" Cgroup="CORE"/>
2775         <component Cclass="CMSIS" Cgroup="DSP"/>
2776         <component Cclass="Device" Cgroup="Startup"/>
2777         <category>Getting Started</category>
2778       </attributes>
2779     </example>
2780
2781     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
2782       <description>DSP_Lib FFT Bin example</description>
2783       <board name="uVision Simulator" vendor="Keil"/>
2784       <project>
2785         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
2786       </project>
2787       <attributes>
2788         <component Cclass="CMSIS" Cgroup="CORE"/>
2789         <component Cclass="CMSIS" Cgroup="DSP"/>
2790         <component Cclass="Device" Cgroup="Startup"/>
2791         <category>Getting Started</category>
2792       </attributes>
2793     </example>
2794
2795     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
2796       <description>DSP_Lib FIR example</description>
2797       <board name="uVision Simulator" vendor="Keil"/>
2798       <project>
2799         <environment name="uv" load="arm_fir_example.uvprojx"/>
2800       </project>
2801       <attributes>
2802         <component Cclass="CMSIS" Cgroup="CORE"/>
2803         <component Cclass="CMSIS" Cgroup="DSP"/>
2804         <component Cclass="Device" Cgroup="Startup"/>
2805         <category>Getting Started</category>
2806       </attributes>
2807     </example>
2808
2809     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
2810       <description>DSP_Lib Graphic Equalizer example</description>
2811       <board name="uVision Simulator" vendor="Keil"/>
2812       <project>
2813         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
2814       </project>
2815       <attributes>
2816         <component Cclass="CMSIS" Cgroup="CORE"/>
2817         <component Cclass="CMSIS" Cgroup="DSP"/>
2818         <component Cclass="Device" Cgroup="Startup"/>
2819         <category>Getting Started</category>
2820       </attributes>
2821     </example>
2822
2823     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
2824       <description>DSP_Lib Linear Interpolation example</description>
2825       <board name="uVision Simulator" vendor="Keil"/>
2826       <project>
2827         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
2828       </project>
2829       <attributes>
2830         <component Cclass="CMSIS" Cgroup="CORE"/>
2831         <component Cclass="CMSIS" Cgroup="DSP"/>
2832         <component Cclass="Device" Cgroup="Startup"/>
2833         <category>Getting Started</category>
2834       </attributes>
2835     </example>
2836
2837     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
2838       <description>DSP_Lib Matrix example</description>
2839       <board name="uVision Simulator" vendor="Keil"/>
2840       <project>
2841         <environment name="uv" load="arm_matrix_example.uvprojx"/>
2842       </project>
2843       <attributes>
2844         <component Cclass="CMSIS" Cgroup="CORE"/>
2845         <component Cclass="CMSIS" Cgroup="DSP"/>
2846         <component Cclass="Device" Cgroup="Startup"/>
2847         <category>Getting Started</category>
2848       </attributes>
2849     </example>
2850
2851     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
2852       <description>DSP_Lib Signal Convergence example</description>
2853       <board name="uVision Simulator" vendor="Keil"/>
2854       <project>
2855         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
2856       </project>
2857       <attributes>
2858         <component Cclass="CMSIS" Cgroup="CORE"/>
2859         <component Cclass="CMSIS" Cgroup="DSP"/>
2860         <component Cclass="Device" Cgroup="Startup"/>
2861         <category>Getting Started</category>
2862       </attributes>
2863     </example>
2864
2865     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
2866       <description>DSP_Lib Sinus/Cosinus example</description>
2867       <board name="uVision Simulator" vendor="Keil"/>
2868       <project>
2869         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
2870       </project>
2871       <attributes>
2872         <component Cclass="CMSIS" Cgroup="CORE"/>
2873         <component Cclass="CMSIS" Cgroup="DSP"/>
2874         <component Cclass="Device" Cgroup="Startup"/>
2875         <category>Getting Started</category>
2876       </attributes>
2877     </example>
2878
2879     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
2880       <description>DSP_Lib Variance example</description>
2881       <board name="uVision Simulator" vendor="Keil"/>
2882       <project>
2883         <environment name="uv" load="arm_variance_example.uvprojx"/>
2884       </project>
2885       <attributes>
2886         <component Cclass="CMSIS" Cgroup="CORE"/>
2887         <component Cclass="CMSIS" Cgroup="DSP"/>
2888         <component Cclass="Device" Cgroup="Startup"/>
2889         <category>Getting Started</category>
2890       </attributes>
2891     </example>
2892
2893     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
2894       <description>CMSIS-RTOS2 Blinky example</description>
2895       <board name="uVision Simulator" vendor="Keil"/>
2896       <project>
2897         <environment name="uv" load="Blinky.uvprojx"/>
2898       </project>
2899       <attributes>
2900         <component Cclass="CMSIS" Cgroup="CORE"/>
2901         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2902         <component Cclass="Device" Cgroup="Startup"/>
2903         <category>Getting Started</category>
2904       </attributes>
2905     </example>
2906
2907     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
2908       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
2909       <board name="uVision Simulator" vendor="Keil"/>
2910       <project>
2911         <environment name="uv" load="Blinky.uvprojx"/>
2912       </project>
2913       <attributes>
2914         <component Cclass="CMSIS" Cgroup="CORE"/>
2915         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2916         <component Cclass="Device" Cgroup="Startup"/>
2917         <category>Getting Started</category>
2918       </attributes>
2919     </example>
2920
2921     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
2922       <description>Bare-metal secure/non-secure example without RTOS</description>
2923       <board name="uVision Simulator" vendor="Keil"/>
2924       <project>
2925         <environment name="uv" load="NoRTOS.uvmpw"/>
2926       </project>
2927       <attributes>
2928         <component Cclass="CMSIS" Cgroup="CORE"/>
2929         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2930         <component Cclass="Device" Cgroup="Startup"/>
2931         <category>Getting Started</category>
2932       </attributes>
2933     </example>
2934
2935     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
2936       <description>Secure/non-secure RTOS example with thread context management</description>
2937       <board name="uVision Simulator" vendor="Keil"/>
2938       <project>
2939         <environment name="uv" load="RTOS.uvmpw"/>
2940       </project>
2941       <attributes>
2942         <component Cclass="CMSIS" Cgroup="CORE"/>
2943         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2944         <component Cclass="Device" Cgroup="Startup"/>
2945         <category>Getting Started</category>
2946       </attributes>
2947     </example>
2948
2949     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
2950       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
2951       <board name="uVision Simulator" vendor="Keil"/>
2952       <project>
2953         <environment name="uv" load="RTOS_Faults.uvmpw"/>
2954       </project>
2955       <attributes>
2956         <component Cclass="CMSIS" Cgroup="CORE"/>
2957         <component Cclass="CMSIS" Cgroup="RTOS2"/>
2958         <component Cclass="Device" Cgroup="Startup"/>
2959         <category>Getting Started</category>
2960       </attributes>
2961     </example>
2962
2963   </examples>
2964
2965 </package>