begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev1">
  12       Active development...
  13       CMSIS-Core(M): 5.4.0 (see revision history for details)
  14          - Enhanced MVE support for Armv8.1-MML
  15       CMSIS-RTOS2:
  16         - RTX 5.5.2 (see revision history for details)
  17       CMSIS-Pack:
  18         - added custom attribute to components that require custom implementation
  19       Devices:
  20         - ARMv81MML startup code recognizing __MVE_USED macro
  21         - Refactored vector table references for all Cortex-M devices
  22     </release>
  23     <release version="5.6.0" date="2019-07-10">
  24       CMSIS-Core(M): 5.3.0 (see revision history for details)
  25         - Added provisions for compiler-independent C startup code.
  26       CMSIS-Core(A): 1.1.4 (see revision history for details)
  27         - Fixed __FPU_Enable.
  28       CMSIS-DSP: 1.7.0 (see revision history for details)
  29         - New Neon versions of f32 functions
  30         - Python wrapper
  31         - Preliminary cmake build
  32         - Compilation flags for FFTs
  33         - Changes to arm_math.h
  34       CMSIS-NN: 1.2.0 (see revision history for details)
  35         - New function for depthwise convolution with asymmetric quantization.
  36         - New support functions for requantization.
  37       CMSIS-RTOS:
  38         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  39       CMSIS-RTOS2:
  40         - RTX 5.5.1 (see revision history for details)
  41       CMSIS-Driver: 2.7.1
  42         - WiFi Interface API 1.0.0
  43       Devices:
  44         - Generalized C startup code for all Cortex-M familiy devices.
  45         - Updated Cortex-A default memory regions and MMU configurations
  46         - Moved Cortex-A memory and system config files to avoid include path issues
  47     </release>
  48     <release version="5.5.1" date="2019-03-20">
  49       The following folders are deprecated
  50         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  51
  52       CMSIS-Core(M): 5.2.1 (see revision history for details)
  53         - Fixed compilation issue in cmsis_armclang_ltm.h
  54     </release>
  55     <release version="5.5.0" date="2019-03-18">
  56       The following folders have been removed:
  57         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  58         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  59       The following folders are deprecated
  60         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  61
  62       CMSIS-Core(M): 5.2.0 (see revision history for details)
  63         - Reworked Stack/Heap configuration for ARM startup files.
  64         - Added Cortex-M35P device support.
  65         - Added generic Armv8.1-M Mainline device support.
  66       CMSIS-Core(A): 1.1.3 (see revision history for details)
  67       CMSIS-DSP: 1.6.0 (see revision history for details)
  68         - reworked DSP library source files
  69         - reworked DSP library documentation
  70         - Changed DSP folder structure
  71         - moved DSP libraries to folder ./DSP/Lib
  72         - ARM DSP Libraries are built with ARMCLANG
  73         - Added DSP Libraries Source variant
  74       CMSIS-RTOS2:
  75         - RTX 5.5.0 (see revision history for details)
  76       CMSIS-Driver: 2.7.0
  77         - Added WiFi Interface API 1.0.0-beta
  78         - Added components for project specific driver implementations
  79       CMSIS-Pack: 1.6.0 (see revision history for details)
  80       Devices:
  81         - Added Cortex-M35P and ARMv81MML device templates.
  82         - Fixed C-Startup Code for GCC (aligned with other compilers)
  83       Utilities:
  84         - SVDConv 3.3.25
  85         - PackChk 1.3.82
  86     </release>
  87     <release version="5.4.0" date="2018-08-01">
  88       Aligned pack structure with repository.
  89       The following folders are deprecated:
  90         - CMSIS/Include/
  91         - CMSIS/DSP_Lib/
  92
  93       CMSIS-Core(M): 5.1.2 (see revision history for details)
  94         - Added Cortex-M1 support (beta).
  95       CMSIS-Core(A): 1.1.2 (see revision history for details)
  96       CMSIS-NN: 1.1.0
  97         - Added new math functions.
  98       CMSIS-RTOS2:
  99         - API 2.1.3 (see revision history for details)
 100         - RTX 5.4.0 (see revision history for details)
 101           * Updated exception handling on Cortex-A
 102       CMSIS-Driver:
 103         - Flash Driver API V2.2.0
 104       Utilities:
 105         - SVDConv 3.3.21
 106         - PackChk 1.3.71
 107     </release>
 108     <release version="5.3.0" date="2018-02-22">
 109       Updated Arm company brand.
 110       CMSIS-Core(M): 5.1.1 (see revision history for details)
 111       CMSIS-Core(A): 1.1.1 (see revision history for details)
 112       CMSIS-DAP: 2.0.0 (see revision history for details)
 113       CMSIS-NN: 1.0.0
 114         - Initial contribution of the bare metal Neural Network Library.
 115       CMSIS-RTOS2:
 116         - RTX 5.3.0 (see revision history for details)
 117         - OS Tick API 1.0.1
 118     </release>
 119     <release version="5.2.0" date="2017-11-16">
 120       CMSIS-Core(M): 5.1.0 (see revision history for details)
 121         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 122         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 123       CMSIS-Core(A): 1.1.0 (see revision history for details)
 124         - Added compiler_iccarm.h.
 125         - Added additional access functions for physical timer.
 126       CMSIS-DAP: 1.2.0 (see revision history for details)
 127       CMSIS-DSP: 1.5.2 (see revision history for details)
 128       CMSIS-Driver: 2.6.0 (see revision history for details)
 129         - CAN Driver API V1.2.0
 130         - NAND Driver API V2.3.0
 131       CMSIS-RTOS:
 132         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 133       CMSIS-RTOS2:
 134         - API 2.1.2 (see revision history for details)
 135         - RTX 5.2.3 (see revision history for details)
 136       Devices:
 137         - Added GCC startup and linker script for Cortex-A9.
 138         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 139         - Added IAR startup code for Cortex-A9
 140     </release>
 141     <release version="5.1.1" date="2017-09-19">
 142       CMSIS-RTOS2:
 143       - RTX 5.2.1 (see revision history for details)
 144     </release>
 145     <release version="5.1.0" date="2017-08-04">
 146       CMSIS-Core(M): 5.0.2 (see revision history for details)
 147       - Changed Version Control macros to be core agnostic.
 148       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 149       CMSIS-Core(A): 1.0.0 (see revision history for details)
 150       - Initial release
 151       - IRQ Controller API 1.0.0
 152       CMSIS-Driver: 2.05 (see revision history for details)
 153       - All typedefs related to status have been made volatile.
 154       CMSIS-RTOS2:
 155       - API 2.1.1 (see revision history for details)
 156       - RTX 5.2.0 (see revision history for details)
 157       - OS Tick API 1.0.0
 158       CMSIS-DSP: 1.5.2 (see revision history for details)
 159       - Fixed GNU Compiler specific diagnostics.
 160       CMSIS-Pack: 1.5.0 (see revision history for details)
 161       - added System Description File (*.SDF) Format
 162       CMSIS-Zone: 0.0.1 (Preview)
 163       - Initial specification draft
 164     </release>
 165     <release version="5.0.1" date="2017-02-03">
 166       Package Description:
 167       - added taxonomy for Cclass RTOS
 168       CMSIS-RTOS2:
 169       - API 2.1   (see revision history for details)
 170       - RTX 5.1.0 (see revision history for details)
 171       CMSIS-Core: 5.0.1 (see revision history for details)
 172       - Added __PACKED_STRUCT macro
 173       - Added uVisior support
 174       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 175       - Updated template for secure main function (main_s.c)
 176       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 177       CMSIS-DSP: 1.5.1 (see revision history for details)
 178       - added ARMv8M DSP libraries.
 179       CMSIS-Pack:1.4.9 (see revision history for details)
 180       - added Pack Index File specification and schema file
 181     </release>
 182     <release version="5.0.0" date="2016-11-11">
 183       Changed open source license to Apache 2.0
 184       CMSIS_Core:
 185        - Added support for Cortex-M23 and Cortex-M33.
 186        - Added ARMv8-M device configurations for mainline and baseline.
 187        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 188        - Added cmsis_compiler.h to unify compiler behaviour.
 189        - Updated function SCB_EnableICache (for Cortex-M7).
 190        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 191       CMSIS-RTOS:
 192         - bug fix in RTX 4.82 (see revision history for details)
 193       CMSIS-RTOS2:
 194         - new API including compatibility layer to CMSIS-RTOS
 195         - reference implementation based on RTX5
 196         - supports all Cortex-M variants including TrustZone for ARMv8-M
 197       CMSIS-SVD:
 198        - reworked SVD format documentation
 199        - removed SVD file database documentation as SVD files are distributed in packs
 200        - updated SVDConv for Win32 and Linux
 201       CMSIS-DSP:
 202        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 203        - Added DSP libraries build projects to CMSIS pack.
 204     </release>
 205     <release version="4.5.0" date="2015-10-28">
 206       - CMSIS-Core     4.30.0  (see revision history for details)
 207       - CMSIS-DAP      1.1.0   (unchanged)
 208       - CMSIS-Driver   2.04.0  (see revision history for details)
 209       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 210       - CMSIS-Pack     1.4.1   (see revision history for details)
 211       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 212       - CMSIS-SVD      1.3.1   (see revision history for details)
 213     </release>
 214     <release version="4.4.0" date="2015-09-11">
 215       - CMSIS-Core     4.20   (see revision history for details)
 216       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 217       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 218       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 219       - CMSIS-RTOS
 220         -- API         1.02   (unchanged)
 221         -- RTX         4.79   (see revision history for details)
 222       - CMSIS-SVD      1.3.0  (see revision history for details)
 223       - CMSIS-DAP      1.1.0  (extended with SWO support)
 224     </release>
 225     <release version="4.3.0" date="2015-03-20">
 226       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 227       - CMSIS-DSP      1.4.5  (see revision history for details)
 228       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 229       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 230       - CMSIS-RTOS
 231         -- API         1.02   (unchanged)
 232         -- RTX         4.78   (see revision history for details)
 233       - CMSIS-SVD      1.2    (unchanged)
 234     </release>
 235     <release version="4.2.0" date="2014-09-24">
 236       Adding Cortex-M7 support
 237       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 238       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 239       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 240       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 241       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 242     </release>
 243     <release version="4.1.1" date="2014-06-30">
 244       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 245     </release>
 246     <release version="4.1.0" date="2014-06-12">
 247       - CMSIS-Driver   2.02  (incompatible update)
 248       - CMSIS-Pack     1.3   (see revision history for details)
 249       - CMSIS-DSP      1.4.2 (unchanged)
 250       - CMSIS-Core     3.30  (unchanged)
 251       - CMSIS-RTOS RTX 4.74  (unchanged)
 252       - CMSIS-RTOS API 1.02  (unchanged)
 253       - CMSIS-SVD      1.10  (unchanged)
 254       PACK:
 255       - removed G++ specific files from PACK
 256       - added Component Startup variant "C Startup"
 257       - added Pack Checking Utility
 258       - updated conditions to reflect tool-chain dependency
 259       - added Taxonomy for Graphics
 260       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 261     </release>
 262     <!-- release version="4.0.0">
 263       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 264       - CMSIS-Pack     1.1   Preliminary
 265       - CMSIS-DSP      1.4.2 (see revision history for details)
 266       - CMSIS-Core     3.30  (see revision history for details)
 267       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 268       - CMSIS-RTOS API 1.02  (unchanged)
 269       - CMSIS-SVD      1.10  (unchanged)
 270     </release -->
 271     <release version="3.20.4" date="2014-02-20">
 272       - CMSIS-RTOS 4.74 (see revision history for details)
 273       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 274     </release>
 275     <!-- release version="3.20.3">
 276       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 277       - CMSIS-RTOS 4.73 (see revision history for details)
 278     </release -->
 279     <!-- release version="3.20.2">
 280       - CMSIS-Pack documentation has been added
 281       - CMSIS-Drivers header and documentation have been added to PACK
 282       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 283     </release -->
 284     <!-- release version="3.20.1">
 285       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 286       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 287     </release -->
 288     <!-- release version="3.20.0">
 289       The software portions that are deployed in the application program are now under a BSD license which allows usage
 290       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 291       The individual components have been update as listed below:
 292       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 293       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 294       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 295       - CMSIS-SVD is unchanged.
 296     </release -->
 297   </releases>
 298
 299   <taxonomy>
 300     <description Cclass="Audio">Software components for audio processing</description>
 301     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 302     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 303     <description Cclass="Compiler">Compiler Software Extensions</description>
 304     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 305     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 306     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 307     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 308     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 309     <description Cclass="File System">File Drive Support and File System</description>
 310     <description Cclass="IoT Client">IoT cloud client connector</description>
 311     <description Cclass="IoT Service">IoT specific services</description>
 312     <description Cclass="IoT Utility">IoT specific software utility</description>
 313     <description Cclass="Graphics">Graphical User Interface</description>
 314     <description Cclass="Network">Network Stack using Internet Protocols</description>
 315     <description Cclass="RTOS">Real-time Operating System</description>
 316     <description Cclass="Security">Encryption for secure communication or storage</description>
 317     <description Cclass="USB">Universal Serial Bus Stack</description>
 318     <description Cclass="Utility">Generic software utility components</description>
 319   </taxonomy>
 320
 321   <devices>
 322     <!-- ******************************  Cortex-M0  ****************************** -->
 323     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 324       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 325       <description>
 326 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 327 - simple, easy-to-use programmers model
 328 - highly efficient ultra-low power operation
 329 - excellent code density
 330 - deterministic, high-performance interrupt handling
 331 - upward compatibility with the rest of the Cortex-M processor family.
 332       </description>
 333       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 334       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 335       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 336       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 337
 338       <device Dname="ARMCM0">
 339         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 340         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 341       </device>
 342     </family>
 343
 344     <!-- ******************************  Cortex-M0P  ****************************** -->
 345     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 346       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 347       <description>
 348 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 349 - simple, easy-to-use programmers model
 350 - highly efficient ultra-low power operation
 351 - excellent code density
 352 - deterministic, high-performance interrupt handling
 353 - upward compatibility with the rest of the Cortex-M processor family.
 354       </description>
 355       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 356       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 357       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 358       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 359
 360       <device Dname="ARMCM0P">
 361         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 362         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 363       </device>
 364
 365       <device Dname="ARMCM0P_MPU">
 366         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 367         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 368       </device>
 369     </family>
 370
 371     <!-- ******************************  Cortex-M1  ****************************** -->
 372     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 373       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 374       <description>
 375 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 376 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 377       </description>
 378       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 379       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 380       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 381       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 382
 383       <device Dname="ARMCM1">
 384         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 385         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 386       </device>
 387     </family>
 388
 389     <!-- ******************************  Cortex-M3  ****************************** -->
 390     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 391       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 392       <description>
 393 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 394 - simple, easy-to-use programmers model
 395 - highly efficient ultra-low power operation
 396 - excellent code density
 397 - deterministic, high-performance interrupt handling
 398 - upward compatibility with the rest of the Cortex-M processor family.
 399       </description>
 400       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 401       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 402       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 403       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 404
 405       <device Dname="ARMCM3">
 406         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 407         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 408       </device>
 409     </family>
 410
 411     <!-- ******************************  Cortex-M4  ****************************** -->
 412     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 413       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 414       <description>
 415 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 416 - simple, easy-to-use programmers model
 417 - highly efficient ultra-low power operation
 418 - excellent code density
 419 - deterministic, high-performance interrupt handling
 420 - upward compatibility with the rest of the Cortex-M processor family.
 421       </description>
 422       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 423       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 424       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 425       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 426
 427       <device Dname="ARMCM4">
 428         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 429         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 430       </device>
 431
 432       <device Dname="ARMCM4_FP">
 433         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 434         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 435       </device>
 436     </family>
 437
 438     <!-- ******************************  Cortex-M7  ****************************** -->
 439     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 440       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 441       <description>
 442 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 443 - simple, easy-to-use programmers model
 444 - highly efficient ultra-low power operation
 445 - excellent code density
 446 - deterministic, high-performance interrupt handling
 447 - upward compatibility with the rest of the Cortex-M processor family.
 448       </description>
 449       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 450       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 451       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 452       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 453
 454       <device Dname="ARMCM7">
 455         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 456         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 457       </device>
 458
 459       <device Dname="ARMCM7_SP">
 460         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 461         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 462       </device>
 463
 464       <device Dname="ARMCM7_DP">
 465         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 466         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 467       </device>
 468     </family>
 469
 470     <!-- ******************************  Cortex-M23  ********************** -->
 471     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 472       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 473       <description>
 474 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 475 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 476 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 477       </description>
 478       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 479       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 480       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 481       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 482       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 483       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 484
 485       <device Dname="ARMCM23">
 486         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 487         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 488       </device>
 489
 490       <device Dname="ARMCM23_TZ">
 491         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 492         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 493       </device>
 494     </family>
 495
 496     <!-- ******************************  Cortex-M33  ****************************** -->
 497     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 498       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 499       <description>
 500 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 501 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 502       </description>
 503       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 504       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 505       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 506       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 507       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 508       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 509
 510       <device Dname="ARMCM33">
 511         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 512         <description>
 513           no DSP Instructions, no Floating Point Unit, no TrustZone
 514         </description>
 515         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 516       </device>
 517
 518       <device Dname="ARMCM33_TZ">
 519         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 520         <description>
 521           no DSP Instructions, no Floating Point Unit, TrustZone
 522         </description>
 523         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 524       </device>
 525
 526       <device Dname="ARMCM33_DSP_FP">
 527         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 528         <description>
 529           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 530         </description>
 531         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 532       </device>
 533
 534       <device Dname="ARMCM33_DSP_FP_TZ">
 535         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 536         <description>
 537           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 538         </description>
 539         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 540       </device>
 541     </family>
 542
 543     <!-- ******************************  Cortex-M35P  ****************************** -->
 544     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 545       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 546       <description>
 547 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 548 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 549       </description>
 550
 551       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 552       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 553       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 554       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 555       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 556       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 557
 558       <device Dname="ARMCM35P">
 559         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 560         <description>
 561           no DSP Instructions, no Floating Point Unit, no TrustZone
 562         </description>
 563         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 564       </device>
 565
 566       <device Dname="ARMCM35P_TZ">
 567         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 568         <description>
 569           no DSP Instructions, no Floating Point Unit, TrustZone
 570         </description>
 571         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 572       </device>
 573
 574       <device Dname="ARMCM35P_DSP_FP">
 575         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 576         <description>
 577           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 578         </description>
 579         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 580       </device>
 581
 582       <device Dname="ARMCM35P_DSP_FP_TZ">
 583         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 584         <description>
 585           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 586         </description>
 587         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 588       </device>
 589     </family>
 590
 591     <!-- ******************************  ARMSC000  ****************************** -->
 592     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 593       <description>
 594 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 595 - simple, easy-to-use programmers model
 596 - highly efficient ultra-low power operation
 597 - excellent code density
 598 - deterministic, high-performance interrupt handling
 599       </description>
 600       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 601       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 602       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 603       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 604
 605       <device Dname="ARMSC000">
 606         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 607         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 608       </device>
 609     </family>
 610
 611     <!-- ******************************  ARMSC300  ****************************** -->
 612     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 613       <description>
 614 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 615 - simple, easy-to-use programmers model
 616 - highly efficient ultra-low power operation
 617 - excellent code density
 618 - deterministic, high-performance interrupt handling
 619       </description>
 620       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 621       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 622       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 623       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 624
 625       <device Dname="ARMSC300">
 626         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 627         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 628       </device>
 629     </family>
 630
 631     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 632     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 633       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 634       <description>
 635 Armv8-M Baseline based device with TrustZone
 636       </description>
 637       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 638       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 639       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 640       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 641       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 642       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 643
 644       <device Dname="ARMv8MBL">
 645         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 646         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 647       </device>
 648     </family>
 649
 650     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 651     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 652       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 653       <description>
 654 Armv8-M Mainline based device with TrustZone
 655       </description>
 656       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 657       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 658       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 659       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 660       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 661       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 662
 663       <device Dname="ARMv8MML">
 664         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 665         <description>
 666           no DSP Instructions, no Floating Point Unit, TrustZone
 667         </description>
 668         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 669       </device>
 670
 671       <device Dname="ARMv8MML_DSP">
 672         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 673         <description>
 674           DSP Instructions, no Floating Point Unit, TrustZone
 675         </description>
 676         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 677       </device>
 678
 679       <device Dname="ARMv8MML_SP">
 680         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 681         <description>
 682           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 683         </description>
 684         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 685       </device>
 686
 687       <device Dname="ARMv8MML_DSP_SP">
 688         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 689         <description>
 690           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 691         </description>
 692         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 693       </device>
 694
 695       <device Dname="ARMv8MML_DP">
 696         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 697         <description>
 698           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 699         </description>
 700         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 701       </device>
 702
 703       <device Dname="ARMv8MML_DSP_DP">
 704         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 705         <description>
 706           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 707         </description>
 708         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 709       </device>
 710     </family>
 711
 712     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 713     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 714       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 715       <description>
 716 Armv8.1-M Mainline based device with TrustZone and MVE
 717       </description>
 718       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 719       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 720       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 721       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 722       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 723       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 724
 725
 726       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 727         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 728         <description>
 729           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 730         </description>
 731         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 732       </device>
 733     </family>
 734
 735     <!-- ******************************  Cortex-A5  ****************************** -->
 736     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 737       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 738       <description>
 739 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 740 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 741 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 742       </description>
 743
 744       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 745       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 746       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 747       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 748
 749       <device Dname="ARMCA5">
 750         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 751         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 752       </device>
 753     </family>
 754
 755     <!-- ******************************  Cortex-A7  ****************************** -->
 756     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 757       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 758       <description>
 759 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 760 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 761 an optional integrated GIC, and an optional L2 cache controller.
 762       </description>
 763
 764       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 765       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 766       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 767       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 768
 769       <device Dname="ARMCA7">
 770         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 771         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 772       </device>
 773     </family>
 774
 775     <!-- ******************************  Cortex-A9  ****************************** -->
 776     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 777       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 778       <description>
 779 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 780 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 781 and 8-bit Java bytecodes in Jazelle state.
 782       </description>
 783
 784       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 785       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 786       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 787       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 788
 789       <device Dname="ARMCA9">
 790         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 791         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 792       </device>
 793     </family>
 794   </devices>
 795
 796
 797   <apis>
 798     <!-- CMSIS Device API -->
 799     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 800       <description>Device interrupt controller interface</description>
 801       <files>
 802         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 803       </files>
 804     </api>
 805     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 806       <description>RTOS Kernel system tick timer interface</description>
 807       <files>
 808         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 809       </files>
 810     </api>
 811     <!-- CMSIS-RTOS API -->
 812     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 813       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 814       <files>
 815         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 816       </files>
 817     </api>
 818     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 819       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 820       <files>
 821         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 822         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 823       </files>
 824     </api>
 825     <!-- CMSIS Driver API -->
 826     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 827       <description>USART Driver API for Cortex-M</description>
 828       <files>
 829         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 830         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 831       </files>
 832     </api>
 833     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 834       <description>SPI Driver API for Cortex-M</description>
 835       <files>
 836         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 837         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 838       </files>
 839     </api>
 840     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 841       <description>SAI Driver API for Cortex-M</description>
 842       <files>
 843         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 844         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 845       </files>
 846     </api>
 847     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 848       <description>I2C Driver API for Cortex-M</description>
 849       <files>
 850         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 851         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 852       </files>
 853     </api>
 854     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 855       <description>CAN Driver API for Cortex-M</description>
 856       <files>
 857         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 858         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 859       </files>
 860     </api>
 861     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 862       <description>Flash Driver API for Cortex-M</description>
 863       <files>
 864         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 865         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 866       </files>
 867     </api>
 868     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 869       <description>MCI Driver API for Cortex-M</description>
 870       <files>
 871         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 872         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 873       </files>
 874     </api>
 875     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 876       <description>NAND Flash Driver API for Cortex-M</description>
 877       <files>
 878         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 879         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 880       </files>
 881     </api>
 882     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 883       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 884       <files>
 885         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 886         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 887         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 888       </files>
 889     </api>
 890     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 891       <description>Ethernet MAC Driver API for Cortex-M</description>
 892       <files>
 893         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 894         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 895       </files>
 896     </api>
 897     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 898       <description>Ethernet PHY Driver API for Cortex-M</description>
 899       <files>
 900         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 901         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 902       </files>
 903     </api>
 904     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 905       <description>USB Device Driver API for Cortex-M</description>
 906       <files>
 907         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 908         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 909       </files>
 910     </api>
 911     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 912       <description>USB Host Driver API for Cortex-M</description>
 913       <files>
 914         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 915         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 916       </files>
 917     </api>
 918     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0" exclusive="0">
 919       <description>WiFi driver</description>
 920       <files>
 921         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 922         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 923       </files>
 924     </api>
 925   </apis>
 926
 927   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 928   <conditions>
 929     <!-- compiler -->
 930     <condition id="ARMCC6">
 931       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 932       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 933     </condition>
 934     <condition id="ARMCC5">
 935       <require Tcompiler="ARMCC" Toptions="AC5"/>
 936     </condition>
 937     <condition id="ARMCC">
 938       <require Tcompiler="ARMCC"/>
 939     </condition>
 940     <condition id="GCC">
 941       <require Tcompiler="GCC"/>
 942     </condition>
 943     <condition id="IAR">
 944       <require Tcompiler="IAR"/>
 945     </condition>
 946     <condition id="ARMCC GCC">
 947       <accept Tcompiler="ARMCC"/>
 948       <accept Tcompiler="GCC"/>
 949     </condition>
 950     <condition id="ARMCC GCC IAR">
 951       <accept Tcompiler="ARMCC"/>
 952       <accept Tcompiler="GCC"/>
 953       <accept Tcompiler="IAR"/>
 954     </condition>
 955
 956     <!-- Arm architecture -->
 957     <condition id="ARMv6-M Device">
 958       <description>Armv6-M architecture based device</description>
 959       <accept Dcore="Cortex-M0"/>
 960       <accept Dcore="Cortex-M1"/>
 961       <accept Dcore="Cortex-M0+"/>
 962       <accept Dcore="SC000"/>
 963     </condition>
 964     <condition id="ARMv7-M Device">
 965       <description>Armv7-M architecture based device</description>
 966       <accept Dcore="Cortex-M3"/>
 967       <accept Dcore="Cortex-M4"/>
 968       <accept Dcore="Cortex-M7"/>
 969       <accept Dcore="SC300"/>
 970     </condition>
 971     <condition id="ARMv8-M Device">
 972       <description>Armv8-M architecture based device</description>
 973       <accept Dcore="ARMV8MBL"/>
 974       <accept Dcore="ARMV8MML"/>
 975       <accept Dcore="ARMV81MML"/>
 976       <accept Dcore="Cortex-M23"/>
 977       <accept Dcore="Cortex-M33"/>
 978       <accept Dcore="Cortex-M35P"/>
 979     </condition>
 980     <condition id="ARMv8-M TZ Device">
 981       <description>Armv8-M architecture based device with TrustZone</description>
 982       <require condition="ARMv8-M Device"/>
 983       <require Dtz="TZ"/>
 984     </condition>
 985     <condition id="ARMv6_7-M Device">
 986       <description>Armv6_7-M architecture based device</description>
 987       <accept condition="ARMv6-M Device"/>
 988       <accept condition="ARMv7-M Device"/>
 989     </condition>
 990     <condition id="ARMv6_7_8-M Device">
 991       <description>Armv6_7_8-M architecture based device</description>
 992       <accept condition="ARMv6-M Device"/>
 993       <accept condition="ARMv7-M Device"/>
 994       <accept condition="ARMv8-M Device"/>
 995     </condition>
 996     <condition id="ARMv7-A Device">
 997       <description>Armv7-A architecture based device</description>
 998       <accept Dcore="Cortex-A5"/>
 999       <accept Dcore="Cortex-A7"/>
1000       <accept Dcore="Cortex-A9"/>
1001     </condition>
1002
1003     <!-- ARM core -->
1004     <condition id="CM0">
1005       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1006       <accept Dcore="Cortex-M0"/>
1007       <accept Dcore="Cortex-M0+"/>
1008       <accept Dcore="SC000"/>
1009     </condition>
1010     <condition id="CM1">
1011       <description>Cortex-M1</description>
1012       <require Dcore="Cortex-M1"/>
1013     </condition>
1014     <condition id="CM3">
1015       <description>Cortex-M3 or SC300 processor based device</description>
1016       <accept Dcore="Cortex-M3"/>
1017       <accept Dcore="SC300"/>
1018     </condition>
1019     <condition id="CM4">
1020       <description>Cortex-M4 processor based device</description>
1021       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1022     </condition>
1023     <condition id="CM4_FP">
1024       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1025       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1026       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1027       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1028     </condition>
1029     <condition id="CM7">
1030       <description>Cortex-M7 processor based device</description>
1031       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1032     </condition>
1033     <condition id="CM7_FP">
1034       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1035       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1036       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1037     </condition>
1038     <condition id="CM7_SP">
1039       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1040       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1041     </condition>
1042     <condition id="CM7_DP">
1043       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1044       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1045     </condition>
1046     <condition id="CM23">
1047       <description>Cortex-M23 processor based device</description>
1048       <require Dcore="Cortex-M23"/>
1049     </condition>
1050     <condition id="CM33">
1051       <description>Cortex-M33 processor based device</description>
1052       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1053     </condition>
1054     <condition id="CM33_FP">
1055       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1056       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1057     </condition>
1058     <condition id="CM35P">
1059       <description>Cortex-M35P processor based device</description>
1060       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1061     </condition>
1062     <condition id="CM35P_FP">
1063       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1064       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1065     </condition>
1066     <condition id="ARMv8MBL">
1067       <description>Armv8-M Baseline processor based device</description>
1068       <require Dcore="ARMV8MBL"/>
1069     </condition>
1070     <condition id="ARMv8MML">
1071       <description>Armv8-M Mainline processor based device</description>
1072       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1073     </condition>
1074     <condition id="ARMv8MML_FP">
1075       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1076       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1077       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1078     </condition>
1079
1080     <condition id="CM33_NODSP_NOFPU">
1081       <description>CM33, no DSP, no FPU</description>
1082       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1083     </condition>
1084     <condition id="CM33_DSP_NOFPU">
1085       <description>CM33, DSP, no FPU</description>
1086       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1087     </condition>
1088     <condition id="CM33_NODSP_SP">
1089       <description>CM33, no DSP, SP FPU</description>
1090       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1091     </condition>
1092     <condition id="CM33_DSP_SP">
1093       <description>CM33, DSP, SP FPU</description>
1094       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1095     </condition>
1096
1097     <condition id="CM35P_NODSP_NOFPU">
1098       <description>CM35P, no DSP, no FPU</description>
1099       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1100     </condition>
1101     <condition id="CM35P_DSP_NOFPU">
1102       <description>CM35P, DSP, no FPU</description>
1103       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1104     </condition>
1105     <condition id="CM35P_NODSP_SP">
1106       <description>CM35P, no DSP, SP FPU</description>
1107       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1108     </condition>
1109     <condition id="CM35P_DSP_SP">
1110       <description>CM35P, DSP, SP FPU</description>
1111       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1112     </condition>
1113
1114     <condition id="ARMv8MML_NODSP_NOFPU">
1115       <description>Armv8-M Mainline, no DSP, no FPU</description>
1116       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1117     </condition>
1118     <condition id="ARMv8MML_DSP_NOFPU">
1119       <description>Armv8-M Mainline, DSP, no FPU</description>
1120       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1121     </condition>
1122     <condition id="ARMv8MML_NODSP_SP">
1123       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1124       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1125     </condition>
1126     <condition id="ARMv8MML_DSP_SP">
1127       <description>Armv8-M Mainline, DSP, SP FPU</description>
1128       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1129     </condition>
1130
1131     <condition id="CA5_CA9">
1132       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1133       <accept Dcore="Cortex-A5"/>
1134       <accept Dcore="Cortex-A9"/>
1135     </condition>
1136
1137     <condition id="CA7">
1138       <description>Cortex-A7 processor based device</description>
1139       <accept Dcore="Cortex-A7"/>
1140     </condition>
1141
1142     <!-- ARMCC compiler -->
1143     <condition id="CA_ARMCC5">
1144       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1145       <require condition="ARMv7-A Device"/>
1146       <require condition="ARMCC5"/>
1147     </condition>
1148     <condition id="CA_ARMCC6">
1149       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1150       <require condition="ARMv7-A Device"/>
1151       <require condition="ARMCC6"/>
1152     </condition>
1153
1154     <condition id="CM0_ARMCC">
1155       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1156       <require condition="CM0"/>
1157       <require Tcompiler="ARMCC"/>
1158     </condition>
1159     <condition id="CM0_LE_ARMCC">
1160       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1161       <require condition="CM0_ARMCC"/>
1162       <require Dendian="Little-endian"/>
1163     </condition>
1164     <condition id="CM0_BE_ARMCC">
1165       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1166       <require condition="CM0_ARMCC"/>
1167       <require Dendian="Big-endian"/>
1168     </condition>
1169
1170     <condition id="CM1_ARMCC">
1171       <description>Cortex-M1 based device for the Arm Compiler</description>
1172       <require condition="CM1"/>
1173       <require Tcompiler="ARMCC"/>
1174     </condition>
1175     <condition id="CM1_LE_ARMCC">
1176       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1177       <require condition="CM1_ARMCC"/>
1178       <require Dendian="Little-endian"/>
1179     </condition>
1180     <condition id="CM1_BE_ARMCC">
1181       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1182       <require condition="CM1_ARMCC"/>
1183       <require Dendian="Big-endian"/>
1184     </condition>
1185
1186     <condition id="CM3_ARMCC">
1187       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1188       <require condition="CM3"/>
1189       <require Tcompiler="ARMCC"/>
1190     </condition>
1191     <condition id="CM3_LE_ARMCC">
1192       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1193       <require condition="CM3_ARMCC"/>
1194       <require Dendian="Little-endian"/>
1195     </condition>
1196     <condition id="CM3_BE_ARMCC">
1197       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1198       <require condition="CM3_ARMCC"/>
1199       <require Dendian="Big-endian"/>
1200     </condition>
1201
1202     <condition id="CM4_ARMCC">
1203       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1204       <require condition="CM4"/>
1205       <require Tcompiler="ARMCC"/>
1206     </condition>
1207     <condition id="CM4_LE_ARMCC">
1208       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1209       <require condition="CM4_ARMCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212     <condition id="CM4_BE_ARMCC">
1213       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1214       <require condition="CM4_ARMCC"/>
1215       <require Dendian="Big-endian"/>
1216     </condition>
1217
1218     <condition id="CM4_FP_ARMCC">
1219       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1220       <require condition="CM4_FP"/>
1221       <require Tcompiler="ARMCC"/>
1222     </condition>
1223     <condition id="CM4_FP_LE_ARMCC">
1224       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1225       <require condition="CM4_FP_ARMCC"/>
1226       <require Dendian="Little-endian"/>
1227     </condition>
1228     <condition id="CM4_FP_BE_ARMCC">
1229       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1230       <require condition="CM4_FP_ARMCC"/>
1231       <require Dendian="Big-endian"/>
1232     </condition>
1233
1234     <condition id="CM7_ARMCC">
1235       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1236       <require condition="CM7"/>
1237       <require Tcompiler="ARMCC"/>
1238     </condition>
1239     <condition id="CM7_LE_ARMCC">
1240       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1241       <require condition="CM7_ARMCC"/>
1242       <require Dendian="Little-endian"/>
1243     </condition>
1244     <condition id="CM7_BE_ARMCC">
1245       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1246       <require condition="CM7_ARMCC"/>
1247       <require Dendian="Big-endian"/>
1248     </condition>
1249
1250     <condition id="CM7_FP_ARMCC">
1251       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1252       <require condition="CM7_FP"/>
1253       <require Tcompiler="ARMCC"/>
1254     </condition>
1255     <condition id="CM7_FP_LE_ARMCC">
1256       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1257       <require condition="CM7_FP_ARMCC"/>
1258       <require Dendian="Little-endian"/>
1259     </condition>
1260     <condition id="CM7_FP_BE_ARMCC">
1261       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1262       <require condition="CM7_FP_ARMCC"/>
1263       <require Dendian="Big-endian"/>
1264     </condition>
1265
1266     <condition id="CM7_SP_ARMCC">
1267       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1268       <require condition="CM7_SP"/>
1269       <require Tcompiler="ARMCC"/>
1270     </condition>
1271     <condition id="CM7_SP_LE_ARMCC">
1272       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1273       <require condition="CM7_SP_ARMCC"/>
1274       <require Dendian="Little-endian"/>
1275     </condition>
1276     <condition id="CM7_SP_BE_ARMCC">
1277       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1278       <require condition="CM7_SP_ARMCC"/>
1279       <require Dendian="Big-endian"/>
1280     </condition>
1281
1282     <condition id="CM7_DP_ARMCC">
1283       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1284       <require condition="CM7_DP"/>
1285       <require Tcompiler="ARMCC"/>
1286     </condition>
1287     <condition id="CM7_DP_LE_ARMCC">
1288       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1289       <require condition="CM7_DP_ARMCC"/>
1290       <require Dendian="Little-endian"/>
1291     </condition>
1292     <condition id="CM7_DP_BE_ARMCC">
1293       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1294       <require condition="CM7_DP_ARMCC"/>
1295       <require Dendian="Big-endian"/>
1296     </condition>
1297
1298     <condition id="CM23_ARMCC">
1299       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1300       <require condition="CM23"/>
1301       <require Tcompiler="ARMCC"/>
1302     </condition>
1303     <condition id="CM23_LE_ARMCC">
1304       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1305       <require condition="CM23_ARMCC"/>
1306       <require Dendian="Little-endian"/>
1307     </condition>
1308
1309     <condition id="CM33_ARMCC">
1310       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1311       <require condition="CM33"/>
1312       <require Tcompiler="ARMCC"/>
1313     </condition>
1314     <condition id="CM33_LE_ARMCC">
1315       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1316       <require condition="CM33_ARMCC"/>
1317       <require Dendian="Little-endian"/>
1318     </condition>
1319
1320     <condition id="CM33_FP_ARMCC">
1321       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1322       <require condition="CM33_FP"/>
1323       <require Tcompiler="ARMCC"/>
1324     </condition>
1325     <condition id="CM33_FP_LE_ARMCC">
1326       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1327       <require condition="CM33_FP_ARMCC"/>
1328       <require Dendian="Little-endian"/>
1329     </condition>
1330
1331     <condition id="CM33_NODSP_NOFPU_ARMCC">
1332       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1333       <require condition="CM33_NODSP_NOFPU"/>
1334       <require Tcompiler="ARMCC"/>
1335     </condition>
1336     <condition id="CM33_DSP_NOFPU_ARMCC">
1337       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1338       <require condition="CM33_DSP_NOFPU"/>
1339       <require Tcompiler="ARMCC"/>
1340     </condition>
1341     <condition id="CM33_NODSP_SP_ARMCC">
1342       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1343       <require condition="CM33_NODSP_SP"/>
1344       <require Tcompiler="ARMCC"/>
1345     </condition>
1346     <condition id="CM33_DSP_SP_ARMCC">
1347       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1348       <require condition="CM33_DSP_SP"/>
1349       <require Tcompiler="ARMCC"/>
1350     </condition>
1351     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1352       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1353       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1354       <require Dendian="Little-endian"/>
1355     </condition>
1356     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1357       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1358       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1359       <require Dendian="Little-endian"/>
1360     </condition>
1361     <condition id="CM33_NODSP_SP_LE_ARMCC">
1362       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1363       <require condition="CM33_NODSP_SP_ARMCC"/>
1364       <require Dendian="Little-endian"/>
1365     </condition>
1366     <condition id="CM33_DSP_SP_LE_ARMCC">
1367       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1368       <require condition="CM33_DSP_SP_ARMCC"/>
1369       <require Dendian="Little-endian"/>
1370     </condition>
1371
1372     <condition id="CM35P_ARMCC">
1373       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1374       <require condition="CM35P"/>
1375       <require Tcompiler="ARMCC"/>
1376     </condition>
1377     <condition id="CM35P_LE_ARMCC">
1378       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1379       <require condition="CM35P_ARMCC"/>
1380       <require Dendian="Little-endian"/>
1381     </condition>
1382
1383     <condition id="CM35P_FP_ARMCC">
1384       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1385       <require condition="CM35P_FP"/>
1386       <require Tcompiler="ARMCC"/>
1387     </condition>
1388     <condition id="CM35P_FP_LE_ARMCC">
1389       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1390       <require condition="CM35P_FP_ARMCC"/>
1391       <require Dendian="Little-endian"/>
1392     </condition>
1393
1394     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1395       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1396       <require condition="CM35P_NODSP_NOFPU"/>
1397       <require Tcompiler="ARMCC"/>
1398     </condition>
1399     <condition id="CM35P_DSP_NOFPU_ARMCC">
1400       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1401       <require condition="CM35P_DSP_NOFPU"/>
1402       <require Tcompiler="ARMCC"/>
1403     </condition>
1404     <condition id="CM35P_NODSP_SP_ARMCC">
1405       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1406       <require condition="CM35P_NODSP_SP"/>
1407       <require Tcompiler="ARMCC"/>
1408     </condition>
1409     <condition id="CM35P_DSP_SP_ARMCC">
1410       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1411       <require condition="CM35P_DSP_SP"/>
1412       <require Tcompiler="ARMCC"/>
1413     </condition>
1414     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1415       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1416       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1420       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1421       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1422       <require Dendian="Little-endian"/>
1423     </condition>
1424     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1425       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1426       <require condition="CM35P_NODSP_SP_ARMCC"/>
1427       <require Dendian="Little-endian"/>
1428     </condition>
1429     <condition id="CM35P_DSP_SP_LE_ARMCC">
1430       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1431       <require condition="CM35P_DSP_SP_ARMCC"/>
1432       <require Dendian="Little-endian"/>
1433     </condition>
1434
1435     <condition id="ARMv8MBL_ARMCC">
1436       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1437       <require condition="ARMv8MBL"/>
1438       <require Tcompiler="ARMCC"/>
1439     </condition>
1440     <condition id="ARMv8MBL_LE_ARMCC">
1441       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1442       <require condition="ARMv8MBL_ARMCC"/>
1443       <require Dendian="Little-endian"/>
1444     </condition>
1445
1446     <condition id="ARMv8MML_ARMCC">
1447       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1448       <require condition="ARMv8MML"/>
1449       <require Tcompiler="ARMCC"/>
1450     </condition>
1451     <condition id="ARMv8MML_LE_ARMCC">
1452       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1453       <require condition="ARMv8MML_ARMCC"/>
1454       <require Dendian="Little-endian"/>
1455     </condition>
1456
1457     <condition id="ARMv8MML_FP_ARMCC">
1458       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1459       <require condition="ARMv8MML_FP"/>
1460       <require Tcompiler="ARMCC"/>
1461     </condition>
1462     <condition id="ARMv8MML_FP_LE_ARMCC">
1463       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1464       <require condition="ARMv8MML_FP_ARMCC"/>
1465       <require Dendian="Little-endian"/>
1466     </condition>
1467
1468     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1469       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1470       <require condition="ARMv8MML_NODSP_NOFPU"/>
1471       <require Tcompiler="ARMCC"/>
1472     </condition>
1473     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1474       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1475       <require condition="ARMv8MML_DSP_NOFPU"/>
1476       <require Tcompiler="ARMCC"/>
1477     </condition>
1478     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1479       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1480       <require condition="ARMv8MML_NODSP_SP"/>
1481       <require Tcompiler="ARMCC"/>
1482     </condition>
1483     <condition id="ARMv8MML_DSP_SP_ARMCC">
1484       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1485       <require condition="ARMv8MML_DSP_SP"/>
1486       <require Tcompiler="ARMCC"/>
1487     </condition>
1488     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1489       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1490       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1491       <require Dendian="Little-endian"/>
1492     </condition>
1493     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1494       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1495       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1496       <require Dendian="Little-endian"/>
1497     </condition>
1498     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1499       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1500       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1501       <require Dendian="Little-endian"/>
1502     </condition>
1503     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1504       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1505       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1506       <require Dendian="Little-endian"/>
1507     </condition>
1508
1509     <!-- GCC compiler -->
1510     <condition id="CA_GCC">
1511       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1512       <require condition="ARMv7-A Device"/>
1513       <require Tcompiler="GCC"/>
1514     </condition>
1515
1516     <condition id="CM0_GCC">
1517       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1518       <require condition="CM0"/>
1519       <require Tcompiler="GCC"/>
1520     </condition>
1521     <condition id="CM0_LE_GCC">
1522       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1523       <require condition="CM0_GCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM0_BE_GCC">
1527       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1528       <require condition="CM0_GCC"/>
1529       <require Dendian="Big-endian"/>
1530     </condition>
1531
1532     <condition id="CM1_GCC">
1533       <description>Cortex-M1 based device for the GCC Compiler</description>
1534       <require condition="CM1"/>
1535       <require Tcompiler="GCC"/>
1536     </condition>
1537     <condition id="CM1_LE_GCC">
1538       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1539       <require condition="CM1_GCC"/>
1540       <require Dendian="Little-endian"/>
1541     </condition>
1542     <condition id="CM1_BE_GCC">
1543       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1544       <require condition="CM1_GCC"/>
1545       <require Dendian="Big-endian"/>
1546     </condition>
1547
1548     <condition id="CM3_GCC">
1549       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1550       <require condition="CM3"/>
1551       <require Tcompiler="GCC"/>
1552     </condition>
1553     <condition id="CM3_LE_GCC">
1554       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1555       <require condition="CM3_GCC"/>
1556       <require Dendian="Little-endian"/>
1557     </condition>
1558     <condition id="CM3_BE_GCC">
1559       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1560       <require condition="CM3_GCC"/>
1561       <require Dendian="Big-endian"/>
1562     </condition>
1563
1564     <condition id="CM4_GCC">
1565       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1566       <require condition="CM4"/>
1567       <require Tcompiler="GCC"/>
1568     </condition>
1569     <condition id="CM4_LE_GCC">
1570       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1571       <require condition="CM4_GCC"/>
1572       <require Dendian="Little-endian"/>
1573     </condition>
1574     <condition id="CM4_BE_GCC">
1575       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1576       <require condition="CM4_GCC"/>
1577       <require Dendian="Big-endian"/>
1578     </condition>
1579
1580     <condition id="CM4_FP_GCC">
1581       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1582       <require condition="CM4_FP"/>
1583       <require Tcompiler="GCC"/>
1584     </condition>
1585     <condition id="CM4_FP_LE_GCC">
1586       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1587       <require condition="CM4_FP_GCC"/>
1588       <require Dendian="Little-endian"/>
1589     </condition>
1590     <condition id="CM4_FP_BE_GCC">
1591       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1592       <require condition="CM4_FP_GCC"/>
1593       <require Dendian="Big-endian"/>
1594     </condition>
1595
1596     <condition id="CM7_GCC">
1597       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1598       <require condition="CM7"/>
1599       <require Tcompiler="GCC"/>
1600     </condition>
1601     <condition id="CM7_LE_GCC">
1602       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1603       <require condition="CM7_GCC"/>
1604       <require Dendian="Little-endian"/>
1605     </condition>
1606     <condition id="CM7_BE_GCC">
1607       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1608       <require condition="CM7_GCC"/>
1609       <require Dendian="Big-endian"/>
1610     </condition>
1611
1612     <condition id="CM7_FP_GCC">
1613       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1614       <require condition="CM7_FP"/>
1615       <require Tcompiler="GCC"/>
1616     </condition>
1617     <condition id="CM7_FP_LE_GCC">
1618       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1619       <require condition="CM7_FP_GCC"/>
1620       <require Dendian="Little-endian"/>
1621     </condition>
1622     <condition id="CM7_FP_BE_GCC">
1623       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1624       <require condition="CM7_FP_GCC"/>
1625       <require Dendian="Big-endian"/>
1626     </condition>
1627
1628     <condition id="CM7_SP_GCC">
1629       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1630       <require condition="CM7_SP"/>
1631       <require Tcompiler="GCC"/>
1632     </condition>
1633     <condition id="CM7_SP_LE_GCC">
1634       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1635       <require condition="CM7_SP_GCC"/>
1636       <require Dendian="Little-endian"/>
1637     </condition>
1638
1639     <condition id="CM7_DP_GCC">
1640       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1641       <require condition="CM7_DP"/>
1642       <require Tcompiler="GCC"/>
1643     </condition>
1644     <condition id="CM7_DP_LE_GCC">
1645       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1646       <require condition="CM7_DP_GCC"/>
1647       <require Dendian="Little-endian"/>
1648     </condition>
1649
1650     <condition id="CM23_GCC">
1651       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1652       <require condition="CM23"/>
1653       <require Tcompiler="GCC"/>
1654     </condition>
1655     <condition id="CM23_LE_GCC">
1656       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1657       <require condition="CM23_GCC"/>
1658       <require Dendian="Little-endian"/>
1659     </condition>
1660
1661     <condition id="CM33_GCC">
1662       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1663       <require condition="CM33"/>
1664       <require Tcompiler="GCC"/>
1665     </condition>
1666     <condition id="CM33_LE_GCC">
1667       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1668       <require condition="CM33_GCC"/>
1669       <require Dendian="Little-endian"/>
1670     </condition>
1671
1672     <condition id="CM33_FP_GCC">
1673       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1674       <require condition="CM33_FP"/>
1675       <require Tcompiler="GCC"/>
1676     </condition>
1677     <condition id="CM33_FP_LE_GCC">
1678       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1679       <require condition="CM33_FP_GCC"/>
1680       <require Dendian="Little-endian"/>
1681     </condition>
1682
1683     <condition id="CM33_NODSP_NOFPU_GCC">
1684       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1685       <require condition="CM33_NODSP_NOFPU"/>
1686       <require Tcompiler="GCC"/>
1687     </condition>
1688     <condition id="CM33_DSP_NOFPU_GCC">
1689       <description>CM33, DSP, no FPU, GCC Compiler</description>
1690       <require condition="CM33_DSP_NOFPU"/>
1691       <require Tcompiler="GCC"/>
1692     </condition>
1693     <condition id="CM33_NODSP_SP_GCC">
1694       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1695       <require condition="CM33_NODSP_SP"/>
1696       <require Tcompiler="GCC"/>
1697     </condition>
1698     <condition id="CM33_DSP_SP_GCC">
1699       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1700       <require condition="CM33_DSP_SP"/>
1701       <require Tcompiler="GCC"/>
1702     </condition>
1703     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1704       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1705       <require condition="CM33_NODSP_NOFPU_GCC"/>
1706       <require Dendian="Little-endian"/>
1707     </condition>
1708     <condition id="CM33_DSP_NOFPU_LE_GCC">
1709       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1710       <require condition="CM33_DSP_NOFPU_GCC"/>
1711       <require Dendian="Little-endian"/>
1712     </condition>
1713     <condition id="CM33_NODSP_SP_LE_GCC">
1714       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1715       <require condition="CM33_NODSP_SP_GCC"/>
1716       <require Dendian="Little-endian"/>
1717     </condition>
1718     <condition id="CM33_DSP_SP_LE_GCC">
1719       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1720       <require condition="CM33_DSP_SP_GCC"/>
1721       <require Dendian="Little-endian"/>
1722     </condition>
1723
1724     <condition id="CM35P_GCC">
1725       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1726       <require condition="CM35P"/>
1727       <require Tcompiler="GCC"/>
1728     </condition>
1729     <condition id="CM35P_LE_GCC">
1730       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1731       <require condition="CM35P_GCC"/>
1732       <require Dendian="Little-endian"/>
1733     </condition>
1734
1735     <condition id="CM35P_FP_GCC">
1736       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1737       <require condition="CM35P_FP"/>
1738       <require Tcompiler="GCC"/>
1739     </condition>
1740     <condition id="CM35P_FP_LE_GCC">
1741       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1742       <require condition="CM35P_FP_GCC"/>
1743       <require Dendian="Little-endian"/>
1744     </condition>
1745
1746     <condition id="CM35P_NODSP_NOFPU_GCC">
1747       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1748       <require condition="CM35P_NODSP_NOFPU"/>
1749       <require Tcompiler="GCC"/>
1750     </condition>
1751     <condition id="CM35P_DSP_NOFPU_GCC">
1752       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1753       <require condition="CM35P_DSP_NOFPU"/>
1754       <require Tcompiler="GCC"/>
1755     </condition>
1756     <condition id="CM35P_NODSP_SP_GCC">
1757       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1758       <require condition="CM35P_NODSP_SP"/>
1759       <require Tcompiler="GCC"/>
1760     </condition>
1761     <condition id="CM35P_DSP_SP_GCC">
1762       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1763       <require condition="CM35P_DSP_SP"/>
1764       <require Tcompiler="GCC"/>
1765     </condition>
1766     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1767       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1768       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1769       <require Dendian="Little-endian"/>
1770     </condition>
1771     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1772       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1773       <require condition="CM35P_DSP_NOFPU_GCC"/>
1774       <require Dendian="Little-endian"/>
1775     </condition>
1776     <condition id="CM35P_NODSP_SP_LE_GCC">
1777       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1778       <require condition="CM35P_NODSP_SP_GCC"/>
1779       <require Dendian="Little-endian"/>
1780     </condition>
1781     <condition id="CM35P_DSP_SP_LE_GCC">
1782       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1783       <require condition="CM35P_DSP_SP_GCC"/>
1784       <require Dendian="Little-endian"/>
1785     </condition>
1786
1787     <condition id="ARMv8MBL_GCC">
1788       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1789       <require condition="ARMv8MBL"/>
1790       <require Tcompiler="GCC"/>
1791     </condition>
1792     <condition id="ARMv8MBL_LE_GCC">
1793       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1794       <require condition="ARMv8MBL_GCC"/>
1795       <require Dendian="Little-endian"/>
1796     </condition>
1797
1798     <condition id="ARMv8MML_GCC">
1799       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1800       <require condition="ARMv8MML"/>
1801       <require Tcompiler="GCC"/>
1802     </condition>
1803     <condition id="ARMv8MML_LE_GCC">
1804       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1805       <require condition="ARMv8MML_GCC"/>
1806       <require Dendian="Little-endian"/>
1807     </condition>
1808
1809     <condition id="ARMv8MML_FP_GCC">
1810       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1811       <require condition="ARMv8MML_FP"/>
1812       <require Tcompiler="GCC"/>
1813     </condition>
1814     <condition id="ARMv8MML_FP_LE_GCC">
1815       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1816       <require condition="ARMv8MML_FP_GCC"/>
1817       <require Dendian="Little-endian"/>
1818     </condition>
1819
1820     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1821       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1822       <require condition="ARMv8MML_NODSP_NOFPU"/>
1823       <require Tcompiler="GCC"/>
1824     </condition>
1825     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1826       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1827       <require condition="ARMv8MML_DSP_NOFPU"/>
1828       <require Tcompiler="GCC"/>
1829     </condition>
1830     <condition id="ARMv8MML_NODSP_SP_GCC">
1831       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1832       <require condition="ARMv8MML_NODSP_SP"/>
1833       <require Tcompiler="GCC"/>
1834     </condition>
1835     <condition id="ARMv8MML_DSP_SP_GCC">
1836       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1837       <require condition="ARMv8MML_DSP_SP"/>
1838       <require Tcompiler="GCC"/>
1839     </condition>
1840     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1841       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1842       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1843       <require Dendian="Little-endian"/>
1844     </condition>
1845     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1846       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1847       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1848       <require Dendian="Little-endian"/>
1849     </condition>
1850     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1851       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1852       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1853       <require Dendian="Little-endian"/>
1854     </condition>
1855     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1856       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1857       <require condition="ARMv8MML_DSP_SP_GCC"/>
1858       <require Dendian="Little-endian"/>
1859     </condition>
1860
1861     <!-- IAR compiler -->
1862     <condition id="CA_IAR">
1863       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1864       <require condition="ARMv7-A Device"/>
1865       <require Tcompiler="IAR"/>
1866     </condition>
1867
1868     <condition id="CM0_IAR">
1869       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1870       <require condition="CM0"/>
1871       <require Tcompiler="IAR"/>
1872     </condition>
1873     <condition id="CM0_LE_IAR">
1874       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1875       <require condition="CM0_IAR"/>
1876       <require Dendian="Little-endian"/>
1877     </condition>
1878     <condition id="CM0_BE_IAR">
1879       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1880       <require condition="CM0_IAR"/>
1881       <require Dendian="Big-endian"/>
1882     </condition>
1883
1884     <condition id="CM1_IAR">
1885       <description>Cortex-M1 based device for the IAR Compiler</description>
1886       <require condition="CM1"/>
1887       <require Tcompiler="IAR"/>
1888     </condition>
1889     <condition id="CM1_LE_IAR">
1890       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1891       <require condition="CM1_IAR"/>
1892       <require Dendian="Little-endian"/>
1893     </condition>
1894     <condition id="CM1_BE_IAR">
1895       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1896       <require condition="CM1_IAR"/>
1897       <require Dendian="Big-endian"/>
1898     </condition>
1899
1900     <condition id="CM3_IAR">
1901       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1902       <require condition="CM3"/>
1903       <require Tcompiler="IAR"/>
1904     </condition>
1905     <condition id="CM3_LE_IAR">
1906       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1907       <require condition="CM3_IAR"/>
1908       <require Dendian="Little-endian"/>
1909     </condition>
1910     <condition id="CM3_BE_IAR">
1911       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1912       <require condition="CM3_IAR"/>
1913       <require Dendian="Big-endian"/>
1914     </condition>
1915
1916     <condition id="CM4_IAR">
1917       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1918       <require condition="CM4"/>
1919       <require Tcompiler="IAR"/>
1920     </condition>
1921     <condition id="CM4_LE_IAR">
1922       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1923       <require condition="CM4_IAR"/>
1924       <require Dendian="Little-endian"/>
1925     </condition>
1926     <condition id="CM4_BE_IAR">
1927       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1928       <require condition="CM4_IAR"/>
1929       <require Dendian="Big-endian"/>
1930     </condition>
1931
1932     <condition id="CM4_FP_IAR">
1933       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1934       <require condition="CM4_FP"/>
1935       <require Tcompiler="IAR"/>
1936     </condition>
1937     <condition id="CM4_FP_LE_IAR">
1938       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1939       <require condition="CM4_FP_IAR"/>
1940       <require Dendian="Little-endian"/>
1941     </condition>
1942     <condition id="CM4_FP_BE_IAR">
1943       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1944       <require condition="CM4_FP_IAR"/>
1945       <require Dendian="Big-endian"/>
1946     </condition>
1947
1948     <condition id="CM7_IAR">
1949       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1950       <require condition="CM7"/>
1951       <require Tcompiler="IAR"/>
1952     </condition>
1953     <condition id="CM7_LE_IAR">
1954       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1955       <require condition="CM7_IAR"/>
1956       <require Dendian="Little-endian"/>
1957     </condition>
1958     <condition id="CM7_BE_IAR">
1959       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1960       <require condition="CM7_IAR"/>
1961       <require Dendian="Big-endian"/>
1962     </condition>
1963
1964     <condition id="CM7_FP_IAR">
1965       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1966       <require condition="CM7_FP"/>
1967       <require Tcompiler="IAR"/>
1968     </condition>
1969     <condition id="CM7_FP_LE_IAR">
1970       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1971       <require condition="CM7_FP_IAR"/>
1972       <require Dendian="Little-endian"/>
1973     </condition>
1974     <condition id="CM7_FP_BE_IAR">
1975       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1976       <require condition="CM7_FP_IAR"/>
1977       <require Dendian="Big-endian"/>
1978     </condition>
1979
1980     <condition id="CM7_SP_IAR">
1981       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1982       <require condition="CM7_SP"/>
1983       <require Tcompiler="IAR"/>
1984     </condition>
1985     <condition id="CM7_SP_LE_IAR">
1986       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1987       <require condition="CM7_SP_IAR"/>
1988       <require Dendian="Little-endian"/>
1989     </condition>
1990     <condition id="CM7_SP_BE_IAR">
1991       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1992       <require condition="CM7_SP_IAR"/>
1993       <require Dendian="Big-endian"/>
1994     </condition>
1995
1996     <condition id="CM7_DP_IAR">
1997       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1998       <require condition="CM7_DP"/>
1999       <require Tcompiler="IAR"/>
2000     </condition>
2001     <condition id="CM7_DP_LE_IAR">
2002       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2003       <require condition="CM7_DP_IAR"/>
2004       <require Dendian="Little-endian"/>
2005     </condition>
2006     <condition id="CM7_DP_BE_IAR">
2007       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2008       <require condition="CM7_DP_IAR"/>
2009       <require Dendian="Big-endian"/>
2010     </condition>
2011
2012     <condition id="CM23_IAR">
2013       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2014       <require condition="CM23"/>
2015       <require Tcompiler="IAR"/>
2016     </condition>
2017     <condition id="CM23_LE_IAR">
2018       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2019       <require condition="CM23_IAR"/>
2020       <require Dendian="Little-endian"/>
2021     </condition>
2022
2023     <condition id="CM33_IAR">
2024       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2025       <require condition="CM33"/>
2026       <require Tcompiler="IAR"/>
2027     </condition>
2028     <condition id="CM33_LE_IAR">
2029       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2030       <require condition="CM33_IAR"/>
2031       <require Dendian="Little-endian"/>
2032     </condition>
2033
2034     <condition id="CM33_FP_IAR">
2035       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2036       <require condition="CM33_FP"/>
2037       <require Tcompiler="IAR"/>
2038     </condition>
2039     <condition id="CM33_FP_LE_IAR">
2040       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2041       <require condition="CM33_FP_IAR"/>
2042       <require Dendian="Little-endian"/>
2043     </condition>
2044
2045     <condition id="CM33_NODSP_NOFPU_IAR">
2046       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2047       <require condition="CM33_NODSP_NOFPU"/>
2048       <require Tcompiler="IAR"/>
2049     </condition>
2050     <condition id="CM33_DSP_NOFPU_IAR">
2051       <description>CM33, DSP, no FPU, IAR Compiler</description>
2052       <require condition="CM33_DSP_NOFPU"/>
2053       <require Tcompiler="IAR"/>
2054     </condition>
2055     <condition id="CM33_NODSP_SP_IAR">
2056       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2057       <require condition="CM33_NODSP_SP"/>
2058       <require Tcompiler="IAR"/>
2059     </condition>
2060     <condition id="CM33_DSP_SP_IAR">
2061       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2062       <require condition="CM33_DSP_SP"/>
2063       <require Tcompiler="IAR"/>
2064     </condition>
2065     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2066       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2067       <require condition="CM33_NODSP_NOFPU_IAR"/>
2068       <require Dendian="Little-endian"/>
2069     </condition>
2070     <condition id="CM33_DSP_NOFPU_LE_IAR">
2071       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2072       <require condition="CM33_DSP_NOFPU_IAR"/>
2073       <require Dendian="Little-endian"/>
2074     </condition>
2075     <condition id="CM33_NODSP_SP_LE_IAR">
2076       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2077       <require condition="CM33_NODSP_SP_IAR"/>
2078       <require Dendian="Little-endian"/>
2079     </condition>
2080     <condition id="CM33_DSP_SP_LE_IAR">
2081       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2082       <require condition="CM33_DSP_SP_IAR"/>
2083       <require Dendian="Little-endian"/>
2084     </condition>
2085
2086     <condition id="CM35P_IAR">
2087       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2088       <require condition="CM35P"/>
2089       <require Tcompiler="IAR"/>
2090     </condition>
2091     <condition id="CM35P_LE_IAR">
2092       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2093       <require condition="CM35P_IAR"/>
2094       <require Dendian="Little-endian"/>
2095     </condition>
2096
2097     <condition id="CM35P_FP_IAR">
2098       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2099       <require condition="CM35P_FP"/>
2100       <require Tcompiler="IAR"/>
2101     </condition>
2102     <condition id="CM35P_FP_LE_IAR">
2103       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2104       <require condition="CM35P_FP_IAR"/>
2105       <require Dendian="Little-endian"/>
2106     </condition>
2107
2108     <condition id="CM35P_NODSP_NOFPU_IAR">
2109       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2110       <require condition="CM35P_NODSP_NOFPU"/>
2111       <require Tcompiler="IAR"/>
2112     </condition>
2113     <condition id="CM35P_DSP_NOFPU_IAR">
2114       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2115       <require condition="CM35P_DSP_NOFPU"/>
2116       <require Tcompiler="IAR"/>
2117     </condition>
2118     <condition id="CM35P_NODSP_SP_IAR">
2119       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2120       <require condition="CM35P_NODSP_SP"/>
2121       <require Tcompiler="IAR"/>
2122     </condition>
2123     <condition id="CM35P_DSP_SP_IAR">
2124       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2125       <require condition="CM35P_DSP_SP"/>
2126       <require Tcompiler="IAR"/>
2127     </condition>
2128     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2129       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2130       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2131       <require Dendian="Little-endian"/>
2132     </condition>
2133     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2134       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2135       <require condition="CM35P_DSP_NOFPU_IAR"/>
2136       <require Dendian="Little-endian"/>
2137     </condition>
2138     <condition id="CM35P_NODSP_SP_LE_IAR">
2139       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2140       <require condition="CM35P_NODSP_SP_IAR"/>
2141       <require Dendian="Little-endian"/>
2142     </condition>
2143     <condition id="CM35P_DSP_SP_LE_IAR">
2144       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2145       <require condition="CM35P_DSP_SP_IAR"/>
2146       <require Dendian="Little-endian"/>
2147     </condition>
2148
2149     <condition id="ARMv8MBL_IAR">
2150       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2151       <require condition="ARMv8MBL"/>
2152       <require Tcompiler="IAR"/>
2153     </condition>
2154     <condition id="ARMv8MBL_LE_IAR">
2155       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2156       <require condition="ARMv8MBL_IAR"/>
2157       <require Dendian="Little-endian"/>
2158     </condition>
2159
2160     <condition id="ARMv8MML_IAR">
2161       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2162       <require condition="ARMv8MML"/>
2163       <require Tcompiler="IAR"/>
2164     </condition>
2165     <condition id="ARMv8MML_LE_IAR">
2166       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2167       <require condition="ARMv8MML_IAR"/>
2168       <require Dendian="Little-endian"/>
2169     </condition>
2170
2171     <condition id="ARMv8MML_FP_IAR">
2172       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2173       <require condition="ARMv8MML_FP"/>
2174       <require Tcompiler="IAR"/>
2175     </condition>
2176     <condition id="ARMv8MML_FP_LE_IAR">
2177       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2178       <require condition="ARMv8MML_FP_IAR"/>
2179       <require Dendian="Little-endian"/>
2180     </condition>
2181
2182     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2183       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2184       <require condition="ARMv8MML_NODSP_NOFPU"/>
2185       <require Tcompiler="IAR"/>
2186     </condition>
2187     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2188       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2189       <require condition="ARMv8MML_DSP_NOFPU"/>
2190       <require Tcompiler="IAR"/>
2191     </condition>
2192     <condition id="ARMv8MML_NODSP_SP_IAR">
2193       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2194       <require condition="ARMv8MML_NODSP_SP"/>
2195       <require Tcompiler="IAR"/>
2196     </condition>
2197     <condition id="ARMv8MML_DSP_SP_IAR">
2198       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2199       <require condition="ARMv8MML_DSP_SP"/>
2200       <require Tcompiler="IAR"/>
2201     </condition>
2202     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2203       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2204       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2205       <require Dendian="Little-endian"/>
2206     </condition>
2207     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2208       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2209       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2210       <require Dendian="Little-endian"/>
2211     </condition>
2212     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2213       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2214       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2215       <require Dendian="Little-endian"/>
2216     </condition>
2217     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2218       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2219       <require condition="ARMv8MML_DSP_SP_IAR"/>
2220       <require Dendian="Little-endian"/>
2221     </condition>
2222
2223     <!-- conditions selecting single devices and CMSIS Core -->
2224     <condition id="ARMCM0 CMSIS">
2225       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2226       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2227       <require Cclass="CMSIS" Cgroup="CORE"/>
2228     </condition>
2229
2230     <condition id="ARMCM0+ CMSIS">
2231       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2232       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2233       <require Cclass="CMSIS" Cgroup="CORE"/>
2234     </condition>
2235
2236     <condition id="ARMCM1 CMSIS">
2237       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2238       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2239       <require Cclass="CMSIS" Cgroup="CORE"/>
2240     </condition>
2241
2242     <condition id="ARMCM3 CMSIS">
2243       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2244       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2245       <require Cclass="CMSIS" Cgroup="CORE"/>
2246     </condition>
2247
2248     <condition id="ARMCM4 CMSIS">
2249       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2250       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2251       <require Cclass="CMSIS" Cgroup="CORE"/>
2252     </condition>
2253
2254     <condition id="ARMCM7 CMSIS">
2255       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2256       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2257       <require Cclass="CMSIS" Cgroup="CORE"/>
2258     </condition>
2259
2260     <condition id="ARMCM23 CMSIS">
2261       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2262       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2263       <require Cclass="CMSIS" Cgroup="CORE"/>
2264     </condition>
2265
2266     <condition id="ARMCM33 CMSIS">
2267       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2268       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2269       <require Cclass="CMSIS" Cgroup="CORE"/>
2270     </condition>
2271
2272     <condition id="ARMCM35P CMSIS">
2273       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2274       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2275       <require Cclass="CMSIS" Cgroup="CORE"/>
2276     </condition>
2277
2278     <condition id="ARMSC000 CMSIS">
2279       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2280       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2281       <require Cclass="CMSIS" Cgroup="CORE"/>
2282     </condition>
2283
2284     <condition id="ARMSC300 CMSIS">
2285       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2286       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2287       <require Cclass="CMSIS" Cgroup="CORE"/>
2288     </condition>
2289
2290     <condition id="ARMv8MBL CMSIS">
2291       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2292       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2293       <require Cclass="CMSIS" Cgroup="CORE"/>
2294     </condition>
2295
2296     <condition id="ARMv8MML CMSIS">
2297       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2298       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2299       <require Cclass="CMSIS" Cgroup="CORE"/>
2300     </condition>
2301
2302     <condition id="ARMv81MML CMSIS">
2303       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2304       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2305       <require Cclass="CMSIS" Cgroup="CORE"/>
2306     </condition>
2307
2308     <condition id="ARMCA5 CMSIS">
2309       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2310       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2311       <require Cclass="CMSIS" Cgroup="CORE"/>
2312     </condition>
2313
2314     <condition id="ARMCA7 CMSIS">
2315       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2316       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2317       <require Cclass="CMSIS" Cgroup="CORE"/>
2318     </condition>
2319
2320     <condition id="ARMCA9 CMSIS">
2321       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2322       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2323       <require Cclass="CMSIS" Cgroup="CORE"/>
2324     </condition>
2325
2326     <!-- CMSIS DSP -->
2327     <condition id="CMSIS DSP">
2328       <description>Components required for DSP</description>
2329       <require condition="ARMv6_7_8-M Device"/>
2330       <require condition="ARMCC GCC IAR"/>
2331       <require Cclass="CMSIS" Cgroup="CORE"/>
2332     </condition>
2333
2334     <!-- CMSIS NN -->
2335     <condition id="CMSIS NN">
2336       <description>Components required for NN</description>
2337       <require Cclass="CMSIS" Cgroup="DSP"/>
2338     </condition>
2339
2340     <!-- RTOS RTX -->
2341     <condition id="RTOS RTX">
2342       <description>Components required for RTOS RTX</description>
2343       <require condition="ARMv6_7-M Device"/>
2344       <require condition="ARMCC GCC IAR"/>
2345       <require Cclass="Device" Cgroup="Startup"/>
2346       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2347     </condition>
2348     <condition id="RTOS RTX IFX">
2349       <description>Components required for RTOS RTX IFX</description>
2350       <require condition="ARMv6_7-M Device"/>
2351       <require condition="ARMCC GCC IAR"/>
2352       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2353       <require Cclass="Device" Cgroup="Startup"/>
2354       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2355     </condition>
2356     <condition id="RTOS RTX5">
2357       <description>Components required for RTOS RTX5</description>
2358       <require condition="ARMv6_7_8-M Device"/>
2359       <require condition="ARMCC GCC IAR"/>
2360       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2361     </condition>
2362     <condition id="RTOS2 RTX5">
2363       <description>Components required for RTOS2 RTX5</description>
2364       <require condition="ARMv6_7_8-M Device"/>
2365       <require condition="ARMCC GCC IAR"/>
2366       <require Cclass="CMSIS"  Cgroup="CORE"/>
2367       <require Cclass="Device" Cgroup="Startup"/>
2368     </condition>
2369     <condition id="RTOS2 RTX5 v7-A">
2370       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2371       <require condition="ARMv7-A Device"/>
2372       <require condition="ARMCC GCC IAR"/>
2373       <require Cclass="CMSIS"  Cgroup="CORE"/>
2374       <require Cclass="Device" Cgroup="Startup"/>
2375       <require Cclass="Device" Cgroup="OS Tick"/>
2376       <require Cclass="Device" Cgroup="IRQ Controller"/>
2377     </condition>
2378     <condition id="RTOS2 RTX5 Lib">
2379       <description>Components required for RTOS2 RTX5 Library</description>
2380       <require condition="ARMv6_7_8-M Device"/>
2381       <require condition="ARMCC GCC IAR"/>
2382       <require Cclass="CMSIS"  Cgroup="CORE"/>
2383       <require Cclass="Device" Cgroup="Startup"/>
2384     </condition>
2385     <condition id="RTOS2 RTX5 NS">
2386       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2387       <require condition="ARMv8-M TZ Device"/>
2388       <require condition="ARMCC GCC IAR"/>
2389       <require Cclass="CMSIS"  Cgroup="CORE"/>
2390       <require Cclass="Device" Cgroup="Startup"/>
2391     </condition>
2392
2393     <!-- OS Tick -->
2394     <condition id="OS Tick PTIM">
2395       <description>Components required for OS Tick Private Timer</description>
2396       <require condition="CA5_CA9"/>
2397       <require Cclass="Device" Cgroup="IRQ Controller"/>
2398     </condition>
2399
2400     <condition id="OS Tick GTIM">
2401       <description>Components required for OS Tick Generic Physical Timer</description>
2402       <require condition="CA7"/>
2403       <require Cclass="Device" Cgroup="IRQ Controller"/>
2404     </condition>
2405
2406   </conditions>
2407
2408   <components>
2409     <!-- CMSIS-Core component -->
2410     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2411       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2412       <files>
2413         <!-- CPU independent -->
2414         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2415         <file category="include" name="CMSIS/Core/Include/"/>
2416         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2417         <!-- Code template -->
2418         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2419         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2420       </files>
2421     </component>
2422
2423     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2424       <description>CMSIS-CORE for Cortex-A</description>
2425       <files>
2426         <!-- CPU independent -->
2427         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2428         <file category="include" name="CMSIS/Core_A/Include/"/>
2429       </files>
2430     </component>
2431
2432     <!-- CMSIS-Startup components -->
2433     <!-- Cortex-M0 -->
2434     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0 CMSIS">
2435       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2436       <files>
2437         <!-- include folder / device header file -->
2438         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2439         <!-- startup / system file -->
2440         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.2" attr="config"/>
2441         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2442         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2443         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2444         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2445       </files>
2446     </component>
2447     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2448       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2449       <files>
2450         <!-- include folder / device header file -->
2451         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2452         <!-- startup / system file -->
2453         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2454         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2455         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2456         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2457         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2458       </files>
2459     </component>
2460
2461     <!-- Cortex-M0+ -->
2462     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM0+ CMSIS">
2463       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2464       <files>
2465         <!-- include folder / device header file -->
2466         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2467         <!-- startup / system file -->
2468         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.2" attr="config"/>
2469         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2470         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2471         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2472         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2473       </files>
2474     </component>
2475     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2476       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2477       <files>
2478         <!-- include folder / device header file -->
2479         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2480         <!-- startup / system file -->
2481         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2482         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2483         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2484         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2485         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2486       </files>
2487     </component>
2488
2489     <!-- Cortex-M1 -->
2490     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM1 CMSIS">
2491       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2492       <files>
2493         <!-- include folder / device header file -->
2494         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2495         <!-- startup / system file -->
2496         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.2" attr="config"/>
2497         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2498         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2499         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2500         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2501       </files>
2502     </component>
2503     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2504       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2505       <files>
2506         <!-- include folder / device header file -->
2507         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2508         <!-- startup / system file -->
2509         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2510         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2511         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2512         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2513         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2514       </files>
2515     </component>
2516
2517     <!-- Cortex-M3 -->
2518     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM3 CMSIS">
2519       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2520       <files>
2521         <!-- include folder / device header file -->
2522         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2523         <!-- startup / system file -->
2524         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.2" attr="config"/>
2525         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2526         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2527         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2528         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2529       </files>
2530     </component>
2531     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2532       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2533       <files>
2534         <!-- include folder / device header file -->
2535         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2536         <!-- startup / system file -->
2537         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2538         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2539         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2540         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2541         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2542       </files>
2543     </component>
2544
2545     <!-- Cortex-M4 -->
2546     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM4 CMSIS">
2547       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2548       <files>
2549         <!-- include folder / device header file -->
2550         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2551         <!-- startup / system file -->
2552         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.2" attr="config"/>
2553         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2554         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2555         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2556        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2557       </files>
2558     </component>
2559     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2560       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2561       <files>
2562         <!-- include folder / device header file -->
2563         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2564         <!-- startup / system file -->
2565         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2566         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2567         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2568         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2569         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2570       </files>
2571     </component>
2572
2573     <!-- Cortex-M7 -->
2574     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM7 CMSIS">
2575       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2576       <files>
2577         <!-- include folder / device header file -->
2578         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2579         <!-- startup / system file -->
2580         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.2" attr="config"/>
2581         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2582         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2583         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2584         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2585       </files>
2586     </component>
2587     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2588       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2589       <files>
2590         <!-- include folder / device header file -->
2591         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2592         <!-- startup / system file -->
2593         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2594         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2595         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2596         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2597         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2598       </files>
2599     </component>
2600
2601     <!-- Cortex-M23 -->
2602     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM23 CMSIS">
2603       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2604       <files>
2605         <!-- include folder / device header file -->
2606         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2607         <!-- startup / system file -->
2608         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.2" attr="config"/>
2609         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2610         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2611         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2612         <!-- SAU configuration -->
2613         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2614       </files>
2615     </component>
2616     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2617       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2618       <files>
2619         <!-- include folder / device header file -->
2620         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2621         <!-- startup / system file -->
2622         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2623         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2624         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2625         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2626         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2627         <!-- SAU configuration -->
2628         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2629       </files>
2630     </component>
2631
2632     <!-- Cortex-M33 -->
2633     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM33 CMSIS">
2634       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2635       <files>
2636         <!-- include folder / device header file -->
2637         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2638         <!-- startup / system file -->
2639         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.2" attr="config"/>
2640         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2641         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2642         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2643         <!-- SAU configuration -->
2644         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2645       </files>
2646     </component>
2647     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2648       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2649       <files>
2650         <!-- include folder / device header file -->
2651         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2652         <!-- startup / system file -->
2653         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2654         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2655         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2656         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2657         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2658         <!-- SAU configuration -->
2659         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2660       </files>
2661     </component>
2662
2663     <!-- Cortex-M35P -->
2664     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMCM35P CMSIS">
2665       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2666       <files>
2667         <!-- include folder / device header file -->
2668         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2669         <!-- startup / system file -->
2670         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.2" attr="config"/>
2671         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2672         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2673         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2674         <!-- SAU configuration -->
2675         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2676       </files>
2677     </component>
2678     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2679       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2680       <files>
2681         <!-- include folder / device header file -->
2682         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2683         <!-- startup / system file -->
2684         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2685         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2686         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2687         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2688         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2689         <!-- SAU configuration -->
2690         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2691       </files>
2692     </component>
2693
2694     <!-- Cortex-SC000 -->
2695     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMSC000 CMSIS">
2696       <description>System and Startup for Generic Arm SC000 device</description>
2697       <files>
2698         <!-- include folder / device header file -->
2699         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2700         <!-- startup / system file -->
2701         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.2" attr="config"/>
2702         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2703         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2704         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2705         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2706       </files>
2707     </component>
2708     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMSC000 CMSIS">
2709       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2710       <files>
2711         <!-- include folder / device header file -->
2712         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2713         <!-- startup / system file -->
2714         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2715         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2716         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2717         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2718         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2719       </files>
2720     </component>
2721
2722     <!-- Cortex-SC300 -->
2723     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMSC300 CMSIS">
2724       <description>System and Startup for Generic Arm SC300 device</description>
2725       <files>
2726         <!-- include folder / device header file -->
2727         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2728         <!-- startup / system file -->
2729         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.2" attr="config"/>
2730         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2731         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2732         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2733         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2734       </files>
2735     </component>
2736     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMSC300 CMSIS">
2737       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2738       <files>
2739         <!-- include folder / device header file -->
2740         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2741         <!-- startup / system file -->
2742         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2743         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2744         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2745         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2746         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2747       </files>
2748     </component>
2749
2750     <!-- ARMv8MBL -->
2751     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MBL CMSIS">
2752       <description>System and Startup for Generic Armv8-M Baseline device</description>
2753       <files>
2754         <!-- include folder / device header file -->
2755         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2756         <!-- startup / system file -->
2757         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.2" attr="config"/>
2758         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2759         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2760         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2761         <!-- SAU configuration -->
2762         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2763       </files>
2764     </component>
2765     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2766       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2767       <files>
2768         <!-- include folder / device header file -->
2769         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2770         <!-- startup / system file -->
2771         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2772         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2773         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2774         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2775         <!-- SAU configuration -->
2776         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2777       </files>
2778     </component>
2779
2780     <!-- ARMv8MML -->
2781     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.2" condition="ARMv8MML CMSIS">
2782       <description>System and Startup for Generic Armv8-M Mainline device</description>
2783       <files>
2784         <!-- include folder / device header file -->
2785         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2786         <!-- startup / system file -->
2787         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.2" attr="config"/>
2788         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2789         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2790         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2791         <!-- SAU configuration -->
2792         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2793       </files>
2794     </component>
2795     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2796       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2797       <files>
2798         <!-- include folder / device header file -->
2799         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2800         <!-- startup / system file -->
2801         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2802         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2803         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2804         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2805         <!-- SAU configuration -->
2806         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2807       </files>
2808     </component>
2809
2810     <!-- ARMv81MML -->
2811     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv81MML CMSIS">
2812       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2813       <files>
2814         <!-- include folder / device header file -->
2815         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2816         <!-- startup / system file -->
2817         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.2" attr="config"/>
2818         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2819         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.0" attr="config" condition="GCC"/>
2820         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.0" attr="config"/>
2821         <!-- SAU configuration -->
2822         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2823       </files>
2824     </component>
2825
2826     <!-- Cortex-A5 -->
2827     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2828       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2829       <files>
2830         <!-- include folder / device header file -->
2831         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2832         <!-- startup / system / mmu files -->
2833         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2834         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2835         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2836         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2837         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2838         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2839         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2840         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2841         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2842         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2843         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2844         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2845
2846       </files>
2847     </component>
2848
2849     <!-- Cortex-A7 -->
2850     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2851       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2852       <files>
2853         <!-- include folder / device header file -->
2854         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2855         <!-- startup / system / mmu files -->
2856         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2857         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2858         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2859         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2860         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2861         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2862         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2863         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2864         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2865         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2866         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2867         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2868       </files>
2869     </component>
2870
2871     <!-- Cortex-A9 -->
2872     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2873       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2874       <files>
2875         <!-- include folder / device header file -->
2876         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2877         <!-- startup / system / mmu files -->
2878         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2879         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2880         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2881         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2882         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2883         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2884         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2885         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2886         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2887         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2888         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2889         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2890       </files>
2891     </component>
2892
2893     <!-- IRQ Controller -->
2894     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2895       <description>IRQ Controller implementation using GIC</description>
2896       <files>
2897         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2898       </files>
2899     </component>
2900
2901     <!-- OS Tick -->
2902     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2903       <description>OS Tick implementation using Private Timer</description>
2904       <files>
2905         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2906       </files>
2907     </component>
2908
2909     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2910       <description>OS Tick implementation using Generic Physical Timer</description>
2911       <files>
2912         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2913       </files>
2914     </component>
2915
2916     <!-- CMSIS-DSP component -->
2917     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.7.0" isDefaultVariant="true" condition="CMSIS DSP">
2918       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2919       <files>
2920         <!-- CPU independent -->
2921         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2922         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
2923
2924         <!-- CPU and Compiler dependent -->
2925         <!-- ARMCC -->
2926         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2927         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2928         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2929         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2930         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2931         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2932         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2933         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2934         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2935         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2936         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2937         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2938         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2939         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2940         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2941         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2942
2943         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2944         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2945         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2946         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2947         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2948         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2949         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2950         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2951         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2952         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2953         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
2954         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
2955         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
2956         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
2957         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
2958         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
2959
2960         <!-- GCC -->
2961         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2962         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2963         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2964         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2965         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
2966         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
2967         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2968         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2969
2970         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2971         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2972         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2973         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2974         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2975         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2976         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2977         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2978         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2979         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2980         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
2981         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
2982         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
2983         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
2984         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
2985         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
2986
2987   <!-- IAR -->
2988         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2989         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2990         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2991         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2992         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2993         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2994         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2995         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
2996         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2997         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
2998         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
2999         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3000         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3001         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3002         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3003         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3004
3005         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3006         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3007         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3008         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3009         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3010         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3011         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3012         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3013         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3014         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3015         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3016         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3017         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3018         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3019         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3020         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3021
3022       </files>
3023     </component>
3024     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.7.0" condition="CMSIS DSP">
3025       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3026       <files>
3027         <!-- CPU independent -->
3028         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3029         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3030
3031         <!-- DSP sources (core) -->
3032         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3033         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3034         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3035         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3036         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3037         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3038         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3039         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3040         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3041         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3042
3043       </files>
3044     </component>
3045
3046     <!-- CMSIS-NN component -->
3047     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.2.0" condition="CMSIS NN">
3048       <description>CMSIS-NN Neural Network Library</description>
3049       <files>
3050         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3051         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3052
3053         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3054         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3055         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3056         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3057
3058         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3059         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3060         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3061         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3062         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3063         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3064         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3065         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3066         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3067         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3068         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3069         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3070         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3071
3072         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3073         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3074         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3075         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3076         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3077         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3078
3079         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3080         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3081         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3082         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3083         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3084
3085         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3086
3087         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3088         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3089       </files>
3090     </component>
3091
3092     <!-- CMSIS-RTOS Keil RTX component -->
3093     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3094       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3095       <RTE_Components_h>
3096         <!-- the following content goes into file 'RTE_Components.h' -->
3097         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3098         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3099       </RTE_Components_h>
3100       <files>
3101         <!-- CPU independent -->
3102         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3103         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3104         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3105
3106         <!-- RTX templates -->
3107         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3108         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3109         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3110         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3111         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3112         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3113         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3114         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3115         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3116         <!-- tool-chain specific template file -->
3117         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3118         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3119         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3120
3121         <!-- CPU and Compiler dependent -->
3122         <!-- ARMCC -->
3123         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3124         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3125         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3126         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3127         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3128         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3129         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3130         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3131         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3132         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3133         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3134         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3135         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3136         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3137         <!-- GCC -->
3138         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3139         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3140         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3141         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3142         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3143         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3144         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3145         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3146         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3147         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3148         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3149         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3150         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3151         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3152         <!-- IAR -->
3153         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3154         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3155         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3156         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3157         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3158         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3159         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3160         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3161         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3162         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3163         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3164         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3165         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3166         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3167       </files>
3168     </component>
3169     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3170     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3171       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3172       <RTE_Components_h>
3173         <!-- the following content goes into file 'RTE_Components.h' -->
3174         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3175         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3176       </RTE_Components_h>
3177       <files>
3178         <!-- CPU independent -->
3179         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3180         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3181         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3182
3183         <!-- RTX templates -->
3184         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3185         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3186         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3187         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3188         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3189         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3190         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3191         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3192         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3193         <!-- tool-chain specific template file -->
3194         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3195         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3196         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3197
3198         <!-- CPU and Compiler dependent -->
3199         <!-- ARMCC -->
3200         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3201         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3202         <!-- GCC -->
3203         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3204         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3205         <!-- IAR -->
3206       </files>
3207     </component>
3208
3209     <!-- CMSIS-RTOS Keil RTX5 component -->
3210     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3211       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3212       <RTE_Components_h>
3213         <!-- the following content goes into file 'RTE_Components.h' -->
3214         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3215         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3216       </RTE_Components_h>
3217       <files>
3218         <!-- RTX header file -->
3219         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3220         <!-- RTX compatibility module for API V1 -->
3221         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3222       </files>
3223     </component>
3224
3225     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3226     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3227       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3228       <RTE_Components_h>
3229         <!-- the following content goes into file 'RTE_Components.h' -->
3230         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3231         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3232       </RTE_Components_h>
3233       <files>
3234         <!-- RTX documentation -->
3235         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3236
3237         <!-- RTX header files -->
3238         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3239
3240         <!-- RTX configuration -->
3241         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3242         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3243
3244         <!-- RTX templates -->
3245         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3246         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3247         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3248         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3249         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3250         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3251         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3252         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3253         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3254         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3255
3256         <!-- RTX library configuration -->
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3258
3259         <!-- RTX libraries (CPU and Compiler dependent) -->
3260         <!-- ARMCC -->
3261         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3262         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3263         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3264         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3265         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3266         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3267         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3268         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3269         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3270         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3271         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3272         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3273         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3274         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3275         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3276         <!-- GCC -->
3277         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3278         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3279         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3280         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3281         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3282         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3283         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3284         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3285         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3286         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3287         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3288         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3289         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3290         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3291         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3292         <!-- IAR -->
3293         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3294         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3295         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3296         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3297         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3298         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3299         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3300         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3301         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3302         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3303         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3304         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3305         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3306         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3307         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3308       </files>
3309     </component>
3310     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3311       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3312       <RTE_Components_h>
3313         <!-- the following content goes into file 'RTE_Components.h' -->
3314         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3315         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3316         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3317       </RTE_Components_h>
3318       <files>
3319         <!-- RTX documentation -->
3320         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3321
3322         <!-- RTX header files -->
3323         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3324
3325         <!-- RTX configuration -->
3326         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3327         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3328
3329         <!-- RTX templates -->
3330         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3331         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3332         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3333         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3334         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3335         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3336         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3337         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3338         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3339         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3340
3341         <!-- RTX library configuration -->
3342         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3343
3344         <!-- RTX libraries (CPU and Compiler dependent) -->
3345         <!-- ARMCC -->
3346         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3347         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3348         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3349         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3350         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3351         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3352         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3353         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3354         <!-- GCC -->
3355         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3356         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3357         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3358         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3359         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3360         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3361         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3362         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3363         <!-- IAR -->
3364         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3365         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3366         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3367         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3368         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3369         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3370         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3371         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3372       </files>
3373     </component>
3374     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3375       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3376       <RTE_Components_h>
3377         <!-- the following content goes into file 'RTE_Components.h' -->
3378         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3379         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3380         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3381       </RTE_Components_h>
3382       <files>
3383         <!-- RTX documentation -->
3384         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3385
3386         <!-- RTX header files -->
3387         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3388
3389         <!-- RTX configuration -->
3390         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3391         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3392
3393         <!-- RTX templates -->
3394         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3395         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3396         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3397         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3398         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3399         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3400         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3401         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3402         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3403         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3404
3405         <!-- RTX sources (core) -->
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3409         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3410         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3411         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3412         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3413         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3414         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3415         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3416         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3418         <!-- RTX sources (library configuration) -->
3419         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3420         <!-- RTX sources (handlers ARMCC) -->
3421         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3422         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3423         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3424         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3425         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3426         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3427         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3428         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3429         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3430         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3431         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3432         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3433         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3434         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3435         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3436         <!-- RTX sources (handlers GCC) -->
3437         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3438         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3439         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3440         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3441         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3442         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3443         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3444         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3445         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3446         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3447         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3448         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3449         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3450         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3451         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3452         <!-- RTX sources (handlers IAR) -->
3453         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3454         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3455         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3456         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3457         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3458         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3459         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3460         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3461         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3462         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3463         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3464         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3465         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3466         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3467         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3468         <!-- OS Tick (SysTick) -->
3469         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3470       </files>
3471     </component>
3472     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3473       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3474       <RTE_Components_h>
3475         <!-- the following content goes into file 'RTE_Components.h' -->
3476         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3477         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3478         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3479       </RTE_Components_h>
3480       <files>
3481         <!-- RTX documentation -->
3482         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3483
3484         <!-- RTX header files -->
3485         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3486
3487         <!-- RTX configuration -->
3488         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3489         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3490
3491         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3492
3493         <!-- RTX templates -->
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3499         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3500         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3501         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3502         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3503         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3504
3505         <!-- RTX sources (core) -->
3506         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3507         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3508         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3509         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3510         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3511         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3512         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3513         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3514         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3515         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3516         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3517         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3518         <!-- RTX sources (library configuration) -->
3519         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3520         <!-- RTX sources (handlers ARMCC) -->
3521         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3522         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3523         <!-- RTX sources (handlers GCC) -->
3524         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3525         <!-- RTX sources (handlers IAR) -->
3526         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3527       </files>
3528     </component>
3529     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3530       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3531       <RTE_Components_h>
3532         <!-- the following content goes into file 'RTE_Components.h' -->
3533         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3534         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3535         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3536         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3537       </RTE_Components_h>
3538       <files>
3539         <!-- RTX documentation -->
3540         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3541
3542         <!-- RTX header files -->
3543         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3544
3545         <!-- RTX configuration -->
3546         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3547         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3548
3549         <!-- RTX templates -->
3550         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3551         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3552         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3553         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3559         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3560
3561         <!-- RTX sources (core) -->
3562         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3563         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3564         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3565         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3574         <!-- RTX sources (library configuration) -->
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3576         <!-- RTX sources (ARMCC handlers) -->
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3578         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3580         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3585         <!-- RTX sources (GCC handlers) -->
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3594         <!-- RTX sources (IAR handlers) -->
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3596         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3603         <!-- OS Tick (SysTick) -->
3604         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3605       </files>
3606     </component>
3607
3608     <!-- CMSIS-Driver Custom components -->
3609     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0" custom="1">
3610       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3611       <files>
3612         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3613         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3614       </files>
3615     </component>
3616     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0" custom="1">
3617       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3618       <files>
3619         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3620         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3621       </files>
3622     </component>
3623     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0" custom="1">
3624       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3625       <files>
3626         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3627         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3628       </files>
3629     </component>
3630     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0" custom="1">
3631       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3632       <files>
3633         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3634         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3635       </files>
3636     </component>
3637     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0" custom="1">
3638       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3639       <files>
3640         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3641         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3642       </files>
3643     </component>
3644     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0" custom="1">
3645       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3646       <files>
3647         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3648         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3649       </files>
3650     </component>
3651     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0" custom="1">
3652       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3653       <files>
3654         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3655         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3656       </files>
3657     </component>
3658     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0" custom="1">
3659       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3660       <files>
3661         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3662         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3663       </files>
3664     </component>
3665     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0" custom="1">
3666       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3667       <files>
3668         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3669         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3670         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3671         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3672       </files>
3673     </component>
3674     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0" custom="1">
3675       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3676       <files>
3677         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3678         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3679       </files>
3680     </component>
3681     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0" custom="1">
3682       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3683       <files>
3684         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3685         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3686       </files>
3687     </component>
3688     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0" custom="1">
3689       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3690       <files>
3691         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3692         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3693       </files>
3694     </component>
3695     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0" custom="1">
3696       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3697       <files>
3698         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3699         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3700       </files>
3701     </component>
3702     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.0.0" custom="1">
3703       <description>Access to #include Driver_WiFi.h file</description>
3704       <files>
3705         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3706         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3707       </files>
3708     </component>
3709   </components>
3710
3711   <boards>
3712     <board name="uVision Simulator" vendor="Keil">
3713       <description>uVision Simulator</description>
3714       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3715       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3716       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3717       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3718       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3719       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3720       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3721       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3722       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3723       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3724       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3725       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3726       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3727       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3728       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3729       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3730       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3731       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3732       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3733       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3734       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3735       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3736       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3737       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3738     </board>
3739
3740     <board name="EWARM Simulator" vendor="IAR">
3741       <description>EWARM Simulator</description>
3742       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3743       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3744       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3745       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3746       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3747       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3748       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3749       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3750       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3751       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3752       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3753       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3754       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3755       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3756       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3757       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3758       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3759       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3760       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3761       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3762       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3763       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3764       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3765       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3766     </board>
3767   </boards>
3768
3769   <examples>
3770     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3771       <description>DSP_Lib Class Marks example</description>
3772       <board name="uVision Simulator" vendor="Keil"/>
3773       <project>
3774         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3775       </project>
3776       <attributes>
3777         <component Cclass="CMSIS" Cgroup="CORE"/>
3778         <component Cclass="CMSIS" Cgroup="DSP"/>
3779         <component Cclass="Device" Cgroup="Startup"/>
3780         <category>Getting Started</category>
3781       </attributes>
3782     </example>
3783
3784     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3785       <description>DSP_Lib Convolution example</description>
3786       <board name="uVision Simulator" vendor="Keil"/>
3787       <project>
3788         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3789       </project>
3790       <attributes>
3791         <component Cclass="CMSIS" Cgroup="CORE"/>
3792         <component Cclass="CMSIS" Cgroup="DSP"/>
3793         <component Cclass="Device" Cgroup="Startup"/>
3794         <category>Getting Started</category>
3795       </attributes>
3796     </example>
3797
3798     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3799       <description>DSP_Lib Dotproduct example</description>
3800       <board name="uVision Simulator" vendor="Keil"/>
3801       <project>
3802         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3803       </project>
3804       <attributes>
3805         <component Cclass="CMSIS" Cgroup="CORE"/>
3806         <component Cclass="CMSIS" Cgroup="DSP"/>
3807         <component Cclass="Device" Cgroup="Startup"/>
3808         <category>Getting Started</category>
3809       </attributes>
3810     </example>
3811
3812     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3813       <description>DSP_Lib FFT Bin example</description>
3814       <board name="uVision Simulator" vendor="Keil"/>
3815       <project>
3816         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3817       </project>
3818       <attributes>
3819         <component Cclass="CMSIS" Cgroup="CORE"/>
3820         <component Cclass="CMSIS" Cgroup="DSP"/>
3821         <component Cclass="Device" Cgroup="Startup"/>
3822         <category>Getting Started</category>
3823       </attributes>
3824     </example>
3825
3826     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3827       <description>DSP_Lib FIR example</description>
3828       <board name="uVision Simulator" vendor="Keil"/>
3829       <project>
3830         <environment name="uv" load="arm_fir_example.uvprojx"/>
3831       </project>
3832       <attributes>
3833         <component Cclass="CMSIS" Cgroup="CORE"/>
3834         <component Cclass="CMSIS" Cgroup="DSP"/>
3835         <component Cclass="Device" Cgroup="Startup"/>
3836         <category>Getting Started</category>
3837       </attributes>
3838     </example>
3839
3840     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3841       <description>DSP_Lib Graphic Equalizer example</description>
3842       <board name="uVision Simulator" vendor="Keil"/>
3843       <project>
3844         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3845       </project>
3846       <attributes>
3847         <component Cclass="CMSIS" Cgroup="CORE"/>
3848         <component Cclass="CMSIS" Cgroup="DSP"/>
3849         <component Cclass="Device" Cgroup="Startup"/>
3850         <category>Getting Started</category>
3851       </attributes>
3852     </example>
3853
3854     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3855       <description>DSP_Lib Linear Interpolation example</description>
3856       <board name="uVision Simulator" vendor="Keil"/>
3857       <project>
3858         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3859       </project>
3860       <attributes>
3861         <component Cclass="CMSIS" Cgroup="CORE"/>
3862         <component Cclass="CMSIS" Cgroup="DSP"/>
3863         <component Cclass="Device" Cgroup="Startup"/>
3864         <category>Getting Started</category>
3865       </attributes>
3866     </example>
3867
3868     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3869       <description>DSP_Lib Matrix example</description>
3870       <board name="uVision Simulator" vendor="Keil"/>
3871       <project>
3872         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3873       </project>
3874       <attributes>
3875         <component Cclass="CMSIS" Cgroup="CORE"/>
3876         <component Cclass="CMSIS" Cgroup="DSP"/>
3877         <component Cclass="Device" Cgroup="Startup"/>
3878         <category>Getting Started</category>
3879       </attributes>
3880     </example>
3881
3882     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3883       <description>DSP_Lib Signal Convergence example</description>
3884       <board name="uVision Simulator" vendor="Keil"/>
3885       <project>
3886         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3887       </project>
3888       <attributes>
3889         <component Cclass="CMSIS" Cgroup="CORE"/>
3890         <component Cclass="CMSIS" Cgroup="DSP"/>
3891         <component Cclass="Device" Cgroup="Startup"/>
3892         <category>Getting Started</category>
3893       </attributes>
3894     </example>
3895
3896     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3897       <description>DSP_Lib Sinus/Cosinus example</description>
3898       <board name="uVision Simulator" vendor="Keil"/>
3899       <project>
3900         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3901       </project>
3902       <attributes>
3903         <component Cclass="CMSIS" Cgroup="CORE"/>
3904         <component Cclass="CMSIS" Cgroup="DSP"/>
3905         <component Cclass="Device" Cgroup="Startup"/>
3906         <category>Getting Started</category>
3907       </attributes>
3908     </example>
3909
3910     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3911       <description>DSP_Lib Variance example</description>
3912       <board name="uVision Simulator" vendor="Keil"/>
3913       <project>
3914         <environment name="uv" load="arm_variance_example.uvprojx"/>
3915       </project>
3916       <attributes>
3917         <component Cclass="CMSIS" Cgroup="CORE"/>
3918         <component Cclass="CMSIS" Cgroup="DSP"/>
3919         <component Cclass="Device" Cgroup="Startup"/>
3920         <category>Getting Started</category>
3921       </attributes>
3922     </example>
3923
3924     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3925       <description>Neural Network CIFAR10 example</description>
3926       <board name="uVision Simulator" vendor="Keil"/>
3927       <project>
3928         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3929       </project>
3930       <attributes>
3931         <component Cclass="CMSIS" Cgroup="CORE"/>
3932         <component Cclass="CMSIS" Cgroup="DSP"/>
3933         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3934         <component Cclass="Device" Cgroup="Startup"/>
3935         <category>Getting Started</category>
3936       </attributes>
3937     </example>
3938
3939     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3940       <description>Neural Network CIFAR10 example</description>
3941       <board name="EWARM Simulator" vendor="IAR"/>
3942       <project>
3943         <environment name="iar" load="NN-example-cifar10.ewp"/>
3944       </project>
3945       <attributes>
3946         <component Cclass="CMSIS" Cgroup="CORE"/>
3947         <component Cclass="CMSIS" Cgroup="DSP"/>
3948         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3949         <component Cclass="Device" Cgroup="Startup"/>
3950         <category>Getting Started</category>
3951       </attributes>
3952     </example>
3953
3954     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3955       <description>Neural Network GRU example</description>
3956       <board name="uVision Simulator" vendor="Keil"/>
3957       <project>
3958         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3959       </project>
3960       <attributes>
3961         <component Cclass="CMSIS" Cgroup="CORE"/>
3962         <component Cclass="CMSIS" Cgroup="DSP"/>
3963         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3964         <component Cclass="Device" Cgroup="Startup"/>
3965         <category>Getting Started</category>
3966       </attributes>
3967     </example>
3968
3969     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3970       <description>Neural Network GRU example</description>
3971       <board name="EWARM Simulator" vendor="IAR"/>
3972       <project>
3973         <environment name="iar" load="NN-example-gru.ewp"/>
3974       </project>
3975       <attributes>
3976         <component Cclass="CMSIS" Cgroup="CORE"/>
3977         <component Cclass="CMSIS" Cgroup="DSP"/>
3978         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3979         <component Cclass="Device" Cgroup="Startup"/>
3980         <category>Getting Started</category>
3981       </attributes>
3982     </example>
3983
3984     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3985       <description>CMSIS-RTOS2 Blinky example</description>
3986       <board name="uVision Simulator" vendor="Keil"/>
3987       <project>
3988         <environment name="uv" load="Blinky.uvprojx"/>
3989       </project>
3990       <attributes>
3991         <component Cclass="CMSIS" Cgroup="CORE"/>
3992         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3993         <component Cclass="Device" Cgroup="Startup"/>
3994         <category>Getting Started</category>
3995       </attributes>
3996     </example>
3997
3998     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3999       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4000       <board name="uVision Simulator" vendor="Keil"/>
4001       <project>
4002         <environment name="uv" load="Blinky.uvprojx"/>
4003       </project>
4004       <attributes>
4005         <component Cclass="CMSIS" Cgroup="CORE"/>
4006         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4007         <component Cclass="Device" Cgroup="Startup"/>
4008         <category>Getting Started</category>
4009       </attributes>
4010     </example>
4011
4012     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4013       <description>CMSIS-RTOS2 Message Queue Example</description>
4014       <board name="uVision Simulator" vendor="Keil"/>
4015       <project>
4016         <environment name="uv" load="MsqQueue.uvprojx"/>
4017       </project>
4018       <attributes>
4019         <component Cclass="CMSIS" Cgroup="CORE"/>
4020         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4021         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4022         <component Cclass="Device" Cgroup="Startup"/>
4023         <category>Getting Started</category>
4024       </attributes>
4025     </example>
4026
4027     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4028       <description>CMSIS-RTOS2 Memory Pool Example</description>
4029       <board name="uVision Simulator" vendor="Keil"/>
4030       <project>
4031         <environment name="uv" load="MemPool.uvprojx"/>
4032       </project>
4033       <attributes>
4034         <component Cclass="CMSIS" Cgroup="CORE"/>
4035         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4036         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4037         <component Cclass="Device" Cgroup="Startup"/>
4038         <category>Getting Started</category>
4039       </attributes>
4040     </example>
4041
4042     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4043       <description>Bare-metal secure/non-secure example without RTOS</description>
4044       <board name="uVision Simulator" vendor="Keil"/>
4045       <project>
4046         <environment name="uv" load="NoRTOS.uvmpw"/>
4047       </project>
4048       <attributes>
4049         <component Cclass="CMSIS" Cgroup="CORE"/>
4050         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4051         <component Cclass="Device" Cgroup="Startup"/>
4052         <category>Getting Started</category>
4053       </attributes>
4054     </example>
4055
4056     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4057       <description>Secure/non-secure RTOS example with thread context management</description>
4058       <board name="uVision Simulator" vendor="Keil"/>
4059       <project>
4060         <environment name="uv" load="RTOS.uvmpw"/>
4061       </project>
4062       <attributes>
4063         <component Cclass="CMSIS" Cgroup="CORE"/>
4064         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4065         <component Cclass="Device" Cgroup="Startup"/>
4066         <category>Getting Started</category>
4067       </attributes>
4068     </example>
4069
4070     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4071       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4072       <board name="uVision Simulator" vendor="Keil"/>
4073       <project>
4074         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4075       </project>
4076       <attributes>
4077         <component Cclass="CMSIS" Cgroup="CORE"/>
4078         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4079         <component Cclass="Device" Cgroup="Startup"/>
4080         <category>Getting Started</category>
4081       </attributes>
4082     </example>
4083
4084   </examples>
4085
4086 </package>