begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.7.0-dev8">
  12       Active development...
  13       Devices:
  14         - Reworked ARMCM* C-StartUp files.
  15     </release>
  16     <release version="5.7.0-dev7">
  17       Active development...
  18       CMSIS-Core(M): 5.4.0
  19         - Fixed device config define checks.
  20       Devices:
  21         - Enable loop and branch info cache for Armv8.1-MML devices.
  22     </release>
  23     <release version="5.7.0-dev6">
  24       CMSIS-DSP:
  25         - reworked examples
  26     </release>
  27     <release version="5.7.0-dev5">
  28       CMSIS-NN: 1.3.0 (see revision history for details)
  29         - Added MVE support
  30         - Further optimizations for kernels using DSP extension
  31       CMSIS-Driver: 2.8.0
  32         - Added VIO API 0.1.0 (Preview)
  33     </release>
  34     <release version="5.7.0-dev4">
  35       CMSIS-DSP: 1.8.0 (see revision history for details)
  36         - Added new functions and function groups
  37         - Added MVE support
  38     </release>
  39     <release version="5.7.0-dev3">
  40       CMSIS-Core(M): 5.4.0
  41         - L1 Cache functions for Armv7-M and later
  42       Devices:
  43         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  44     </release>
  45     <release version="5.7.0-dev2">
  46       CMSIS-Core(M): 5.4.0
  47         - Cortex-M55 cpu support
  48       Devices:
  49         - ARMCM55 device
  50     </release>
  51     <release version="5.7.0-dev1">
  52       Active development...
  53       CMSIS-Core(M): 5.4.0 (see revision history for details)
  54         - Enhanced MVE support for Armv8.1-MML
  55       CMSIS-RTOS2:
  56         - RTX 5.5.2 (see revision history for details)
  57       CMSIS-Driver: 2.8.0
  58         - removed volatile from status related typedefs in APIs
  59         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  60       CMSIS-Pack: 1.6.1
  61         - added custom attribute to components that require custom implementation
  62       Devices:
  63         - ARMv81MML startup code recognizing __MVE_USED macro
  64         - Refactored vector table references for all Cortex-M devices
  65     </release>
  66     <release version="5.6.0" date="2019-07-10">
  67       CMSIS-Core(M): 5.3.0 (see revision history for details)
  68         - Added provisions for compiler-independent C startup code.
  69       CMSIS-Core(A): 1.1.4 (see revision history for details)
  70         - Fixed __FPU_Enable.
  71       CMSIS-DSP: 1.7.0 (see revision history for details)
  72         - New Neon versions of f32 functions
  73         - Python wrapper
  74         - Preliminary cmake build
  75         - Compilation flags for FFTs
  76         - Changes to arm_math.h
  77       CMSIS-NN: 1.2.0 (see revision history for details)
  78         - New function for depthwise convolution with asymmetric quantization.
  79         - New support functions for requantization.
  80       CMSIS-RTOS:
  81         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  82       CMSIS-RTOS2:
  83         - RTX 5.5.1 (see revision history for details)
  84       CMSIS-Driver: 2.7.1
  85         - WiFi Interface API 1.0.0
  86       Devices:
  87         - Generalized C startup code for all Cortex-M familiy devices.
  88         - Updated Cortex-A default memory regions and MMU configurations
  89         - Moved Cortex-A memory and system config files to avoid include path issues
  90     </release>
  91     <release version="5.5.1" date="2019-03-20">
  92       The following folders are deprecated
  93         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  94
  95       CMSIS-Core(M): 5.2.1 (see revision history for details)
  96         - Fixed compilation issue in cmsis_armclang_ltm.h
  97     </release>
  98     <release version="5.5.0" date="2019-03-18">
  99       The following folders have been removed:
 100         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 101         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 102       The following folders are deprecated
 103         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 104
 105       CMSIS-Core(M): 5.2.0 (see revision history for details)
 106         - Reworked Stack/Heap configuration for ARM startup files.
 107         - Added Cortex-M35P device support.
 108         - Added generic Armv8.1-M Mainline device support.
 109       CMSIS-Core(A): 1.1.3 (see revision history for details)
 110       CMSIS-DSP: 1.6.0 (see revision history for details)
 111         - reworked DSP library source files
 112         - reworked DSP library documentation
 113         - Changed DSP folder structure
 114         - moved DSP libraries to folder ./DSP/Lib
 115         - ARM DSP Libraries are built with ARMCLANG
 116         - Added DSP Libraries Source variant
 117       CMSIS-RTOS2:
 118         - RTX 5.5.0 (see revision history for details)
 119       CMSIS-Driver: 2.7.0
 120         - Added WiFi Interface API 1.0.0-beta
 121         - Added components for project specific driver implementations
 122       CMSIS-Pack: 1.6.0 (see revision history for details)
 123       Devices:
 124         - Added Cortex-M35P and ARMv81MML device templates.
 125         - Fixed C-Startup Code for GCC (aligned with other compilers)
 126       Utilities:
 127         - SVDConv 3.3.25
 128         - PackChk 1.3.82
 129     </release>
 130     <release version="5.4.0" date="2018-08-01">
 131       Aligned pack structure with repository.
 132       The following folders are deprecated:
 133         - CMSIS/Include/
 134         - CMSIS/DSP_Lib/
 135
 136       CMSIS-Core(M): 5.1.2 (see revision history for details)
 137         - Added Cortex-M1 support (beta).
 138       CMSIS-Core(A): 1.1.2 (see revision history for details)
 139       CMSIS-NN: 1.1.0
 140         - Added new math functions.
 141       CMSIS-RTOS2:
 142         - API 2.1.3 (see revision history for details)
 143         - RTX 5.4.0 (see revision history for details)
 144           * Updated exception handling on Cortex-A
 145       CMSIS-Driver:
 146         - Flash Driver API V2.2.0
 147       Utilities:
 148         - SVDConv 3.3.21
 149         - PackChk 1.3.71
 150     </release>
 151     <release version="5.3.0" date="2018-02-22">
 152       Updated Arm company brand.
 153       CMSIS-Core(M): 5.1.1 (see revision history for details)
 154       CMSIS-Core(A): 1.1.1 (see revision history for details)
 155       CMSIS-DAP: 2.0.0 (see revision history for details)
 156       CMSIS-NN: 1.0.0
 157         - Initial contribution of the bare metal Neural Network Library.
 158       CMSIS-RTOS2:
 159         - RTX 5.3.0 (see revision history for details)
 160         - OS Tick API 1.0.1
 161     </release>
 162     <release version="5.2.0" date="2017-11-16">
 163       CMSIS-Core(M): 5.1.0 (see revision history for details)
 164         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 165         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 166       CMSIS-Core(A): 1.1.0 (see revision history for details)
 167         - Added compiler_iccarm.h.
 168         - Added additional access functions for physical timer.
 169       CMSIS-DAP: 1.2.0 (see revision history for details)
 170       CMSIS-DSP: 1.5.2 (see revision history for details)
 171       CMSIS-Driver: 2.6.0 (see revision history for details)
 172         - CAN Driver API V1.2.0
 173         - NAND Driver API V2.3.0
 174       CMSIS-RTOS:
 175         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 176       CMSIS-RTOS2:
 177         - API 2.1.2 (see revision history for details)
 178         - RTX 5.2.3 (see revision history for details)
 179       Devices:
 180         - Added GCC startup and linker script for Cortex-A9.
 181         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 182         - Added IAR startup code for Cortex-A9
 183     </release>
 184     <release version="5.1.1" date="2017-09-19">
 185       CMSIS-RTOS2:
 186       - RTX 5.2.1 (see revision history for details)
 187     </release>
 188     <release version="5.1.0" date="2017-08-04">
 189       CMSIS-Core(M): 5.0.2 (see revision history for details)
 190       - Changed Version Control macros to be core agnostic.
 191       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 192       CMSIS-Core(A): 1.0.0 (see revision history for details)
 193       - Initial release
 194       - IRQ Controller API 1.0.0
 195       CMSIS-Driver: 2.05 (see revision history for details)
 196       - All typedefs related to status have been made volatile.
 197       CMSIS-RTOS2:
 198       - API 2.1.1 (see revision history for details)
 199       - RTX 5.2.0 (see revision history for details)
 200       - OS Tick API 1.0.0
 201       CMSIS-DSP: 1.5.2 (see revision history for details)
 202       - Fixed GNU Compiler specific diagnostics.
 203       CMSIS-Pack: 1.5.0 (see revision history for details)
 204       - added System Description File (*.SDF) Format
 205       CMSIS-Zone: 0.0.1 (Preview)
 206       - Initial specification draft
 207     </release>
 208     <release version="5.0.1" date="2017-02-03">
 209       Package Description:
 210       - added taxonomy for Cclass RTOS
 211       CMSIS-RTOS2:
 212       - API 2.1   (see revision history for details)
 213       - RTX 5.1.0 (see revision history for details)
 214       CMSIS-Core: 5.0.1 (see revision history for details)
 215       - Added __PACKED_STRUCT macro
 216       - Added uVisior support
 217       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 218       - Updated template for secure main function (main_s.c)
 219       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 220       CMSIS-DSP: 1.5.1 (see revision history for details)
 221       - added ARMv8M DSP libraries.
 222       CMSIS-Pack:1.4.9 (see revision history for details)
 223       - added Pack Index File specification and schema file
 224     </release>
 225     <release version="5.0.0" date="2016-11-11">
 226       Changed open source license to Apache 2.0
 227       CMSIS_Core:
 228        - Added support for Cortex-M23 and Cortex-M33.
 229        - Added ARMv8-M device configurations for mainline and baseline.
 230        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 231        - Added cmsis_compiler.h to unify compiler behaviour.
 232        - Updated function SCB_EnableICache (for Cortex-M7).
 233        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 234       CMSIS-RTOS:
 235         - bug fix in RTX 4.82 (see revision history for details)
 236       CMSIS-RTOS2:
 237         - new API including compatibility layer to CMSIS-RTOS
 238         - reference implementation based on RTX5
 239         - supports all Cortex-M variants including TrustZone for ARMv8-M
 240       CMSIS-SVD:
 241        - reworked SVD format documentation
 242        - removed SVD file database documentation as SVD files are distributed in packs
 243        - updated SVDConv for Win32 and Linux
 244       CMSIS-DSP:
 245        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 246        - Added DSP libraries build projects to CMSIS pack.
 247     </release>
 248     <release version="4.5.0" date="2015-10-28">
 249       - CMSIS-Core     4.30.0  (see revision history for details)
 250       - CMSIS-DAP      1.1.0   (unchanged)
 251       - CMSIS-Driver   2.04.0  (see revision history for details)
 252       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 253       - CMSIS-Pack     1.4.1   (see revision history for details)
 254       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 255       - CMSIS-SVD      1.3.1   (see revision history for details)
 256     </release>
 257     <release version="4.4.0" date="2015-09-11">
 258       - CMSIS-Core     4.20   (see revision history for details)
 259       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 260       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 261       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 262       - CMSIS-RTOS
 263         -- API         1.02   (unchanged)
 264         -- RTX         4.79   (see revision history for details)
 265       - CMSIS-SVD      1.3.0  (see revision history for details)
 266       - CMSIS-DAP      1.1.0  (extended with SWO support)
 267     </release>
 268     <release version="4.3.0" date="2015-03-20">
 269       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 270       - CMSIS-DSP      1.4.5  (see revision history for details)
 271       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 272       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 273       - CMSIS-RTOS
 274         -- API         1.02   (unchanged)
 275         -- RTX         4.78   (see revision history for details)
 276       - CMSIS-SVD      1.2    (unchanged)
 277     </release>
 278     <release version="4.2.0" date="2014-09-24">
 279       Adding Cortex-M7 support
 280       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 281       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 282       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 283       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 284       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 285     </release>
 286     <release version="4.1.1" date="2014-06-30">
 287       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 288     </release>
 289     <release version="4.1.0" date="2014-06-12">
 290       - CMSIS-Driver   2.02  (incompatible update)
 291       - CMSIS-Pack     1.3   (see revision history for details)
 292       - CMSIS-DSP      1.4.2 (unchanged)
 293       - CMSIS-Core     3.30  (unchanged)
 294       - CMSIS-RTOS RTX 4.74  (unchanged)
 295       - CMSIS-RTOS API 1.02  (unchanged)
 296       - CMSIS-SVD      1.10  (unchanged)
 297       PACK:
 298       - removed G++ specific files from PACK
 299       - added Component Startup variant "C Startup"
 300       - added Pack Checking Utility
 301       - updated conditions to reflect tool-chain dependency
 302       - added Taxonomy for Graphics
 303       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 304     </release>
 305     <!-- release version="4.0.0">
 306       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 307       - CMSIS-Pack     1.1   Preliminary
 308       - CMSIS-DSP      1.4.2 (see revision history for details)
 309       - CMSIS-Core     3.30  (see revision history for details)
 310       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 311       - CMSIS-RTOS API 1.02  (unchanged)
 312       - CMSIS-SVD      1.10  (unchanged)
 313     </release -->
 314     <release version="3.20.4" date="2014-02-20">
 315       - CMSIS-RTOS 4.74 (see revision history for details)
 316       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 317     </release>
 318     <!-- release version="3.20.3">
 319       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 320       - CMSIS-RTOS 4.73 (see revision history for details)
 321     </release -->
 322     <!-- release version="3.20.2">
 323       - CMSIS-Pack documentation has been added
 324       - CMSIS-Drivers header and documentation have been added to PACK
 325       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 326     </release -->
 327     <!-- release version="3.20.1">
 328       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 329       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 330     </release -->
 331     <!-- release version="3.20.0">
 332       The software portions that are deployed in the application program are now under a BSD license which allows usage
 333       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 334       The individual components have been update as listed below:
 335       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 336       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 337       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 338       - CMSIS-SVD is unchanged.
 339     </release -->
 340   </releases>
 341
 342   <taxonomy>
 343     <description Cclass="Audio">Software components for audio processing</description>
 344     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 345     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 346     <description Cclass="Compiler">Compiler Software Extensions</description>
 347     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 348     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 349     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 350     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 351     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 352     <description Cclass="File System">File Drive Support and File System</description>
 353     <description Cclass="IoT Client">IoT cloud client connector</description>
 354     <description Cclass="IoT Service">IoT specific services</description>
 355     <description Cclass="IoT Utility">IoT specific software utility</description>
 356     <description Cclass="Graphics">Graphical User Interface</description>
 357     <description Cclass="Network">Network Stack using Internet Protocols</description>
 358     <description Cclass="RTOS">Real-time Operating System</description>
 359     <description Cclass="Security">Encryption for secure communication or storage</description>
 360     <description Cclass="USB">Universal Serial Bus Stack</description>
 361     <description Cclass="Utility">Generic software utility components</description>
 362   </taxonomy>
 363
 364   <devices>
 365     <!-- ******************************  Cortex-M0  ****************************** -->
 366     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 367       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 368       <description>
 369 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 370 - simple, easy-to-use programmers model
 371 - highly efficient ultra-low power operation
 372 - excellent code density
 373 - deterministic, high-performance interrupt handling
 374 - upward compatibility with the rest of the Cortex-M processor family.
 375       </description>
 376       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 377       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 378       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 379       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 380
 381       <device Dname="ARMCM0">
 382         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 383         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 384       </device>
 385     </family>
 386
 387     <!-- ******************************  Cortex-M0P  ****************************** -->
 388     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 389       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 390       <description>
 391 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 392 - simple, easy-to-use programmers model
 393 - highly efficient ultra-low power operation
 394 - excellent code density
 395 - deterministic, high-performance interrupt handling
 396 - upward compatibility with the rest of the Cortex-M processor family.
 397       </description>
 398       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 399       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 400       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 401       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 402
 403       <device Dname="ARMCM0P">
 404         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 405         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 406       </device>
 407
 408       <device Dname="ARMCM0P_MPU">
 409         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  Cortex-M1  ****************************** -->
 415     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 416       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 417       <description>
 418 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 419 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 420       </description>
 421       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 422       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 423       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 424       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 425
 426       <device Dname="ARMCM1">
 427         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 428         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 429       </device>
 430     </family>
 431
 432     <!-- ******************************  Cortex-M3  ****************************** -->
 433     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 434       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 435       <description>
 436 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 437 - simple, easy-to-use programmers model
 438 - highly efficient ultra-low power operation
 439 - excellent code density
 440 - deterministic, high-performance interrupt handling
 441 - upward compatibility with the rest of the Cortex-M processor family.
 442       </description>
 443       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 444       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 445       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 446       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 447
 448       <device Dname="ARMCM3">
 449         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 450         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 451       </device>
 452     </family>
 453
 454     <!-- ******************************  Cortex-M4  ****************************** -->
 455     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 456       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 457       <description>
 458 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 459 - simple, easy-to-use programmers model
 460 - highly efficient ultra-low power operation
 461 - excellent code density
 462 - deterministic, high-performance interrupt handling
 463 - upward compatibility with the rest of the Cortex-M processor family.
 464       </description>
 465       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 466       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 467       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 468       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 469
 470       <device Dname="ARMCM4">
 471         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 472         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 473       </device>
 474
 475       <device Dname="ARMCM4_FP">
 476         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 478       </device>
 479     </family>
 480
 481     <!-- ******************************  Cortex-M7  ****************************** -->
 482     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 483       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 484       <description>
 485 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 486 - simple, easy-to-use programmers model
 487 - highly efficient ultra-low power operation
 488 - excellent code density
 489 - deterministic, high-performance interrupt handling
 490 - upward compatibility with the rest of the Cortex-M processor family.
 491       </description>
 492       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 493       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 494       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 495       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 496
 497       <device Dname="ARMCM7">
 498         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 499         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 500       </device>
 501
 502       <device Dname="ARMCM7_SP">
 503         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 504         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 505       </device>
 506
 507       <device Dname="ARMCM7_DP">
 508         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 509         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 510       </device>
 511     </family>
 512
 513     <!-- ******************************  Cortex-M23  ********************** -->
 514     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 515       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 516       <description>
 517 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 518 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 519 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 520       </description>
 521       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 522       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 523       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 524       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 525       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 526       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 527
 528       <device Dname="ARMCM23">
 529         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 530         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 531       </device>
 532
 533       <device Dname="ARMCM23_TZ">
 534         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 535         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 536       </device>
 537     </family>
 538
 539     <!-- ******************************  Cortex-M33  ****************************** -->
 540     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 541       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 542       <description>
 543 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 544 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 545       </description>
 546       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 547       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 548       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 549       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 550       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 551       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 552
 553       <device Dname="ARMCM33">
 554         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 555         <description>
 556           no DSP Instructions, no Floating Point Unit, no TrustZone
 557         </description>
 558         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 559       </device>
 560
 561       <device Dname="ARMCM33_TZ">
 562         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 563         <description>
 564           no DSP Instructions, no Floating Point Unit, TrustZone
 565         </description>
 566         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 567       </device>
 568
 569       <device Dname="ARMCM33_DSP_FP">
 570         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 571         <description>
 572           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 573         </description>
 574         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 575       </device>
 576
 577       <device Dname="ARMCM33_DSP_FP_TZ">
 578         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 579         <description>
 580           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 581         </description>
 582         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 583       </device>
 584     </family>
 585
 586     <!-- ******************************  Cortex-M35P  ****************************** -->
 587     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 588       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 589       <description>
 590 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 591 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 592       </description>
 593
 594       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 595       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 596       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 597       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 598       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 599       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 600
 601       <device Dname="ARMCM35P">
 602         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 603         <description>
 604           no DSP Instructions, no Floating Point Unit, no TrustZone
 605         </description>
 606         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 607       </device>
 608
 609       <device Dname="ARMCM35P_TZ">
 610         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 611         <description>
 612           no DSP Instructions, no Floating Point Unit, TrustZone
 613         </description>
 614         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 615       </device>
 616
 617       <device Dname="ARMCM35P_DSP_FP">
 618         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 619         <description>
 620           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 621         </description>
 622         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 623       </device>
 624
 625       <device Dname="ARMCM35P_DSP_FP_TZ">
 626         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 627         <description>
 628           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 629         </description>
 630         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 631       </device>
 632     </family>
 633
 634     <!-- ******************************  Cortex-M55  ****************************** -->
 635     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 636       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 637       <description>
 638 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 639 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 640 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 641       </description>
 642
 643       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 644       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 645       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 646       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 647       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 648       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 649
 650       <device Dname="ARMCM55">
 651         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 652         <description>
 653           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 654         </description>
 655         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 656       </device>
 657     </family>
 658
 659     <!-- ******************************  ARMSC000  ****************************** -->
 660     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 661       <description>
 662 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 663 - simple, easy-to-use programmers model
 664 - highly efficient ultra-low power operation
 665 - excellent code density
 666 - deterministic, high-performance interrupt handling
 667       </description>
 668       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 669       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 670       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 671       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 672
 673       <device Dname="ARMSC000">
 674         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 675         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 676       </device>
 677     </family>
 678
 679     <!-- ******************************  ARMSC300  ****************************** -->
 680     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 681       <description>
 682 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 683 - simple, easy-to-use programmers model
 684 - highly efficient ultra-low power operation
 685 - excellent code density
 686 - deterministic, high-performance interrupt handling
 687       </description>
 688       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 689       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 690       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 691       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 692
 693       <device Dname="ARMSC300">
 694         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 695         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 696       </device>
 697     </family>
 698
 699     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 700     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 701       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 702       <description>
 703 Armv8-M Baseline based device with TrustZone
 704       </description>
 705       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 706       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 707       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 708       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 709       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 710       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 711
 712       <device Dname="ARMv8MBL">
 713         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 714         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 715       </device>
 716     </family>
 717
 718     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 719     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 720       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 721       <description>
 722 Armv8-M Mainline based device with TrustZone
 723       </description>
 724       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 725       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 726       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 727       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 728       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 729       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 730
 731       <device Dname="ARMv8MML">
 732         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 733         <description>
 734           no DSP Instructions, no Floating Point Unit, TrustZone
 735         </description>
 736         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 737       </device>
 738
 739       <device Dname="ARMv8MML_DSP">
 740         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 741         <description>
 742           DSP Instructions, no Floating Point Unit, TrustZone
 743         </description>
 744         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 745       </device>
 746
 747       <device Dname="ARMv8MML_SP">
 748         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 749         <description>
 750           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 751         </description>
 752         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 753       </device>
 754
 755       <device Dname="ARMv8MML_DSP_SP">
 756         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 757         <description>
 758           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 759         </description>
 760         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 761       </device>
 762
 763       <device Dname="ARMv8MML_DP">
 764         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 765         <description>
 766           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 767         </description>
 768         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 769       </device>
 770
 771       <device Dname="ARMv8MML_DSP_DP">
 772         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 773         <description>
 774           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 775         </description>
 776         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 777       </device>
 778     </family>
 779
 780     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 781     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 782       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 783       <description>
 784 Armv8.1-M Mainline based device with TrustZone and MVE
 785       </description>
 786       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 787       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 788       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 789       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 790       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 791       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 792
 793
 794       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 795         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 796         <description>
 797           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 798         </description>
 799         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 800       </device>
 801     </family>
 802
 803     <!-- ******************************  Cortex-A5  ****************************** -->
 804     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 805       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 806       <description>
 807 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 808 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 809 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 810       </description>
 811
 812       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 813       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 814       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 815       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 816
 817       <device Dname="ARMCA5">
 818         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 819         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 820       </device>
 821     </family>
 822
 823     <!-- ******************************  Cortex-A7  ****************************** -->
 824     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 825       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 826       <description>
 827 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 828 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 829 an optional integrated GIC, and an optional L2 cache controller.
 830       </description>
 831
 832       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 833       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 834       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 835       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 836
 837       <device Dname="ARMCA7">
 838         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 839         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 840       </device>
 841     </family>
 842
 843     <!-- ******************************  Cortex-A9  ****************************** -->
 844     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 845       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 846       <description>
 847 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 848 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 849 and 8-bit Java bytecodes in Jazelle state.
 850       </description>
 851
 852       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 853       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 854       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 855       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 856
 857       <device Dname="ARMCA9">
 858         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 859         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 860       </device>
 861     </family>
 862   </devices>
 863
 864
 865   <apis>
 866     <!-- CMSIS Device API -->
 867     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 868       <description>Device interrupt controller interface</description>
 869       <files>
 870         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 871       </files>
 872     </api>
 873     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 874       <description>RTOS Kernel system tick timer interface</description>
 875       <files>
 876         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 877       </files>
 878     </api>
 879     <!-- CMSIS-RTOS API -->
 880     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 881       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 882       <files>
 883         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 884       </files>
 885     </api>
 886     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 887       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 888       <files>
 889         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 890         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 891       </files>
 892     </api>
 893     <!-- CMSIS Driver API -->
 894     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 895       <description>USART Driver API for Cortex-M</description>
 896       <files>
 897         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 898         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 899       </files>
 900     </api>
 901     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 902       <description>SPI Driver API for Cortex-M</description>
 903       <files>
 904         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 905         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 906       </files>
 907     </api>
 908     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 909       <description>SAI Driver API for Cortex-M</description>
 910       <files>
 911         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 912         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 913       </files>
 914     </api>
 915     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 916       <description>I2C Driver API for Cortex-M</description>
 917       <files>
 918         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 919         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 920       </files>
 921     </api>
 922     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 923       <description>CAN Driver API for Cortex-M</description>
 924       <files>
 925         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 926         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 927       </files>
 928     </api>
 929     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 930       <description>Flash Driver API for Cortex-M</description>
 931       <files>
 932         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 933         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 934       </files>
 935     </api>
 936     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 937       <description>MCI Driver API for Cortex-M</description>
 938       <files>
 939         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 940         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 941       </files>
 942     </api>
 943     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 944       <description>NAND Flash Driver API for Cortex-M</description>
 945       <files>
 946         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 947         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 948       </files>
 949     </api>
 950     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 951       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 952       <files>
 953         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 954         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 955         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 956       </files>
 957     </api>
 958     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 959       <description>Ethernet MAC Driver API for Cortex-M</description>
 960       <files>
 961         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 962         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 963       </files>
 964     </api>
 965     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 966       <description>Ethernet PHY Driver API for Cortex-M</description>
 967       <files>
 968         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 969         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 970       </files>
 971     </api>
 972     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 973       <description>USB Device Driver API for Cortex-M</description>
 974       <files>
 975         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 976         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 977       </files>
 978     </api>
 979     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 980       <description>USB Host Driver API for Cortex-M</description>
 981       <files>
 982         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 983         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 984       </files>
 985     </api>
 986     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 987       <description>WiFi driver</description>
 988       <files>
 989         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 990         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 991       </files>
 992     </api>
 993     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 994       <description>Virtual I/O</description>
 995       <files>
 996         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
 997         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
 998         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
 999       </files>
1000     </api>
1001   </apis>
1002
1003   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1004   <conditions>
1005     <!-- compiler -->
1006     <condition id="ARMCC6">
1007       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1008       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1009     </condition>
1010     <condition id="ARMCC5">
1011       <require Tcompiler="ARMCC" Toptions="AC5"/>
1012     </condition>
1013     <condition id="ARMCC">
1014       <require Tcompiler="ARMCC"/>
1015     </condition>
1016     <condition id="GCC">
1017       <require Tcompiler="GCC"/>
1018     </condition>
1019     <condition id="IAR">
1020       <require Tcompiler="IAR"/>
1021     </condition>
1022     <condition id="ARMCC GCC">
1023       <accept Tcompiler="ARMCC"/>
1024       <accept Tcompiler="GCC"/>
1025     </condition>
1026     <condition id="ARMCC GCC IAR">
1027       <accept Tcompiler="ARMCC"/>
1028       <accept Tcompiler="GCC"/>
1029       <accept Tcompiler="IAR"/>
1030     </condition>
1031
1032     <!-- Arm architecture -->
1033     <condition id="ARMv6-M Device">
1034       <description>Armv6-M architecture based device</description>
1035       <accept Dcore="Cortex-M0"/>
1036       <accept Dcore="Cortex-M1"/>
1037       <accept Dcore="Cortex-M0+"/>
1038       <accept Dcore="SC000"/>
1039     </condition>
1040     <condition id="ARMv7-M Device">
1041       <description>Armv7-M architecture based device</description>
1042       <accept Dcore="Cortex-M3"/>
1043       <accept Dcore="Cortex-M4"/>
1044       <accept Dcore="Cortex-M7"/>
1045       <accept Dcore="SC300"/>
1046     </condition>
1047     <condition id="ARMv8-M Device">
1048       <description>Armv8-M architecture based device</description>
1049       <accept Dcore="ARMV8MBL"/>
1050       <accept Dcore="ARMV8MML"/>
1051       <accept Dcore="ARMV81MML"/>
1052       <accept Dcore="Cortex-M23"/>
1053       <accept Dcore="Cortex-M33"/>
1054       <accept Dcore="Cortex-M35P"/>
1055       <accept Dcore="Cortex-M55"/>
1056     </condition>
1057     <condition id="ARMv6_7-M Device">
1058       <description>Armv6_7-M architecture based device</description>
1059       <accept condition="ARMv6-M Device"/>
1060       <accept condition="ARMv7-M Device"/>
1061     </condition>
1062     <condition id="ARMv6_7_8-M Device">
1063       <description>Armv6_7_8-M architecture based device</description>
1064       <accept condition="ARMv6-M Device"/>
1065       <accept condition="ARMv7-M Device"/>
1066       <accept condition="ARMv8-M Device"/>
1067     </condition>
1068     <condition id="ARMv7-A Device">
1069       <description>Armv7-A architecture based device</description>
1070       <accept Dcore="Cortex-A5"/>
1071       <accept Dcore="Cortex-A7"/>
1072       <accept Dcore="Cortex-A9"/>
1073     </condition>
1074
1075     <condition id="TrustZone">
1076       <description>TrustZone</description>
1077       <require Dtz="TZ"/>
1078     </condition>
1079     <condition id="TZ Secure">
1080       <description>TrustZone (Secure)</description>
1081       <require Dtz="TZ"/>
1082       <require Dsecure="Secure"/>
1083     </condition>
1084     <condition id="TZ Non-secure">
1085       <description>TrustZone (Non-secure)</description>
1086       <require Dtz="TZ"/>
1087       <require Dsecure="Non-secure"/>
1088     </condition>
1089
1090     <!-- ARM core -->
1091     <condition id="CM0">
1092       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1093       <accept Dcore="Cortex-M0"/>
1094       <accept Dcore="Cortex-M0+"/>
1095       <accept Dcore="SC000"/>
1096     </condition>
1097     <condition id="CM1">
1098       <description>Cortex-M1</description>
1099       <require Dcore="Cortex-M1"/>
1100     </condition>
1101     <condition id="CM3">
1102       <description>Cortex-M3 or SC300 processor based device</description>
1103       <accept Dcore="Cortex-M3"/>
1104       <accept Dcore="SC300"/>
1105     </condition>
1106     <condition id="CM4">
1107       <description>Cortex-M4 processor based device</description>
1108       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1109     </condition>
1110     <condition id="CM4_FP">
1111       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1112       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1113       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1114       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1115     </condition>
1116     <condition id="CM7">
1117       <description>Cortex-M7 processor based device</description>
1118       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1119     </condition>
1120     <condition id="CM7_FP">
1121       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1122       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1123       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1124     </condition>
1125     <condition id="CM7_SP">
1126       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1127       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1128     </condition>
1129     <condition id="CM7_DP">
1130       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1131       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1132     </condition>
1133     <condition id="CM23">
1134       <description>Cortex-M23 processor based device</description>
1135       <require Dcore="Cortex-M23"/>
1136     </condition>
1137     <condition id="CM33">
1138       <description>Cortex-M33 processor based device</description>
1139       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1140     </condition>
1141     <condition id="CM33_FP">
1142       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1143       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1144     </condition>
1145     <condition id="CM35P">
1146       <description>Cortex-M35P processor based device</description>
1147       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1148     </condition>
1149     <condition id="CM35P_FP">
1150       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1151       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1152     </condition>
1153     <condition id="ARMv8MBL">
1154       <description>Armv8-M Baseline processor based device</description>
1155       <require Dcore="ARMV8MBL"/>
1156     </condition>
1157     <condition id="ARMv8MML">
1158       <description>Armv8-M Mainline processor based device</description>
1159       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1160     </condition>
1161     <condition id="ARMv8MML_FP">
1162       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1163       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1164       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1165     </condition>
1166
1167     <condition id="CM33_NODSP_NOFPU">
1168       <description>CM33, no DSP, no FPU</description>
1169       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1170     </condition>
1171     <condition id="CM33_DSP_NOFPU">
1172       <description>CM33, DSP, no FPU</description>
1173       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1174     </condition>
1175     <condition id="CM33_NODSP_SP">
1176       <description>CM33, no DSP, SP FPU</description>
1177       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1178     </condition>
1179     <condition id="CM33_DSP_SP">
1180       <description>CM33, DSP, SP FPU</description>
1181       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1182     </condition>
1183
1184     <condition id="CM35P_NODSP_NOFPU">
1185       <description>CM35P, no DSP, no FPU</description>
1186       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1187     </condition>
1188     <condition id="CM35P_DSP_NOFPU">
1189       <description>CM35P, DSP, no FPU</description>
1190       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1191     </condition>
1192     <condition id="CM35P_NODSP_SP">
1193       <description>CM35P, no DSP, SP FPU</description>
1194       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1195     </condition>
1196     <condition id="CM35P_DSP_SP">
1197       <description>CM35P, DSP, SP FPU</description>
1198       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1199     </condition>
1200
1201     <condition id="CM55_NOFPU_NOMVE">
1202       <description>Cortex-M55, no FPU, no MVE</description>
1203       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1204     </condition>
1205     <condition id="CM55_NOFPU_MVE">
1206       <description>Cortex-M55, no FPU, MVE</description>
1207       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1208       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1209     </condition>
1210     <condition id="CM55_FPU">
1211       <description>Cortex-M55, FPU</description>
1212       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1213       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1214     </condition>
1215
1216     <condition id="ARMv8MML_NODSP_NOFPU">
1217       <description>Armv8-M Mainline, no DSP, no FPU</description>
1218       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1219     </condition>
1220     <condition id="ARMv8MML_DSP_NOFPU">
1221       <description>Armv8-M Mainline, DSP, no FPU</description>
1222       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1223     </condition>
1224     <condition id="ARMv8MML_NODSP_SP">
1225       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1226       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1227     </condition>
1228     <condition id="ARMv8MML_DSP_SP">
1229       <description>Armv8-M Mainline, DSP, SP FPU</description>
1230       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1231     </condition>
1232
1233     <condition id="CA5_CA9">
1234       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1235       <accept Dcore="Cortex-A5"/>
1236       <accept Dcore="Cortex-A9"/>
1237     </condition>
1238
1239     <condition id="CA7">
1240       <description>Cortex-A7 processor based device</description>
1241       <accept Dcore="Cortex-A7"/>
1242     </condition>
1243
1244     <!-- ARMCC compiler -->
1245     <condition id="CA_ARMCC5">
1246       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1247       <require condition="ARMv7-A Device"/>
1248       <require condition="ARMCC5"/>
1249     </condition>
1250     <condition id="CA_ARMCC6">
1251       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1252       <require condition="ARMv7-A Device"/>
1253       <require condition="ARMCC6"/>
1254     </condition>
1255
1256     <condition id="CM0_ARMCC">
1257       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1258       <require condition="CM0"/>
1259       <require Tcompiler="ARMCC"/>
1260     </condition>
1261     <condition id="CM0_LE_ARMCC">
1262       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1263       <require condition="CM0_ARMCC"/>
1264       <require Dendian="Little-endian"/>
1265     </condition>
1266     <condition id="CM0_BE_ARMCC">
1267       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1268       <require condition="CM0_ARMCC"/>
1269       <require Dendian="Big-endian"/>
1270     </condition>
1271
1272     <condition id="CM1_ARMCC">
1273       <description>Cortex-M1 based device for the Arm Compiler</description>
1274       <require condition="CM1"/>
1275       <require Tcompiler="ARMCC"/>
1276     </condition>
1277     <condition id="CM1_LE_ARMCC">
1278       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1279       <require condition="CM1_ARMCC"/>
1280       <require Dendian="Little-endian"/>
1281     </condition>
1282     <condition id="CM1_BE_ARMCC">
1283       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1284       <require condition="CM1_ARMCC"/>
1285       <require Dendian="Big-endian"/>
1286     </condition>
1287
1288     <condition id="CM3_ARMCC">
1289       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1290       <require condition="CM3"/>
1291       <require Tcompiler="ARMCC"/>
1292     </condition>
1293     <condition id="CM3_LE_ARMCC">
1294       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1295       <require condition="CM3_ARMCC"/>
1296       <require Dendian="Little-endian"/>
1297     </condition>
1298     <condition id="CM3_BE_ARMCC">
1299       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1300       <require condition="CM3_ARMCC"/>
1301       <require Dendian="Big-endian"/>
1302     </condition>
1303
1304     <condition id="CM4_ARMCC">
1305       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1306       <require condition="CM4"/>
1307       <require Tcompiler="ARMCC"/>
1308     </condition>
1309     <condition id="CM4_LE_ARMCC">
1310       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1311       <require condition="CM4_ARMCC"/>
1312       <require Dendian="Little-endian"/>
1313     </condition>
1314     <condition id="CM4_BE_ARMCC">
1315       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1316       <require condition="CM4_ARMCC"/>
1317       <require Dendian="Big-endian"/>
1318     </condition>
1319
1320     <condition id="CM4_FP_ARMCC">
1321       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1322       <require condition="CM4_FP"/>
1323       <require Tcompiler="ARMCC"/>
1324     </condition>
1325     <condition id="CM4_FP_LE_ARMCC">
1326       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1327       <require condition="CM4_FP_ARMCC"/>
1328       <require Dendian="Little-endian"/>
1329     </condition>
1330     <condition id="CM4_FP_BE_ARMCC">
1331       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1332       <require condition="CM4_FP_ARMCC"/>
1333       <require Dendian="Big-endian"/>
1334     </condition>
1335
1336     <condition id="CM7_ARMCC">
1337       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1338       <require condition="CM7"/>
1339       <require Tcompiler="ARMCC"/>
1340     </condition>
1341     <condition id="CM7_LE_ARMCC">
1342       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1343       <require condition="CM7_ARMCC"/>
1344       <require Dendian="Little-endian"/>
1345     </condition>
1346     <condition id="CM7_BE_ARMCC">
1347       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1348       <require condition="CM7_ARMCC"/>
1349       <require Dendian="Big-endian"/>
1350     </condition>
1351
1352     <condition id="CM7_FP_ARMCC">
1353       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1354       <require condition="CM7_FP"/>
1355       <require Tcompiler="ARMCC"/>
1356     </condition>
1357     <condition id="CM7_FP_LE_ARMCC">
1358       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1359       <require condition="CM7_FP_ARMCC"/>
1360       <require Dendian="Little-endian"/>
1361     </condition>
1362     <condition id="CM7_FP_BE_ARMCC">
1363       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1364       <require condition="CM7_FP_ARMCC"/>
1365       <require Dendian="Big-endian"/>
1366     </condition>
1367
1368     <condition id="CM7_SP_ARMCC">
1369       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1370       <require condition="CM7_SP"/>
1371       <require Tcompiler="ARMCC"/>
1372     </condition>
1373     <condition id="CM7_SP_LE_ARMCC">
1374       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1375       <require condition="CM7_SP_ARMCC"/>
1376       <require Dendian="Little-endian"/>
1377     </condition>
1378     <condition id="CM7_SP_BE_ARMCC">
1379       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1380       <require condition="CM7_SP_ARMCC"/>
1381       <require Dendian="Big-endian"/>
1382     </condition>
1383
1384     <condition id="CM7_DP_ARMCC">
1385       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1386       <require condition="CM7_DP"/>
1387       <require Tcompiler="ARMCC"/>
1388     </condition>
1389     <condition id="CM7_DP_LE_ARMCC">
1390       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1391       <require condition="CM7_DP_ARMCC"/>
1392       <require Dendian="Little-endian"/>
1393     </condition>
1394     <condition id="CM7_DP_BE_ARMCC">
1395       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1396       <require condition="CM7_DP_ARMCC"/>
1397       <require Dendian="Big-endian"/>
1398     </condition>
1399
1400     <condition id="CM23_ARMCC">
1401       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1402       <require condition="CM23"/>
1403       <require Tcompiler="ARMCC"/>
1404     </condition>
1405     <condition id="CM23_LE_ARMCC">
1406       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1407       <require condition="CM23_ARMCC"/>
1408       <require Dendian="Little-endian"/>
1409     </condition>
1410
1411     <condition id="CM33_ARMCC">
1412       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1413       <require condition="CM33"/>
1414       <require Tcompiler="ARMCC"/>
1415     </condition>
1416     <condition id="CM33_LE_ARMCC">
1417       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1418       <require condition="CM33_ARMCC"/>
1419       <require Dendian="Little-endian"/>
1420     </condition>
1421
1422     <condition id="CM33_FP_ARMCC">
1423       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1424       <require condition="CM33_FP"/>
1425       <require Tcompiler="ARMCC"/>
1426     </condition>
1427     <condition id="CM33_FP_LE_ARMCC">
1428       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1429       <require condition="CM33_FP_ARMCC"/>
1430       <require Dendian="Little-endian"/>
1431     </condition>
1432
1433     <condition id="CM33_NODSP_NOFPU_ARMCC">
1434       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1435       <require condition="CM33_NODSP_NOFPU"/>
1436       <require Tcompiler="ARMCC"/>
1437     </condition>
1438     <condition id="CM33_DSP_NOFPU_ARMCC">
1439       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1440       <require condition="CM33_DSP_NOFPU"/>
1441       <require Tcompiler="ARMCC"/>
1442     </condition>
1443     <condition id="CM33_NODSP_SP_ARMCC">
1444       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1445       <require condition="CM33_NODSP_SP"/>
1446       <require Tcompiler="ARMCC"/>
1447     </condition>
1448     <condition id="CM33_DSP_SP_ARMCC">
1449       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1450       <require condition="CM33_DSP_SP"/>
1451       <require Tcompiler="ARMCC"/>
1452     </condition>
1453     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1454       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1455       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1456       <require Dendian="Little-endian"/>
1457     </condition>
1458     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1459       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1460       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1461       <require Dendian="Little-endian"/>
1462     </condition>
1463     <condition id="CM33_NODSP_SP_LE_ARMCC">
1464       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1465       <require condition="CM33_NODSP_SP_ARMCC"/>
1466       <require Dendian="Little-endian"/>
1467     </condition>
1468     <condition id="CM33_DSP_SP_LE_ARMCC">
1469       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1470       <require condition="CM33_DSP_SP_ARMCC"/>
1471       <require Dendian="Little-endian"/>
1472     </condition>
1473
1474     <condition id="CM35P_ARMCC">
1475       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1476       <require condition="CM35P"/>
1477       <require Tcompiler="ARMCC"/>
1478     </condition>
1479     <condition id="CM35P_LE_ARMCC">
1480       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1481       <require condition="CM35P_ARMCC"/>
1482       <require Dendian="Little-endian"/>
1483     </condition>
1484
1485     <condition id="CM35P_FP_ARMCC">
1486       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1487       <require condition="CM35P_FP"/>
1488       <require Tcompiler="ARMCC"/>
1489     </condition>
1490     <condition id="CM35P_FP_LE_ARMCC">
1491       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1492       <require condition="CM35P_FP_ARMCC"/>
1493       <require Dendian="Little-endian"/>
1494     </condition>
1495
1496     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1497       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1498       <require condition="CM35P_NODSP_NOFPU"/>
1499       <require Tcompiler="ARMCC"/>
1500     </condition>
1501     <condition id="CM35P_DSP_NOFPU_ARMCC">
1502       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1503       <require condition="CM35P_DSP_NOFPU"/>
1504       <require Tcompiler="ARMCC"/>
1505     </condition>
1506     <condition id="CM35P_NODSP_SP_ARMCC">
1507       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1508       <require condition="CM35P_NODSP_SP"/>
1509       <require Tcompiler="ARMCC"/>
1510     </condition>
1511     <condition id="CM35P_DSP_SP_ARMCC">
1512       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1513       <require condition="CM35P_DSP_SP"/>
1514       <require Tcompiler="ARMCC"/>
1515     </condition>
1516     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1517       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1518       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1519       <require Dendian="Little-endian"/>
1520     </condition>
1521     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1522       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1523       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1524       <require Dendian="Little-endian"/>
1525     </condition>
1526     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1527       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1528       <require condition="CM35P_NODSP_SP_ARMCC"/>
1529       <require Dendian="Little-endian"/>
1530     </condition>
1531     <condition id="CM35P_DSP_SP_LE_ARMCC">
1532       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1533       <require condition="CM35P_DSP_SP_ARMCC"/>
1534       <require Dendian="Little-endian"/>
1535     </condition>
1536
1537     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1538       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1539       <require condition="CM55_NOFPU_NOMVE"/>
1540       <require Tcompiler="ARMCC"/>
1541     </condition>
1542     <condition id="CM55_NOFPU_MVE_ARMCC">
1543       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1544       <require condition="CM55_NOFPU_MVE"/>
1545       <require Tcompiler="ARMCC"/>
1546     </condition>
1547     <condition id="CM55_FPU_ARMCC">
1548       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1549       <require condition="CM55_FPU"/>
1550       <require Tcompiler="ARMCC"/>
1551     </condition>
1552     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1553       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1554       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1555       <require Dendian="Little-endian"/>
1556     </condition>
1557     <condition id="CM55_FPU_LE_ARMCC">
1558       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1559       <require condition="CM55_FPU_ARMCC"/>
1560       <require Dendian="Little-endian"/>
1561     </condition>
1562
1563     <condition id="ARMv8MBL_ARMCC">
1564       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1565       <require condition="ARMv8MBL"/>
1566       <require Tcompiler="ARMCC"/>
1567     </condition>
1568     <condition id="ARMv8MBL_LE_ARMCC">
1569       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1570       <require condition="ARMv8MBL_ARMCC"/>
1571       <require Dendian="Little-endian"/>
1572     </condition>
1573
1574     <condition id="ARMv8MML_ARMCC">
1575       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1576       <require condition="ARMv8MML"/>
1577       <require Tcompiler="ARMCC"/>
1578     </condition>
1579     <condition id="ARMv8MML_LE_ARMCC">
1580       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1581       <require condition="ARMv8MML_ARMCC"/>
1582       <require Dendian="Little-endian"/>
1583     </condition>
1584
1585     <condition id="ARMv8MML_FP_ARMCC">
1586       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1587       <require condition="ARMv8MML_FP"/>
1588       <require Tcompiler="ARMCC"/>
1589     </condition>
1590     <condition id="ARMv8MML_FP_LE_ARMCC">
1591       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1592       <require condition="ARMv8MML_FP_ARMCC"/>
1593       <require Dendian="Little-endian"/>
1594     </condition>
1595
1596     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1597       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1598       <require condition="ARMv8MML_NODSP_NOFPU"/>
1599       <require Tcompiler="ARMCC"/>
1600     </condition>
1601     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1602       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1603       <require condition="ARMv8MML_DSP_NOFPU"/>
1604       <require Tcompiler="ARMCC"/>
1605     </condition>
1606     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1607       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1608       <require condition="ARMv8MML_NODSP_SP"/>
1609       <require Tcompiler="ARMCC"/>
1610     </condition>
1611     <condition id="ARMv8MML_DSP_SP_ARMCC">
1612       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1613       <require condition="ARMv8MML_DSP_SP"/>
1614       <require Tcompiler="ARMCC"/>
1615     </condition>
1616     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1617       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1618       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1619       <require Dendian="Little-endian"/>
1620     </condition>
1621     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1622       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1623       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1624       <require Dendian="Little-endian"/>
1625     </condition>
1626     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1627       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1628       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1629       <require Dendian="Little-endian"/>
1630     </condition>
1631     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1632       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1633       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1634       <require Dendian="Little-endian"/>
1635     </condition>
1636
1637     <!-- GCC compiler -->
1638     <condition id="CA_GCC">
1639       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1640       <require condition="ARMv7-A Device"/>
1641       <require Tcompiler="GCC"/>
1642     </condition>
1643
1644     <condition id="CM0_GCC">
1645       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1646       <require condition="CM0"/>
1647       <require Tcompiler="GCC"/>
1648     </condition>
1649     <condition id="CM0_LE_GCC">
1650       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1651       <require condition="CM0_GCC"/>
1652       <require Dendian="Little-endian"/>
1653     </condition>
1654     <condition id="CM0_BE_GCC">
1655       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1656       <require condition="CM0_GCC"/>
1657       <require Dendian="Big-endian"/>
1658     </condition>
1659
1660     <condition id="CM1_GCC">
1661       <description>Cortex-M1 based device for the GCC Compiler</description>
1662       <require condition="CM1"/>
1663       <require Tcompiler="GCC"/>
1664     </condition>
1665     <condition id="CM1_LE_GCC">
1666       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1667       <require condition="CM1_GCC"/>
1668       <require Dendian="Little-endian"/>
1669     </condition>
1670     <condition id="CM1_BE_GCC">
1671       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1672       <require condition="CM1_GCC"/>
1673       <require Dendian="Big-endian"/>
1674     </condition>
1675
1676     <condition id="CM3_GCC">
1677       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1678       <require condition="CM3"/>
1679       <require Tcompiler="GCC"/>
1680     </condition>
1681     <condition id="CM3_LE_GCC">
1682       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1683       <require condition="CM3_GCC"/>
1684       <require Dendian="Little-endian"/>
1685     </condition>
1686     <condition id="CM3_BE_GCC">
1687       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1688       <require condition="CM3_GCC"/>
1689       <require Dendian="Big-endian"/>
1690     </condition>
1691
1692     <condition id="CM4_GCC">
1693       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1694       <require condition="CM4"/>
1695       <require Tcompiler="GCC"/>
1696     </condition>
1697     <condition id="CM4_LE_GCC">
1698       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1699       <require condition="CM4_GCC"/>
1700       <require Dendian="Little-endian"/>
1701     </condition>
1702     <condition id="CM4_BE_GCC">
1703       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1704       <require condition="CM4_GCC"/>
1705       <require Dendian="Big-endian"/>
1706     </condition>
1707
1708     <condition id="CM4_FP_GCC">
1709       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1710       <require condition="CM4_FP"/>
1711       <require Tcompiler="GCC"/>
1712     </condition>
1713     <condition id="CM4_FP_LE_GCC">
1714       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1715       <require condition="CM4_FP_GCC"/>
1716       <require Dendian="Little-endian"/>
1717     </condition>
1718     <condition id="CM4_FP_BE_GCC">
1719       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1720       <require condition="CM4_FP_GCC"/>
1721       <require Dendian="Big-endian"/>
1722     </condition>
1723
1724     <condition id="CM7_GCC">
1725       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1726       <require condition="CM7"/>
1727       <require Tcompiler="GCC"/>
1728     </condition>
1729     <condition id="CM7_LE_GCC">
1730       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1731       <require condition="CM7_GCC"/>
1732       <require Dendian="Little-endian"/>
1733     </condition>
1734     <condition id="CM7_BE_GCC">
1735       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1736       <require condition="CM7_GCC"/>
1737       <require Dendian="Big-endian"/>
1738     </condition>
1739
1740     <condition id="CM7_FP_GCC">
1741       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1742       <require condition="CM7_FP"/>
1743       <require Tcompiler="GCC"/>
1744     </condition>
1745     <condition id="CM7_FP_LE_GCC">
1746       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1747       <require condition="CM7_FP_GCC"/>
1748       <require Dendian="Little-endian"/>
1749     </condition>
1750     <condition id="CM7_FP_BE_GCC">
1751       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1752       <require condition="CM7_FP_GCC"/>
1753       <require Dendian="Big-endian"/>
1754     </condition>
1755
1756     <condition id="CM7_SP_GCC">
1757       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1758       <require condition="CM7_SP"/>
1759       <require Tcompiler="GCC"/>
1760     </condition>
1761     <condition id="CM7_SP_LE_GCC">
1762       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1763       <require condition="CM7_SP_GCC"/>
1764       <require Dendian="Little-endian"/>
1765     </condition>
1766
1767     <condition id="CM7_DP_GCC">
1768       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1769       <require condition="CM7_DP"/>
1770       <require Tcompiler="GCC"/>
1771     </condition>
1772     <condition id="CM7_DP_LE_GCC">
1773       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1774       <require condition="CM7_DP_GCC"/>
1775       <require Dendian="Little-endian"/>
1776     </condition>
1777
1778     <condition id="CM23_GCC">
1779       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1780       <require condition="CM23"/>
1781       <require Tcompiler="GCC"/>
1782     </condition>
1783     <condition id="CM23_LE_GCC">
1784       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1785       <require condition="CM23_GCC"/>
1786       <require Dendian="Little-endian"/>
1787     </condition>
1788
1789     <condition id="CM33_GCC">
1790       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1791       <require condition="CM33"/>
1792       <require Tcompiler="GCC"/>
1793     </condition>
1794     <condition id="CM33_LE_GCC">
1795       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1796       <require condition="CM33_GCC"/>
1797       <require Dendian="Little-endian"/>
1798     </condition>
1799
1800     <condition id="CM33_FP_GCC">
1801       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1802       <require condition="CM33_FP"/>
1803       <require Tcompiler="GCC"/>
1804     </condition>
1805     <condition id="CM33_FP_LE_GCC">
1806       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1807       <require condition="CM33_FP_GCC"/>
1808       <require Dendian="Little-endian"/>
1809     </condition>
1810
1811     <condition id="CM33_NODSP_NOFPU_GCC">
1812       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1813       <require condition="CM33_NODSP_NOFPU"/>
1814       <require Tcompiler="GCC"/>
1815     </condition>
1816     <condition id="CM33_DSP_NOFPU_GCC">
1817       <description>CM33, DSP, no FPU, GCC Compiler</description>
1818       <require condition="CM33_DSP_NOFPU"/>
1819       <require Tcompiler="GCC"/>
1820     </condition>
1821     <condition id="CM33_NODSP_SP_GCC">
1822       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1823       <require condition="CM33_NODSP_SP"/>
1824       <require Tcompiler="GCC"/>
1825     </condition>
1826     <condition id="CM33_DSP_SP_GCC">
1827       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1828       <require condition="CM33_DSP_SP"/>
1829       <require Tcompiler="GCC"/>
1830     </condition>
1831     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1832       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1833       <require condition="CM33_NODSP_NOFPU_GCC"/>
1834       <require Dendian="Little-endian"/>
1835     </condition>
1836     <condition id="CM33_DSP_NOFPU_LE_GCC">
1837       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1838       <require condition="CM33_DSP_NOFPU_GCC"/>
1839       <require Dendian="Little-endian"/>
1840     </condition>
1841     <condition id="CM33_NODSP_SP_LE_GCC">
1842       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1843       <require condition="CM33_NODSP_SP_GCC"/>
1844       <require Dendian="Little-endian"/>
1845     </condition>
1846     <condition id="CM33_DSP_SP_LE_GCC">
1847       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1848       <require condition="CM33_DSP_SP_GCC"/>
1849       <require Dendian="Little-endian"/>
1850     </condition>
1851
1852     <condition id="CM35P_GCC">
1853       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1854       <require condition="CM35P"/>
1855       <require Tcompiler="GCC"/>
1856     </condition>
1857     <condition id="CM35P_LE_GCC">
1858       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1859       <require condition="CM35P_GCC"/>
1860       <require Dendian="Little-endian"/>
1861     </condition>
1862
1863     <condition id="CM35P_FP_GCC">
1864       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1865       <require condition="CM35P_FP"/>
1866       <require Tcompiler="GCC"/>
1867     </condition>
1868     <condition id="CM35P_FP_LE_GCC">
1869       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1870       <require condition="CM35P_FP_GCC"/>
1871       <require Dendian="Little-endian"/>
1872     </condition>
1873
1874     <condition id="CM35P_NODSP_NOFPU_GCC">
1875       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1876       <require condition="CM35P_NODSP_NOFPU"/>
1877       <require Tcompiler="GCC"/>
1878     </condition>
1879     <condition id="CM35P_DSP_NOFPU_GCC">
1880       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1881       <require condition="CM35P_DSP_NOFPU"/>
1882       <require Tcompiler="GCC"/>
1883     </condition>
1884     <condition id="CM35P_NODSP_SP_GCC">
1885       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1886       <require condition="CM35P_NODSP_SP"/>
1887       <require Tcompiler="GCC"/>
1888     </condition>
1889     <condition id="CM35P_DSP_SP_GCC">
1890       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1891       <require condition="CM35P_DSP_SP"/>
1892       <require Tcompiler="GCC"/>
1893     </condition>
1894     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1895       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1896       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1897       <require Dendian="Little-endian"/>
1898     </condition>
1899     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1900       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1901       <require condition="CM35P_DSP_NOFPU_GCC"/>
1902       <require Dendian="Little-endian"/>
1903     </condition>
1904     <condition id="CM35P_NODSP_SP_LE_GCC">
1905       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1906       <require condition="CM35P_NODSP_SP_GCC"/>
1907       <require Dendian="Little-endian"/>
1908     </condition>
1909     <condition id="CM35P_DSP_SP_LE_GCC">
1910       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1911       <require condition="CM35P_DSP_SP_GCC"/>
1912       <require Dendian="Little-endian"/>
1913     </condition>
1914
1915     <condition id="CM55_NOFPU_NOMVE_GCC">
1916       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1917       <require condition="CM55_NOFPU_NOMVE"/>
1918       <require Tcompiler="GCC"/>
1919     </condition>
1920     <condition id="CM55_NOFPU_MVE_GCC">
1921       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1922       <require condition="CM55_NOFPU_MVE"/>
1923       <require Tcompiler="GCC"/>
1924     </condition>
1925     <condition id="CM55_FPU_GCC">
1926       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1927       <require condition="CM55_FPU"/>
1928       <require Tcompiler="GCC"/>
1929     </condition>
1930     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1931       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1932       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1933       <require Dendian="Little-endian"/>
1934     </condition>
1935     <condition id="CM55_FPU_LE_GCC">
1936       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1937       <require condition="CM55_FPU_GCC"/>
1938       <require Dendian="Little-endian"/>
1939     </condition>
1940
1941     <condition id="ARMv8MBL_GCC">
1942       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1943       <require condition="ARMv8MBL"/>
1944       <require Tcompiler="GCC"/>
1945     </condition>
1946     <condition id="ARMv8MBL_LE_GCC">
1947       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1948       <require condition="ARMv8MBL_GCC"/>
1949       <require Dendian="Little-endian"/>
1950     </condition>
1951
1952     <condition id="ARMv8MML_GCC">
1953       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1954       <require condition="ARMv8MML"/>
1955       <require Tcompiler="GCC"/>
1956     </condition>
1957     <condition id="ARMv8MML_LE_GCC">
1958       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1959       <require condition="ARMv8MML_GCC"/>
1960       <require Dendian="Little-endian"/>
1961     </condition>
1962
1963     <condition id="ARMv8MML_FP_GCC">
1964       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1965       <require condition="ARMv8MML_FP"/>
1966       <require Tcompiler="GCC"/>
1967     </condition>
1968     <condition id="ARMv8MML_FP_LE_GCC">
1969       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1970       <require condition="ARMv8MML_FP_GCC"/>
1971       <require Dendian="Little-endian"/>
1972     </condition>
1973
1974     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1975       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1976       <require condition="ARMv8MML_NODSP_NOFPU"/>
1977       <require Tcompiler="GCC"/>
1978     </condition>
1979     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1980       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1981       <require condition="ARMv8MML_DSP_NOFPU"/>
1982       <require Tcompiler="GCC"/>
1983     </condition>
1984     <condition id="ARMv8MML_NODSP_SP_GCC">
1985       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1986       <require condition="ARMv8MML_NODSP_SP"/>
1987       <require Tcompiler="GCC"/>
1988     </condition>
1989     <condition id="ARMv8MML_DSP_SP_GCC">
1990       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1991       <require condition="ARMv8MML_DSP_SP"/>
1992       <require Tcompiler="GCC"/>
1993     </condition>
1994     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1995       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1996       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1997       <require Dendian="Little-endian"/>
1998     </condition>
1999     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
2000       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
2001       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
2002       <require Dendian="Little-endian"/>
2003     </condition>
2004     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
2005       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
2006       <require condition="ARMv8MML_NODSP_SP_GCC"/>
2007       <require Dendian="Little-endian"/>
2008     </condition>
2009     <condition id="ARMv8MML_DSP_SP_LE_GCC">
2010       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
2011       <require condition="ARMv8MML_DSP_SP_GCC"/>
2012       <require Dendian="Little-endian"/>
2013     </condition>
2014
2015     <!-- IAR compiler -->
2016     <condition id="CA_IAR">
2017       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
2018       <require condition="ARMv7-A Device"/>
2019       <require Tcompiler="IAR"/>
2020     </condition>
2021
2022     <condition id="CM0_IAR">
2023       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
2024       <require condition="CM0"/>
2025       <require Tcompiler="IAR"/>
2026     </condition>
2027     <condition id="CM0_LE_IAR">
2028       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
2029       <require condition="CM0_IAR"/>
2030       <require Dendian="Little-endian"/>
2031     </condition>
2032     <condition id="CM0_BE_IAR">
2033       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
2034       <require condition="CM0_IAR"/>
2035       <require Dendian="Big-endian"/>
2036     </condition>
2037
2038     <condition id="CM1_IAR">
2039       <description>Cortex-M1 based device for the IAR Compiler</description>
2040       <require condition="CM1"/>
2041       <require Tcompiler="IAR"/>
2042     </condition>
2043     <condition id="CM1_LE_IAR">
2044       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
2045       <require condition="CM1_IAR"/>
2046       <require Dendian="Little-endian"/>
2047     </condition>
2048     <condition id="CM1_BE_IAR">
2049       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
2050       <require condition="CM1_IAR"/>
2051       <require Dendian="Big-endian"/>
2052     </condition>
2053
2054     <condition id="CM3_IAR">
2055       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
2056       <require condition="CM3"/>
2057       <require Tcompiler="IAR"/>
2058     </condition>
2059     <condition id="CM3_LE_IAR">
2060       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
2061       <require condition="CM3_IAR"/>
2062       <require Dendian="Little-endian"/>
2063     </condition>
2064     <condition id="CM3_BE_IAR">
2065       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
2066       <require condition="CM3_IAR"/>
2067       <require Dendian="Big-endian"/>
2068     </condition>
2069
2070     <condition id="CM4_IAR">
2071       <description>Cortex-M4 processor based device for the IAR Compiler</description>
2072       <require condition="CM4"/>
2073       <require Tcompiler="IAR"/>
2074     </condition>
2075     <condition id="CM4_LE_IAR">
2076       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
2077       <require condition="CM4_IAR"/>
2078       <require Dendian="Little-endian"/>
2079     </condition>
2080     <condition id="CM4_BE_IAR">
2081       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
2082       <require condition="CM4_IAR"/>
2083       <require Dendian="Big-endian"/>
2084     </condition>
2085
2086     <condition id="CM4_FP_IAR">
2087       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2088       <require condition="CM4_FP"/>
2089       <require Tcompiler="IAR"/>
2090     </condition>
2091     <condition id="CM4_FP_LE_IAR">
2092       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2093       <require condition="CM4_FP_IAR"/>
2094       <require Dendian="Little-endian"/>
2095     </condition>
2096     <condition id="CM4_FP_BE_IAR">
2097       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2098       <require condition="CM4_FP_IAR"/>
2099       <require Dendian="Big-endian"/>
2100     </condition>
2101
2102     <condition id="CM7_IAR">
2103       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2104       <require condition="CM7"/>
2105       <require Tcompiler="IAR"/>
2106     </condition>
2107     <condition id="CM7_LE_IAR">
2108       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2109       <require condition="CM7_IAR"/>
2110       <require Dendian="Little-endian"/>
2111     </condition>
2112     <condition id="CM7_BE_IAR">
2113       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2114       <require condition="CM7_IAR"/>
2115       <require Dendian="Big-endian"/>
2116     </condition>
2117
2118     <condition id="CM7_FP_IAR">
2119       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2120       <require condition="CM7_FP"/>
2121       <require Tcompiler="IAR"/>
2122     </condition>
2123     <condition id="CM7_FP_LE_IAR">
2124       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2125       <require condition="CM7_FP_IAR"/>
2126       <require Dendian="Little-endian"/>
2127     </condition>
2128     <condition id="CM7_FP_BE_IAR">
2129       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2130       <require condition="CM7_FP_IAR"/>
2131       <require Dendian="Big-endian"/>
2132     </condition>
2133
2134     <condition id="CM7_SP_IAR">
2135       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2136       <require condition="CM7_SP"/>
2137       <require Tcompiler="IAR"/>
2138     </condition>
2139     <condition id="CM7_SP_LE_IAR">
2140       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2141       <require condition="CM7_SP_IAR"/>
2142       <require Dendian="Little-endian"/>
2143     </condition>
2144     <condition id="CM7_SP_BE_IAR">
2145       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2146       <require condition="CM7_SP_IAR"/>
2147       <require Dendian="Big-endian"/>
2148     </condition>
2149
2150     <condition id="CM7_DP_IAR">
2151       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2152       <require condition="CM7_DP"/>
2153       <require Tcompiler="IAR"/>
2154     </condition>
2155     <condition id="CM7_DP_LE_IAR">
2156       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2157       <require condition="CM7_DP_IAR"/>
2158       <require Dendian="Little-endian"/>
2159     </condition>
2160     <condition id="CM7_DP_BE_IAR">
2161       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2162       <require condition="CM7_DP_IAR"/>
2163       <require Dendian="Big-endian"/>
2164     </condition>
2165
2166     <condition id="CM23_IAR">
2167       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2168       <require condition="CM23"/>
2169       <require Tcompiler="IAR"/>
2170     </condition>
2171     <condition id="CM23_LE_IAR">
2172       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2173       <require condition="CM23_IAR"/>
2174       <require Dendian="Little-endian"/>
2175     </condition>
2176
2177     <condition id="CM33_IAR">
2178       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2179       <require condition="CM33"/>
2180       <require Tcompiler="IAR"/>
2181     </condition>
2182     <condition id="CM33_LE_IAR">
2183       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2184       <require condition="CM33_IAR"/>
2185       <require Dendian="Little-endian"/>
2186     </condition>
2187
2188     <condition id="CM33_FP_IAR">
2189       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2190       <require condition="CM33_FP"/>
2191       <require Tcompiler="IAR"/>
2192     </condition>
2193     <condition id="CM33_FP_LE_IAR">
2194       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2195       <require condition="CM33_FP_IAR"/>
2196       <require Dendian="Little-endian"/>
2197     </condition>
2198
2199     <condition id="CM33_NODSP_NOFPU_IAR">
2200       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2201       <require condition="CM33_NODSP_NOFPU"/>
2202       <require Tcompiler="IAR"/>
2203     </condition>
2204     <condition id="CM33_DSP_NOFPU_IAR">
2205       <description>CM33, DSP, no FPU, IAR Compiler</description>
2206       <require condition="CM33_DSP_NOFPU"/>
2207       <require Tcompiler="IAR"/>
2208     </condition>
2209     <condition id="CM33_NODSP_SP_IAR">
2210       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2211       <require condition="CM33_NODSP_SP"/>
2212       <require Tcompiler="IAR"/>
2213     </condition>
2214     <condition id="CM33_DSP_SP_IAR">
2215       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2216       <require condition="CM33_DSP_SP"/>
2217       <require Tcompiler="IAR"/>
2218     </condition>
2219     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2220       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2221       <require condition="CM33_NODSP_NOFPU_IAR"/>
2222       <require Dendian="Little-endian"/>
2223     </condition>
2224     <condition id="CM33_DSP_NOFPU_LE_IAR">
2225       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2226       <require condition="CM33_DSP_NOFPU_IAR"/>
2227       <require Dendian="Little-endian"/>
2228     </condition>
2229     <condition id="CM33_NODSP_SP_LE_IAR">
2230       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2231       <require condition="CM33_NODSP_SP_IAR"/>
2232       <require Dendian="Little-endian"/>
2233     </condition>
2234     <condition id="CM33_DSP_SP_LE_IAR">
2235       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2236       <require condition="CM33_DSP_SP_IAR"/>
2237       <require Dendian="Little-endian"/>
2238     </condition>
2239
2240     <condition id="CM35P_IAR">
2241       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2242       <require condition="CM35P"/>
2243       <require Tcompiler="IAR"/>
2244     </condition>
2245     <condition id="CM35P_LE_IAR">
2246       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2247       <require condition="CM35P_IAR"/>
2248       <require Dendian="Little-endian"/>
2249     </condition>
2250
2251     <condition id="CM35P_FP_IAR">
2252       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2253       <require condition="CM35P_FP"/>
2254       <require Tcompiler="IAR"/>
2255     </condition>
2256     <condition id="CM35P_FP_LE_IAR">
2257       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2258       <require condition="CM35P_FP_IAR"/>
2259       <require Dendian="Little-endian"/>
2260     </condition>
2261
2262     <condition id="CM35P_NODSP_NOFPU_IAR">
2263       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2264       <require condition="CM35P_NODSP_NOFPU"/>
2265       <require Tcompiler="IAR"/>
2266     </condition>
2267     <condition id="CM35P_DSP_NOFPU_IAR">
2268       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2269       <require condition="CM35P_DSP_NOFPU"/>
2270       <require Tcompiler="IAR"/>
2271     </condition>
2272     <condition id="CM35P_NODSP_SP_IAR">
2273       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2274       <require condition="CM35P_NODSP_SP"/>
2275       <require Tcompiler="IAR"/>
2276     </condition>
2277     <condition id="CM35P_DSP_SP_IAR">
2278       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2279       <require condition="CM35P_DSP_SP"/>
2280       <require Tcompiler="IAR"/>
2281     </condition>
2282     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2283       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2284       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2285       <require Dendian="Little-endian"/>
2286     </condition>
2287     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2288       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2289       <require condition="CM35P_DSP_NOFPU_IAR"/>
2290       <require Dendian="Little-endian"/>
2291     </condition>
2292     <condition id="CM35P_NODSP_SP_LE_IAR">
2293       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2294       <require condition="CM35P_NODSP_SP_IAR"/>
2295       <require Dendian="Little-endian"/>
2296     </condition>
2297     <condition id="CM35P_DSP_SP_LE_IAR">
2298       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2299       <require condition="CM35P_DSP_SP_IAR"/>
2300       <require Dendian="Little-endian"/>
2301     </condition>
2302
2303     <condition id="CM55_NOFPU_NOMVE_IAR">
2304       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
2305       <require condition="CM55_NOFPU_NOMVE"/>
2306       <require Tcompiler="IAR"/>
2307     </condition>
2308     <condition id="CM55_NOFPU_MVE_IAR">
2309       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
2310       <require condition="CM55_NOFPU_MVE"/>
2311       <require Tcompiler="IAR"/>
2312     </condition>
2313     <condition id="CM55_FPU_IAR">
2314       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
2315       <require condition="CM55_FPU"/>
2316       <require Tcompiler="IAR"/>
2317     </condition>
2318     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
2319       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
2320       <require condition="CM55_NOFPU_NOMVE_IAR"/>
2321       <require Dendian="Little-endian"/>
2322     </condition>
2323     <condition id="CM55_FPU_LE_IAR">
2324       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
2325       <require condition="CM55_FPU_IAR"/>
2326       <require Dendian="Little-endian"/>
2327     </condition>
2328
2329     <condition id="ARMv8MBL_IAR">
2330       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2331       <require condition="ARMv8MBL"/>
2332       <require Tcompiler="IAR"/>
2333     </condition>
2334     <condition id="ARMv8MBL_LE_IAR">
2335       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2336       <require condition="ARMv8MBL_IAR"/>
2337       <require Dendian="Little-endian"/>
2338     </condition>
2339
2340     <condition id="ARMv8MML_IAR">
2341       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2342       <require condition="ARMv8MML"/>
2343       <require Tcompiler="IAR"/>
2344     </condition>
2345     <condition id="ARMv8MML_LE_IAR">
2346       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2347       <require condition="ARMv8MML_IAR"/>
2348       <require Dendian="Little-endian"/>
2349     </condition>
2350
2351     <condition id="ARMv8MML_FP_IAR">
2352       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2353       <require condition="ARMv8MML_FP"/>
2354       <require Tcompiler="IAR"/>
2355     </condition>
2356     <condition id="ARMv8MML_FP_LE_IAR">
2357       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2358       <require condition="ARMv8MML_FP_IAR"/>
2359       <require Dendian="Little-endian"/>
2360     </condition>
2361
2362     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2363       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2364       <require condition="ARMv8MML_NODSP_NOFPU"/>
2365       <require Tcompiler="IAR"/>
2366     </condition>
2367     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2368       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2369       <require condition="ARMv8MML_DSP_NOFPU"/>
2370       <require Tcompiler="IAR"/>
2371     </condition>
2372     <condition id="ARMv8MML_NODSP_SP_IAR">
2373       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2374       <require condition="ARMv8MML_NODSP_SP"/>
2375       <require Tcompiler="IAR"/>
2376     </condition>
2377     <condition id="ARMv8MML_DSP_SP_IAR">
2378       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2379       <require condition="ARMv8MML_DSP_SP"/>
2380       <require Tcompiler="IAR"/>
2381     </condition>
2382     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2383       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2384       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2385       <require Dendian="Little-endian"/>
2386     </condition>
2387     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2388       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2389       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2390       <require Dendian="Little-endian"/>
2391     </condition>
2392     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2393       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2394       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2395       <require Dendian="Little-endian"/>
2396     </condition>
2397     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2398       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2399       <require condition="ARMv8MML_DSP_SP_IAR"/>
2400       <require Dendian="Little-endian"/>
2401     </condition>
2402
2403     <!-- conditions selecting single devices and CMSIS Core -->
2404     <condition id="ARMCM0 CMSIS">
2405       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2406       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2407       <require Cclass="CMSIS" Cgroup="CORE"/>
2408     </condition>
2409
2410     <condition id="ARMCM0+ CMSIS">
2411       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2412       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2413       <require Cclass="CMSIS" Cgroup="CORE"/>
2414     </condition>
2415
2416     <condition id="ARMCM1 CMSIS">
2417       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2418       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2419       <require Cclass="CMSIS" Cgroup="CORE"/>
2420     </condition>
2421
2422     <condition id="ARMCM3 CMSIS">
2423       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2424       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2425       <require Cclass="CMSIS" Cgroup="CORE"/>
2426     </condition>
2427
2428     <condition id="ARMCM4 CMSIS">
2429       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2430       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2431       <require Cclass="CMSIS" Cgroup="CORE"/>
2432     </condition>
2433
2434     <condition id="ARMCM7 CMSIS">
2435       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2436       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2437       <require Cclass="CMSIS" Cgroup="CORE"/>
2438     </condition>
2439
2440     <condition id="ARMCM23 CMSIS">
2441       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2442       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2443       <require Cclass="CMSIS" Cgroup="CORE"/>
2444     </condition>
2445
2446     <condition id="ARMCM33 CMSIS">
2447       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2448       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2449       <require Cclass="CMSIS" Cgroup="CORE"/>
2450     </condition>
2451
2452     <condition id="ARMCM35P CMSIS">
2453       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2454       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2455       <require Cclass="CMSIS" Cgroup="CORE"/>
2456     </condition>
2457
2458     <condition id="ARMCM55 CMSIS">
2459       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2460       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2461       <require Cclass="CMSIS" Cgroup="CORE"/>
2462     </condition>
2463
2464     <condition id="ARMSC000 CMSIS">
2465       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2466       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2467       <require Cclass="CMSIS" Cgroup="CORE"/>
2468     </condition>
2469
2470     <condition id="ARMSC300 CMSIS">
2471       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2472       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2473       <require Cclass="CMSIS" Cgroup="CORE"/>
2474     </condition>
2475
2476     <condition id="ARMv8MBL CMSIS">
2477       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2478       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2479       <require Cclass="CMSIS" Cgroup="CORE"/>
2480     </condition>
2481
2482     <condition id="ARMv8MML CMSIS">
2483       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2484       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2485       <require Cclass="CMSIS" Cgroup="CORE"/>
2486     </condition>
2487
2488     <condition id="ARMv81MML CMSIS">
2489       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2490       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2491       <require Cclass="CMSIS" Cgroup="CORE"/>
2492     </condition>
2493
2494     <condition id="ARMCA5 CMSIS">
2495       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2496       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2497       <require Cclass="CMSIS" Cgroup="CORE"/>
2498     </condition>
2499
2500     <condition id="ARMCA7 CMSIS">
2501       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2502       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2503       <require Cclass="CMSIS" Cgroup="CORE"/>
2504     </condition>
2505
2506     <condition id="ARMCA9 CMSIS">
2507       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2508       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2509       <require Cclass="CMSIS" Cgroup="CORE"/>
2510     </condition>
2511
2512     <!-- CMSIS DSP -->
2513     <condition id="CMSIS DSP">
2514       <description>Components required for DSP</description>
2515       <require condition="ARMv6_7_8-M Device"/>
2516       <require condition="ARMCC GCC IAR"/>
2517       <require Cclass="CMSIS" Cgroup="CORE"/>
2518     </condition>
2519
2520     <!-- CMSIS NN -->
2521     <condition id="CMSIS NN">
2522       <description>Components required for NN</description>
2523       <require Cclass="CMSIS" Cgroup="DSP"/>
2524     </condition>
2525
2526     <!-- RTOS RTX -->
2527     <condition id="RTOS RTX">
2528       <description>Components required for RTOS RTX</description>
2529       <require condition="ARMv6_7-M Device"/>
2530       <require condition="ARMCC GCC IAR"/>
2531       <require Cclass="Device" Cgroup="Startup"/>
2532       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2533     </condition>
2534     <condition id="RTOS RTX IFX">
2535       <description>Components required for RTOS RTX IFX</description>
2536       <require condition="ARMv6_7-M Device"/>
2537       <require condition="ARMCC GCC IAR"/>
2538       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2539       <require Cclass="Device" Cgroup="Startup"/>
2540       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2541     </condition>
2542     <condition id="RTOS RTX5">
2543       <description>Components required for RTOS RTX5</description>
2544       <require condition="ARMv6_7_8-M Device"/>
2545       <require condition="ARMCC GCC IAR"/>
2546       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2547     </condition>
2548     <condition id="RTOS2 RTX5">
2549       <description>Components required for RTOS2 RTX5</description>
2550       <require condition="ARMv6_7_8-M Device"/>
2551       <require condition="ARMCC GCC IAR"/>
2552       <require Cclass="CMSIS"  Cgroup="CORE"/>
2553       <require Cclass="Device" Cgroup="Startup"/>
2554     </condition>
2555     <condition id="RTOS2 RTX5 v7-A">
2556       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2557       <require condition="ARMv7-A Device"/>
2558       <require condition="ARMCC GCC IAR"/>
2559       <require Cclass="CMSIS"  Cgroup="CORE"/>
2560       <require Cclass="Device" Cgroup="Startup"/>
2561       <require Cclass="Device" Cgroup="OS Tick"/>
2562       <require Cclass="Device" Cgroup="IRQ Controller"/>
2563     </condition>
2564     <condition id="RTOS2 RTX5 NS">
2565       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2566       <require condition="ARMv8-M Device"/>
2567       <require condition="TZ Non-secure"/>
2568       <require condition="ARMCC GCC IAR"/>
2569       <require Cclass="CMSIS"  Cgroup="CORE"/>
2570       <require Cclass="Device" Cgroup="Startup"/>
2571     </condition>
2572
2573     <!-- OS Tick -->
2574     <condition id="OS Tick PTIM">
2575       <description>Components required for OS Tick Private Timer</description>
2576       <require condition="CA5_CA9"/>
2577       <require Cclass="Device" Cgroup="IRQ Controller"/>
2578     </condition>
2579
2580     <condition id="OS Tick GTIM">
2581       <description>Components required for OS Tick Generic Physical Timer</description>
2582       <require condition="CA7"/>
2583       <require Cclass="Device" Cgroup="IRQ Controller"/>
2584     </condition>
2585
2586   </conditions>
2587
2588   <components>
2589     <!-- CMSIS-Core component -->
2590     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.4.0"  condition="ARMv6_7_8-M Device" >
2591       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2592       <files>
2593         <!-- CPU independent -->
2594         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2595         <file category="include" name="CMSIS/Core/Include/"/>
2596         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2597         <!-- Code template -->
2598         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2599         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2600       </files>
2601     </component>
2602
2603     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.4"  condition="ARMv7-A Device" >
2604       <description>CMSIS-CORE for Cortex-A</description>
2605       <files>
2606         <!-- CPU independent -->
2607         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2608         <file category="include" name="CMSIS/Core_A/Include/"/>
2609       </files>
2610     </component>
2611
2612     <!-- CMSIS-Startup components -->
2613     <!-- Cortex-M0 -->
2614     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS">
2615       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2616       <files>
2617         <!-- include folder / device header file -->
2618         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2619         <!-- startup / system file -->
2620         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2621         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2622         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2623         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2624         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2625       </files>
2626     </component>
2627     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2628       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2629       <files>
2630         <!-- include folder / device header file -->
2631         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2632         <!-- startup / system file -->
2633         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2634         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
2635         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2636         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2637         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2638       </files>
2639     </component>
2640
2641     <!-- Cortex-M0+ -->
2642     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS">
2643       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2644       <files>
2645         <!-- include folder / device header file -->
2646         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2647         <!-- startup / system file -->
2648         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2649         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2650         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2651         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2652         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2653       </files>
2654     </component>
2655     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0+ CMSIS">
2656       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2657       <files>
2658         <!-- include folder / device header file -->
2659         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2660         <!-- startup / system file -->
2661         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2662         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
2663         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
2664         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2665         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2666       </files>
2667     </component>
2668
2669     <!-- Cortex-M1 -->
2670     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS">
2671       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2672       <files>
2673         <!-- include folder / device header file -->
2674         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2675         <!-- startup / system file -->
2676         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2677         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2678         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2679         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2680         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2681       </files>
2682     </component>
2683     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2684       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2685       <files>
2686         <!-- include folder / device header file -->
2687         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2688         <!-- startup / system file -->
2689         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2690         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
2691         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2692         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2693         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2694       </files>
2695     </component>
2696
2697     <!-- Cortex-M3 -->
2698     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS">
2699       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2700       <files>
2701         <!-- include folder / device header file -->
2702         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2703         <!-- startup / system file -->
2704         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2705         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2706         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2707         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2708         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2709       </files>
2710     </component>
2711     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2712       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2713       <files>
2714         <!-- include folder / device header file -->
2715         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2716         <!-- startup / system file -->
2717         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2718         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
2719         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2720         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2721         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2722       </files>
2723     </component>
2724
2725     <!-- Cortex-M4 -->
2726     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS">
2727       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2728       <files>
2729         <!-- include folder / device header file -->
2730         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2731         <!-- startup / system file -->
2732         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2733         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2734         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2735         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2736        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2737       </files>
2738     </component>
2739     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2740       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2741       <files>
2742         <!-- include folder / device header file -->
2743         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2744         <!-- startup / system file -->
2745         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2746         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
2747         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2748         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2749         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2750       </files>
2751     </component>
2752
2753     <!-- Cortex-M7 -->
2754     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS">
2755       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2756       <files>
2757         <!-- include folder / device header file -->
2758         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2759         <!-- startup / system file -->
2760         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2761         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2762         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2763         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2764         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2765       </files>
2766     </component>
2767     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2768       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2769       <files>
2770         <!-- include folder / device header file -->
2771         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2772         <!-- startup / system file -->
2773         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2774         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
2775         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2776         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2777         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2778       </files>
2779     </component>
2780
2781     <!-- Cortex-M23 -->
2782     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM23 CMSIS">
2783       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2784       <files>
2785         <!-- include folder / device header file -->
2786         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2787         <!-- startup / system file -->
2788         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.3" attr="config"/>
2789         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
2790         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
2791         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2792         <!-- SAU configuration -->
2793         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2794       </files>
2795     </component>
2796     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM23 CMSIS">
2797       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2798       <files>
2799         <!-- include folder / device header file -->
2800         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2801         <!-- startup / system file -->
2802         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
2803         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
2804         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
2805         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2806         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2807         <!-- SAU configuration -->
2808         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2809       </files>
2810     </component>
2811
2812     <!-- Cortex-M33 -->
2813     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM33 CMSIS">
2814       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2815       <files>
2816         <!-- include folder / device header file -->
2817         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2818         <!-- startup / system file -->
2819         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.3" attr="config"/>
2820         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2821         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2822         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2823         <!-- SAU configuration -->
2824         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2825       </files>
2826     </component>
2827     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM33 CMSIS">
2828       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2829       <files>
2830         <!-- include folder / device header file -->
2831         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2832         <!-- startup / system file -->
2833         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2834         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
2835         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2836         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2837         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2838         <!-- SAU configuration -->
2839         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2840       </files>
2841     </component>
2842
2843     <!-- Cortex-M35P -->
2844     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM35P CMSIS">
2845       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2846       <files>
2847         <!-- include folder / device header file -->
2848         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2849         <!-- startup / system file -->
2850         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.3" attr="config"/>
2851         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2852         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2853         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2854         <!-- SAU configuration -->
2855         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2856       </files>
2857     </component>
2858     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMCM35P CMSIS">
2859       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2860       <files>
2861         <!-- include folder / device header file -->
2862         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2863         <!-- startup / system file -->
2864         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2865         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
2866         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2867         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
2868         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2869         <!-- SAU configuration -->
2870         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2871       </files>
2872     </component>
2873
2874     <!-- Cortex-M55 -->
2875     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM55 CMSIS">
2876       <description>System and Startup for Generic Cortex-M55 device</description>
2877       <files>
2878         <!-- include folder / device header file -->
2879         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2880         <!-- startup / system file -->
2881         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
2882         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2883         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2884         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
2885         <!-- SAU configuration -->
2886         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2887       </files>
2888     </component>
2889
2890     <!-- Cortex-SC000 -->
2891     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS">
2892       <description>System and Startup for Generic Arm SC000 device</description>
2893       <files>
2894         <!-- include folder / device header file -->
2895         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2896         <!-- startup / system file -->
2897         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2898         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2899         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2900         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2901         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2902       </files>
2903     </component>
2904     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2905       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2906       <files>
2907         <!-- include folder / device header file -->
2908         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2909         <!-- startup / system file -->
2910         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2911         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
2912         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2913         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2914         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2915       </files>
2916     </component>
2917
2918     <!-- Cortex-SC300 -->
2919     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS">
2920       <description>System and Startup for Generic Arm SC300 device</description>
2921       <files>
2922         <!-- include folder / device header file -->
2923         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2924         <!-- startup / system file -->
2925         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2926         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2927         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2928         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2929         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2930       </files>
2931     </component>
2932     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2933       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2934       <files>
2935         <!-- include folder / device header file -->
2936         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2937         <!-- startup / system file -->
2938         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2939         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
2940         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2941         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2942         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2943       </files>
2944     </component>
2945
2946     <!-- ARMv8MBL -->
2947     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MBL CMSIS">
2948       <description>System and Startup for Generic Armv8-M Baseline device</description>
2949       <files>
2950         <!-- include folder / device header file -->
2951         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2952         <!-- startup / system file -->
2953         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.3" attr="config"/>
2954         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
2955         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
2956         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2957         <!-- SAU configuration -->
2958         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2959       </files>
2960     </component>
2961     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.2" condition="ARMv8MBL CMSIS">
2962       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2963       <files>
2964         <!-- include folder / device header file -->
2965         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2966         <!-- startup / system file -->
2967         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
2968         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
2969         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
2970         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2971         <!-- SAU configuration -->
2972         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2973       </files>
2974     </component>
2975
2976     <!-- ARMv8MML -->
2977     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMv8MML CMSIS">
2978       <description>System and Startup for Generic Armv8-M Mainline device</description>
2979       <files>
2980         <!-- include folder / device header file -->
2981         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2982         <!-- startup / system file -->
2983         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.3" attr="config"/>
2984         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
2985         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
2986         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2987         <!-- SAU configuration -->
2988         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2989       </files>
2990     </component>
2991     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMv8MML CMSIS">
2992       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2993       <files>
2994         <!-- include folder / device header file -->
2995         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2996         <!-- startup / system file -->
2997         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
2998         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
2999         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
3000         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
3001         <!-- SAU configuration -->
3002         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
3003       </files>
3004     </component>
3005
3006     <!-- ARMv81MML -->
3007     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.1" condition="ARMv81MML CMSIS">
3008       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
3009       <files>
3010         <!-- include folder / device header file -->
3011         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
3012         <!-- startup / system file -->
3013         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.3" attr="config"/>
3014         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
3015         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.1" attr="config" condition="GCC"/>
3016         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
3017         <!-- SAU configuration -->
3018         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
3019       </files>
3020     </component>
3021
3022     <!-- Cortex-A5 -->
3023     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
3024       <description>System and Startup for Generic Arm Cortex-A5 device</description>
3025       <files>
3026         <!-- include folder / device header file -->
3027         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
3028         <!-- startup / system / mmu files -->
3029         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3030         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3031         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3032         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3033         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
3034         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3035         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3036         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3037         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3038         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
3039         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
3040         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
3041
3042       </files>
3043     </component>
3044
3045     <!-- Cortex-A7 -->
3046     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3047       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3048       <files>
3049         <!-- include folder / device header file -->
3050         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3051         <!-- startup / system / mmu files -->
3052         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3053         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3054         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3055         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3056         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3057         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3058         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3059         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3060         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3061         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
3062         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
3063         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
3064       </files>
3065     </component>
3066
3067     <!-- Cortex-A9 -->
3068     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3069       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3070       <files>
3071         <!-- include folder / device header file -->
3072         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3073         <!-- startup / system / mmu files -->
3074         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3075         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3076         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3077         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3078         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3079         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3080         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3081         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3082         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3083         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
3084         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
3085         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
3086       </files>
3087     </component>
3088
3089     <!-- IRQ Controller -->
3090     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3091       <description>IRQ Controller implementation using GIC</description>
3092       <files>
3093         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3094       </files>
3095     </component>
3096
3097     <!-- OS Tick -->
3098     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3099       <description>OS Tick implementation using Private Timer</description>
3100       <files>
3101         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3102       </files>
3103     </component>
3104
3105     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3106       <description>OS Tick implementation using Generic Physical Timer</description>
3107       <files>
3108         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3109       </files>
3110     </component>
3111
3112     <!-- CMSIS-DSP component -->
3113     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.8.0" isDefaultVariant="true" condition="CMSIS DSP">
3114       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3115       <files>
3116         <!-- CPU independent -->
3117         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3118         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3119
3120         <!-- CPU and Compiler dependent -->
3121         <!-- ARMCC -->
3122         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3123         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3124         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3125         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3126         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3127         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3128         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3129         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3130         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3131         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3132         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3133         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3134         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3135         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3136         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3137         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3138
3139         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3140         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3141         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3142         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3143         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3144         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3145         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3146         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3147         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3148         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3149         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3150         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3151         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3152         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3153         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3154         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3155
3156         <!-- GCC -->
3157         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3158         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3159         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3160         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3161         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3162         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3163         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3164         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3165
3166         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3167         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3168         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3169         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3170         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3171         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3172         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3173         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3174         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3175         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3176         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3177         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3178         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3179         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3180         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3181         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3182
3183         <!-- IAR -->
3184         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3185         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3186         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3187         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3188         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3189         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3190         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3191         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3192         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3193         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3194         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3195         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3196         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3197         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3198         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3199         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3200
3201         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3202         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3203         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3204         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3205         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3206         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3207         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3208         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3209         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3210         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3211         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3212         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3213         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3214         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3215         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3216         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3217
3218       </files>
3219     </component>
3220     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.8.0" condition="CMSIS DSP">
3221       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3222       <files>
3223         <!-- CPU independent -->
3224         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
3225         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
3226         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
3227
3228         <!-- DSP sources (core) -->
3229         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3230         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
3231         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3232         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3233         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3234         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
3235         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3236         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3237         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3238         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3239         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3240         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
3241         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3242
3243         <!-- Compute Library for Cortex-A -->
3244         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
3245         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
3246       </files>
3247     </component>
3248
3249     <!-- CMSIS-NN component -->
3250     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.3.0" condition="CMSIS NN">
3251       <description>CMSIS-NN Neural Network Library</description>
3252       <files>
3253         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3254         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3255         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
3256         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
3257
3258         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3259         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3260         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3261         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
3262         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
3263         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
3264         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
3265         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3266         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3267         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3268         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
3269         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
3270         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
3271         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
3272         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
3273         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
3274         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3275         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3276         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
3277         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3278         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3279         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
3280         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3281         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3282         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
3283         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
3284         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
3285         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
3286         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8_opt.c"/>
3287         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
3288         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
3289         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3290         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
3291         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
3292         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
3293         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3294         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3295         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3296         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3297         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
3298         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3299         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3300         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
3301         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
3302         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
3303         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
3304         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
3305         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
3306         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3307         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3308         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
3309         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3310         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
3311         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
3312         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3313         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3314         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3315         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3316         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3317         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3318         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3319         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
3320         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
3321         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3322         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
3323       </files>
3324     </component>
3325
3326     <!-- CMSIS-RTOS Keil RTX component -->
3327     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3328       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3329       <RTE_Components_h>
3330         <!-- the following content goes into file 'RTE_Components.h' -->
3331         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3332         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3333       </RTE_Components_h>
3334       <files>
3335         <!-- CPU independent -->
3336         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3337         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3338         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3339
3340         <!-- RTX templates -->
3341         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3342         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3343         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3344         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3350         <!-- tool-chain specific template file -->
3351         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3352         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3353         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3354
3355         <!-- CPU and Compiler dependent -->
3356         <!-- ARMCC -->
3357         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3358         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3359         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3360         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3361         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3362         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3363         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3364         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3365         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3366         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3367         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3368         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3369         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3370         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3371         <!-- GCC -->
3372         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3373         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3374         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3375         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3376         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3377         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3378         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3379         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3380         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3381         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3382         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3383         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3384         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3385         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3386         <!-- IAR -->
3387         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3388         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3389         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3390         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3391         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3392         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3393         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3394         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3395         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3396         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3397         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3398         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3399         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3400         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3401       </files>
3402     </component>
3403     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3404     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3405       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3406       <RTE_Components_h>
3407         <!-- the following content goes into file 'RTE_Components.h' -->
3408         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3409         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3410       </RTE_Components_h>
3411       <files>
3412         <!-- CPU independent -->
3413         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3414         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3415         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3416
3417         <!-- RTX templates -->
3418         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3419         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3420         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3421         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3422         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3423         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3424         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3425         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3426         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3427         <!-- tool-chain specific template file -->
3428         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3429         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3430         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3431
3432         <!-- CPU and Compiler dependent -->
3433         <!-- ARMCC -->
3434         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3435         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3436         <!-- GCC -->
3437         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3438         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3439         <!-- IAR -->
3440       </files>
3441     </component>
3442
3443     <!-- CMSIS-RTOS Keil RTX5 component -->
3444     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.2" Capiversion="1.0.0" condition="RTOS RTX5">
3445       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3446       <RTE_Components_h>
3447         <!-- the following content goes into file 'RTE_Components.h' -->
3448         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3449         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3450       </RTE_Components_h>
3451       <files>
3452         <!-- RTX header file -->
3453         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3454         <!-- RTX compatibility module for API V1 -->
3455         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3456       </files>
3457     </component>
3458
3459     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3460     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3461       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
3462       <RTE_Components_h>
3463         <!-- the following content goes into file 'RTE_Components.h' -->
3464         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3465         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3466       </RTE_Components_h>
3467       <files>
3468         <!-- RTX documentation -->
3469         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3470
3471         <!-- RTX header files -->
3472         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3473
3474         <!-- RTX configuration -->
3475         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3476         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3477
3478         <!-- RTX templates -->
3479         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3480         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3481         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3482         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3483         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3484         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3485         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3486         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3487         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3488         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3489
3490         <!-- RTX library configuration -->
3491         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3492
3493         <!-- RTX libraries (CPU and Compiler dependent) -->
3494         <!-- ARMCC -->
3495         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3496         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3497         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3498         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3499         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3500         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3501         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3502         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3503         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3504         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3505         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3506         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3512         <!-- GCC -->
3513         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3514         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3515         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3523         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3524         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3530         <!-- IAR -->
3531         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3532         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3533         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3534         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3535         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3536         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3537         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3538         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3539         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3540         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3541         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3542         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3543         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3544         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3545         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3546         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3547         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3548       </files>
3549     </component>
3550     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3551       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3552       <RTE_Components_h>
3553         <!-- the following content goes into file 'RTE_Components.h' -->
3554         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3555         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3556         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3557       </RTE_Components_h>
3558       <files>
3559         <!-- RTX documentation -->
3560         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3561
3562         <!-- RTX header files -->
3563         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3564
3565         <!-- RTX configuration -->
3566         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3567         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3568
3569         <!-- RTX templates -->
3570         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3571         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3572         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3573         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3574         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3575         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3576         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3577         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3578         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3579         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3580
3581         <!-- RTX library configuration -->
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3583
3584         <!-- RTX libraries (CPU and Compiler dependent) -->
3585         <!-- ARMCC -->
3586         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3587         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3588         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3589         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3590         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3591         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3592         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3593         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3594         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3595         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3596         <!-- GCC -->
3597         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3598         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3599         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3600         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3601         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3602         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3603         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3604         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3605         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3606         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3607         <!-- IAR -->
3608         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3609         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3610         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3611         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3612         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3613         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3614         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3615         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3616         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3617         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3618       </files>
3619     </component>
3620     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5">
3621       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3622       <RTE_Components_h>
3623         <!-- the following content goes into file 'RTE_Components.h' -->
3624         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3625         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3626         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3627       </RTE_Components_h>
3628       <files>
3629         <!-- RTX documentation -->
3630         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3631
3632         <!-- RTX header files -->
3633         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3634
3635         <!-- RTX configuration -->
3636         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3637         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3638
3639         <!-- RTX templates -->
3640         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3641         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3642         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3643         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3644         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3645         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3646         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3647         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3648         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3649         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3650
3651         <!-- RTX sources (core) -->
3652         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3653         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3654         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3655         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3656         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3657         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3658         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3659         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3660         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3661         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3662         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3663         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3664         <!-- RTX sources (library configuration) -->
3665         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3666         <!-- RTX sources (handlers ARMCC) -->
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM0_ARMCC"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"      condition="CM1_ARMCC"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM3_ARMCC"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM4_ARMCC"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM4_FP_ARMCC"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"      condition="CM7_ARMCC"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"     condition="CM7_FP_ARMCC"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="CM23_ARMCC"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_ARMCC"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM33_FP_ARMCC"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_ARMCC"/>
3678         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="CM35P_FP_ARMCC"/>
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3680         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s" condition="ARMv8MBL_ARMCC"/>
3683         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_ARMCC"/>
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s" condition="ARMv8MML_FP_ARMCC"/>
3685         <!-- RTX sources (handlers GCC) -->
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM0_GCC"/>
3687         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"      condition="CM1_GCC"/>
3688         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM3_GCC"/>
3689         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM4_GCC"/>
3690         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM4_FP_GCC"/>
3691         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"      condition="CM7_GCC"/>
3692         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"     condition="CM7_FP_GCC"/>
3693         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3694         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3695         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3696         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3697         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3698         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3699         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3700         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3701         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3702         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3703         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3704         <!-- RTX sources (handlers IAR) -->
3705         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM0_IAR"/>
3706         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"      condition="CM1_IAR"/>
3707         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM3_IAR"/>
3708         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM4_IAR"/>
3709         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM4_FP_IAR"/>
3710         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"      condition="CM7_IAR"/>
3711         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"     condition="CM7_FP_IAR"/>
3712         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3713         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3714         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3715         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3716         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3717         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3718         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3719         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3720         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3721         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3723         <!-- OS Tick (SysTick) -->
3724         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3725       </files>
3726     </component>
3727     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3728       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3729       <RTE_Components_h>
3730         <!-- the following content goes into file 'RTE_Components.h' -->
3731         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3732         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3733         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3734       </RTE_Components_h>
3735       <files>
3736         <!-- RTX documentation -->
3737         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3738
3739         <!-- RTX header files -->
3740         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3741
3742         <!-- RTX configuration -->
3743         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3744         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3745
3746         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3747
3748         <!-- RTX templates -->
3749         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3750         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3751         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3752         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3753         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3754         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3755         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3756         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3757         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3758         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3759
3760         <!-- RTX sources (core) -->
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3763         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3764         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3765         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3766         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3767         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3768         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3769         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3770         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3771         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3772         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3773         <!-- RTX sources (library configuration) -->
3774         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3775         <!-- RTX sources (handlers ARMCC) -->
3776         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3777         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3778         <!-- RTX sources (handlers GCC) -->
3779         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3780         <!-- RTX sources (handlers IAR) -->
3781         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3782       </files>
3783     </component>
3784     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.2" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3785       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3786       <RTE_Components_h>
3787         <!-- the following content goes into file 'RTE_Components.h' -->
3788         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3789         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3790         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3791         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3792       </RTE_Components_h>
3793       <files>
3794         <!-- RTX documentation -->
3795         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3796
3797         <!-- RTX header files -->
3798         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3799
3800         <!-- RTX configuration -->
3801         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.1"/>
3802         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3803
3804         <!-- RTX templates -->
3805         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3806         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3807         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3808         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3809         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3810         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3811         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3812         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3813         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3814         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3815
3816         <!-- RTX sources (core) -->
3817         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3818         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3819         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3820         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3822         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3823         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3824         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3825         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3826         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3827         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3828         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3829         <!-- RTX sources (library configuration) -->
3830         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3831         <!-- RTX sources (ARMCC handlers) -->
3832         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="CM23_ARMCC"/>
3833         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_ARMCC"/>
3834         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM33_FP_ARMCC"/>
3835         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_ARMCC"/>
3836         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="CM35P_FP_ARMCC"/>
3837         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_ARMCC"/>
3838         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_ARMCC"/>
3839         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_ARMCC"/>
3840         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s" condition="ARMv8MBL_ARMCC"/>
3841         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_ARMCC"/>
3842         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s" condition="ARMv8MML_FP_ARMCC"/>
3843         <!-- RTX sources (GCC handlers) -->
3844         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3845         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3846         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_FP_GCC"/>
3847         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3848         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_FP_GCC"/>
3849         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_NOMVE_GCC"/>
3850         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_NOFPU_MVE_GCC"/>
3851         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM55_FPU_GCC"/>
3852         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3853         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3854         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_FP_GCC"/>
3855         <!-- RTX sources (IAR handlers) -->
3856         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="CM23_IAR"/>
3857         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_IAR"/>
3858         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM33_FP_IAR"/>
3859         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_IAR"/>
3860         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM35P_FP_IAR"/>
3861         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3862         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_NOFPU_MVE_IAR"/>
3863         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="CM55_FPU_IAR"/>
3864         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s" condition="ARMv8MBL_IAR"/>
3865         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_IAR"/>
3866         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s" condition="ARMv8MML_FP_IAR"/>
3867         <!-- OS Tick (SysTick) -->
3868         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3869       </files>
3870     </component>
3871
3872     <!-- CMSIS-Driver Custom components -->
3873     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3874       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3875       <files>
3876         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3877         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3878       </files>
3879     </component>
3880     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3881       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3882       <files>
3883         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3884         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3885       </files>
3886     </component>
3887     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3888       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3889       <files>
3890         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3891         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3892       </files>
3893     </component>
3894     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3895       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3896       <files>
3897         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3898         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3899       </files>
3900     </component>
3901     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3902       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3903       <files>
3904         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3905         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3906       </files>
3907     </component>
3908     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3909       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3910       <files>
3911         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3912         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3913       </files>
3914     </component>
3915     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3916       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3917       <files>
3918         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3919         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3920       </files>
3921     </component>
3922     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3923       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3924       <files>
3925         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3926         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3927       </files>
3928     </component>
3929     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3930       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3931       <files>
3932         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3933         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3934         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3935         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3936       </files>
3937     </component>
3938     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3939       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3940       <files>
3941         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3942         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3943       </files>
3944     </component>
3945     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3946       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3947       <files>
3948         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3949         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3950       </files>
3951     </component>
3952     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3953       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3954       <files>
3955         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3956         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3957       </files>
3958     </component>
3959     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3960       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3961       <files>
3962         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3963         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3964       </files>
3965     </component>
3966     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3967       <description>Access to #include Driver_WiFi.h file</description>
3968       <files>
3969         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3970         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3971       </files>
3972     </component>
3973
3974     <!-- VIO components -->
3975     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3976       <description>Virtual I/O custom implementation template</description>
3977       <files>
3978         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3979       </files>
3980     </component>
3981     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3982       <description>Virtual I/O implementation using memory only</description>
3983       <files>
3984         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3985       </files>
3986     </component>
3987
3988   </components>
3989
3990   <boards>
3991     <board name="uVision Simulator" vendor="Keil">
3992       <description>uVision Simulator</description>
3993       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3994       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3995       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3996       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3997       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3998       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3999       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4000       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4001       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4002       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4003       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4004       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4005       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4006       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4007       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4008       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4009       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4010       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4011       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4012       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4013       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4014       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4015       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4016       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4017       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4018       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4019     </board>
4020
4021     <board name="EWARM Simulator" vendor="IAR">
4022       <description>EWARM Simulator</description>
4023       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
4024       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
4025       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
4026       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
4027       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
4028       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
4029       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
4030       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
4031       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
4032       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
4033       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
4034       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
4035       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
4036       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
4037       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
4038       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
4039       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
4040       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
4041       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
4042       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
4043       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
4044       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
4045       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
4046       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
4047       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
4048       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
4049     </board>
4050   </boards>
4051
4052   <examples>
4053     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
4054       <description>DSP_Lib Bayes example</description>
4055       <board name="uVision Simulator" vendor="Keil"/>
4056       <project>
4057         <environment name="uv" load="arm_bayes_example.uvprojx"/>
4058       </project>
4059       <attributes>
4060         <component Cclass="CMSIS" Cgroup="CORE"/>
4061         <component Cclass="CMSIS" Cgroup="DSP"/>
4062         <component Cclass="Device" Cgroup="Startup"/>
4063         <category>Getting Started</category>
4064       </attributes>
4065     </example>
4066
4067     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
4068       <description>DSP_Lib Class Marks example</description>
4069       <board name="uVision Simulator" vendor="Keil"/>
4070       <project>
4071         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
4072       </project>
4073       <attributes>
4074         <component Cclass="CMSIS" Cgroup="CORE"/>
4075         <component Cclass="CMSIS" Cgroup="DSP"/>
4076         <component Cclass="Device" Cgroup="Startup"/>
4077         <category>Getting Started</category>
4078       </attributes>
4079     </example>
4080
4081     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
4082       <description>DSP_Lib Convolution example</description>
4083       <board name="uVision Simulator" vendor="Keil"/>
4084       <project>
4085         <environment name="uv" load="arm_convolution_example.uvprojx"/>
4086       </project>
4087       <attributes>
4088         <component Cclass="CMSIS" Cgroup="CORE"/>
4089         <component Cclass="CMSIS" Cgroup="DSP"/>
4090         <component Cclass="Device" Cgroup="Startup"/>
4091         <category>Getting Started</category>
4092       </attributes>
4093     </example>
4094
4095     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
4096       <description>DSP_Lib Dotproduct example</description>
4097       <board name="uVision Simulator" vendor="Keil"/>
4098       <project>
4099         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
4100       </project>
4101       <attributes>
4102         <component Cclass="CMSIS" Cgroup="CORE"/>
4103         <component Cclass="CMSIS" Cgroup="DSP"/>
4104         <component Cclass="Device" Cgroup="Startup"/>
4105         <category>Getting Started</category>
4106       </attributes>
4107     </example>
4108
4109     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
4110       <description>DSP_Lib FFT Bin example</description>
4111       <board name="uVision Simulator" vendor="Keil"/>
4112       <project>
4113         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
4114       </project>
4115       <attributes>
4116         <component Cclass="CMSIS" Cgroup="CORE"/>
4117         <component Cclass="CMSIS" Cgroup="DSP"/>
4118         <component Cclass="Device" Cgroup="Startup"/>
4119         <category>Getting Started</category>
4120       </attributes>
4121     </example>
4122
4123     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
4124       <description>DSP_Lib FIR example</description>
4125       <board name="uVision Simulator" vendor="Keil"/>
4126       <project>
4127         <environment name="uv" load="arm_fir_example.uvprojx"/>
4128       </project>
4129       <attributes>
4130         <component Cclass="CMSIS" Cgroup="CORE"/>
4131         <component Cclass="CMSIS" Cgroup="DSP"/>
4132         <component Cclass="Device" Cgroup="Startup"/>
4133         <category>Getting Started</category>
4134       </attributes>
4135     </example>
4136
4137     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4138       <description>DSP_Lib Graphic Equalizer example</description>
4139       <board name="uVision Simulator" vendor="Keil"/>
4140       <project>
4141         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4142       </project>
4143       <attributes>
4144         <component Cclass="CMSIS" Cgroup="CORE"/>
4145         <component Cclass="CMSIS" Cgroup="DSP"/>
4146         <component Cclass="Device" Cgroup="Startup"/>
4147         <category>Getting Started</category>
4148       </attributes>
4149     </example>
4150
4151     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4152       <description>DSP_Lib Linear Interpolation example</description>
4153       <board name="uVision Simulator" vendor="Keil"/>
4154       <project>
4155         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4156       </project>
4157       <attributes>
4158         <component Cclass="CMSIS" Cgroup="CORE"/>
4159         <component Cclass="CMSIS" Cgroup="DSP"/>
4160         <component Cclass="Device" Cgroup="Startup"/>
4161         <category>Getting Started</category>
4162       </attributes>
4163     </example>
4164
4165     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4166       <description>DSP_Lib Matrix example</description>
4167       <board name="uVision Simulator" vendor="Keil"/>
4168       <project>
4169         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4170       </project>
4171       <attributes>
4172         <component Cclass="CMSIS" Cgroup="CORE"/>
4173         <component Cclass="CMSIS" Cgroup="DSP"/>
4174         <component Cclass="Device" Cgroup="Startup"/>
4175         <category>Getting Started</category>
4176       </attributes>
4177     </example>
4178
4179     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4180       <description>DSP_Lib Signal Convergence example</description>
4181       <board name="uVision Simulator" vendor="Keil"/>
4182       <project>
4183         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4184       </project>
4185       <attributes>
4186         <component Cclass="CMSIS" Cgroup="CORE"/>
4187         <component Cclass="CMSIS" Cgroup="DSP"/>
4188         <component Cclass="Device" Cgroup="Startup"/>
4189         <category>Getting Started</category>
4190       </attributes>
4191     </example>
4192
4193     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4194       <description>DSP_Lib Sinus/Cosinus example</description>
4195       <board name="uVision Simulator" vendor="Keil"/>
4196       <project>
4197         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4198       </project>
4199       <attributes>
4200         <component Cclass="CMSIS" Cgroup="CORE"/>
4201         <component Cclass="CMSIS" Cgroup="DSP"/>
4202         <component Cclass="Device" Cgroup="Startup"/>
4203         <category>Getting Started</category>
4204       </attributes>
4205     </example>
4206
4207     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
4208       <description>DSP_Lib SVM example</description>
4209       <board name="uVision Simulator" vendor="Keil"/>
4210       <project>
4211         <environment name="uv" load="arm_svm_example.uvprojx"/>
4212       </project>
4213       <attributes>
4214         <component Cclass="CMSIS" Cgroup="CORE"/>
4215         <component Cclass="CMSIS" Cgroup="DSP"/>
4216         <component Cclass="Device" Cgroup="Startup"/>
4217         <category>Getting Started</category>
4218       </attributes>
4219     </example>
4220
4221     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4222       <description>DSP_Lib Variance example</description>
4223       <board name="uVision Simulator" vendor="Keil"/>
4224       <project>
4225         <environment name="uv" load="arm_variance_example.uvprojx"/>
4226       </project>
4227       <attributes>
4228         <component Cclass="CMSIS" Cgroup="CORE"/>
4229         <component Cclass="CMSIS" Cgroup="DSP"/>
4230         <component Cclass="Device" Cgroup="Startup"/>
4231         <category>Getting Started</category>
4232       </attributes>
4233     </example>
4234
4235     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4236       <description>Neural Network CIFAR10 example</description>
4237       <board name="uVision Simulator" vendor="Keil"/>
4238       <project>
4239         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4240       </project>
4241       <attributes>
4242         <component Cclass="CMSIS" Cgroup="CORE"/>
4243         <component Cclass="CMSIS" Cgroup="DSP"/>
4244         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4245         <component Cclass="Device" Cgroup="Startup"/>
4246         <category>Getting Started</category>
4247       </attributes>
4248     </example>
4249
4250     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4251       <description>Neural Network CIFAR10 example</description>
4252       <board name="EWARM Simulator" vendor="IAR"/>
4253       <project>
4254         <environment name="iar" load="NN-example-cifar10.ewp"/>
4255       </project>
4256       <attributes>
4257         <component Cclass="CMSIS" Cgroup="CORE"/>
4258         <component Cclass="CMSIS" Cgroup="DSP"/>
4259         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4260         <component Cclass="Device" Cgroup="Startup"/>
4261         <category>Getting Started</category>
4262       </attributes>
4263     </example>
4264
4265     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4266       <description>Neural Network GRU example</description>
4267       <board name="uVision Simulator" vendor="Keil"/>
4268       <project>
4269         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4270       </project>
4271       <attributes>
4272         <component Cclass="CMSIS" Cgroup="CORE"/>
4273         <component Cclass="CMSIS" Cgroup="DSP"/>
4274         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4275         <component Cclass="Device" Cgroup="Startup"/>
4276         <category>Getting Started</category>
4277       </attributes>
4278     </example>
4279
4280     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4281       <description>Neural Network GRU example</description>
4282       <board name="EWARM Simulator" vendor="IAR"/>
4283       <project>
4284         <environment name="iar" load="NN-example-gru.ewp"/>
4285       </project>
4286       <attributes>
4287         <component Cclass="CMSIS" Cgroup="CORE"/>
4288         <component Cclass="CMSIS" Cgroup="DSP"/>
4289         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4290         <component Cclass="Device" Cgroup="Startup"/>
4291         <category>Getting Started</category>
4292       </attributes>
4293     </example>
4294
4295     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4296       <description>CMSIS-RTOS2 Blinky example</description>
4297       <board name="uVision Simulator" vendor="Keil"/>
4298       <project>
4299         <environment name="uv" load="Blinky.uvprojx"/>
4300       </project>
4301       <attributes>
4302         <component Cclass="CMSIS" Cgroup="CORE"/>
4303         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4304         <component Cclass="Device" Cgroup="Startup"/>
4305         <category>Getting Started</category>
4306       </attributes>
4307     </example>
4308
4309     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4310       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4311       <board name="uVision Simulator" vendor="Keil"/>
4312       <project>
4313         <environment name="uv" load="Blinky.uvprojx"/>
4314       </project>
4315       <attributes>
4316         <component Cclass="CMSIS" Cgroup="CORE"/>
4317         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4318         <component Cclass="Device" Cgroup="Startup"/>
4319         <category>Getting Started</category>
4320       </attributes>
4321     </example>
4322
4323     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4324       <description>CMSIS-RTOS2 Message Queue Example</description>
4325       <board name="uVision Simulator" vendor="Keil"/>
4326       <project>
4327         <environment name="uv" load="MsqQueue.uvprojx"/>
4328       </project>
4329       <attributes>
4330         <component Cclass="CMSIS" Cgroup="CORE"/>
4331         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4332         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4333         <component Cclass="Device" Cgroup="Startup"/>
4334         <category>Getting Started</category>
4335       </attributes>
4336     </example>
4337
4338     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4339       <description>CMSIS-RTOS2 Memory Pool Example</description>
4340       <board name="uVision Simulator" vendor="Keil"/>
4341       <project>
4342         <environment name="uv" load="MemPool.uvprojx"/>
4343       </project>
4344       <attributes>
4345         <component Cclass="CMSIS" Cgroup="CORE"/>
4346         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4347         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4348         <component Cclass="Device" Cgroup="Startup"/>
4349         <category>Getting Started</category>
4350       </attributes>
4351     </example>
4352
4353     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4354       <description>Bare-metal secure/non-secure example without RTOS</description>
4355       <board name="uVision Simulator" vendor="Keil"/>
4356       <project>
4357         <environment name="uv" load="NoRTOS.uvmpw"/>
4358       </project>
4359       <attributes>
4360         <component Cclass="CMSIS" Cgroup="CORE"/>
4361         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4362         <component Cclass="Device" Cgroup="Startup"/>
4363         <category>Getting Started</category>
4364       </attributes>
4365     </example>
4366
4367     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4368       <description>Secure/non-secure RTOS example with thread context management</description>
4369       <board name="uVision Simulator" vendor="Keil"/>
4370       <project>
4371         <environment name="uv" load="RTOS.uvmpw"/>
4372       </project>
4373       <attributes>
4374         <component Cclass="CMSIS" Cgroup="CORE"/>
4375         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4376         <component Cclass="Device" Cgroup="Startup"/>
4377         <category>Getting Started</category>
4378       </attributes>
4379     </example>
4380
4381     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4382       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4383       <board name="uVision Simulator" vendor="Keil"/>
4384       <project>
4385         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4386       </project>
4387       <attributes>
4388         <component Cclass="CMSIS" Cgroup="CORE"/>
4389         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4390         <component Cclass="Device" Cgroup="Startup"/>
4391         <category>Getting Started</category>
4392       </attributes>
4393     </example>
4394
4395     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
4396       <description>CMSIS-RTOS2 Blinky example</description>
4397       <board name="EWARM Simulator" vendor="IAR"/>
4398       <project>
4399         <environment name="iar" load="Blinky/Blinky.ewp"/>
4400       </project>
4401       <attributes>
4402         <component Cclass="CMSIS" Cgroup="CORE"/>
4403         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4404         <component Cclass="Device" Cgroup="Startup"/>
4405         <category>Getting Started</category>
4406       </attributes>
4407     </example>
4408
4409     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
4410       <description>CMSIS-RTOS2 Message Queue Example</description>
4411       <board name="EWARM Simulator" vendor="IAR"/>
4412       <project>
4413         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
4414       </project>
4415       <attributes>
4416         <component Cclass="CMSIS" Cgroup="CORE"/>
4417         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4418         <component Cclass="Device" Cgroup="Startup"/>
4419         <category>Getting Started</category>
4420       </attributes>
4421     </example>
4422
4423   </examples>
4424
4425 </package>