begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.5.2-dev4">
  12       Active development...
  13       CMSIS-Core(A): 1.1.4 (see revision history for details)
  14        - Fixed __FPU_Enable.
  15       CMSIS-Core(M): 5.3.0 (see revision history for details)
  16        - Added provisions for compiler-independent C startup code.
  17       CMSIS-RTOS:
  18         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  19       CMSIS-RTOS2:
  20         - RTX 5.5.1 (see revision history for details)
  21       Devices:
  22        - Generalized/fixed startup code for Armv8.1-MML.
  23        - Updated Core(A) default memory regions and MMU configurations
  24     </release>
  25     <release version="5.5.1" date="2019-03-20">
  26       The following folders are deprecated
  27         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  28
  29       CMSIS-Core(M): 5.2.1 (see revision history for details)
  30         - Fixed compilation issue in cmsis_armclang_ltm.h
  31     </release>
  32     <release version="5.5.0" date="2019-03-18">
  33       The following folders have been removed:
  34         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
  35         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
  36       The following folders are deprecated
  37         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  38
  39       CMSIS-Core(M): 5.2.0 (see revision history for details)
  40         - Reworked Stack/Heap configuration for ARM startup files.
  41         - Added Cortex-M35P device support.
  42         - Added generic Armv8.1-M Mainline device support.
  43       CMSIS-Core(A): 1.1.3 (see revision history for details)
  44       CMSIS-DSP: 1.6.0 (see revision history for details)
  45         - reworked DSP library source files
  46         - reworked DSP library documentation
  47         - Changed DSP folder structure
  48         - moved DSP libraries to folder ./DSP/Lib
  49         - ARM DSP Libraries are built with ARMCLANG
  50         - Added DSP Libraries Source variant
  51       CMSIS-RTOS2:
  52         - RTX 5.5.0 (see revision history for details)
  53       CMSIS-Driver: 2.7.0
  54         - Added WiFi Interface API 1.0.0-beta
  55         - Added components for project specific driver implementations
  56       CMSIS-Pack: 1.6.0 (see revision history for details)
  57       Devices:
  58         - Added Cortex-M35P and ARMv81MML device templates.
  59         - Fixed C-Startup Code for GCC (aligned with other compilers)
  60       Utilities:
  61         - SVDConv 3.3.25
  62         - PackChk 1.3.82
  63     </release>
  64     <release version="5.4.0" date="2018-08-01">
  65       Aligned pack structure with repository.
  66       The following folders are deprecated:
  67         - CMSIS/Include/
  68         - CMSIS/DSP_Lib/
  69
  70       CMSIS-Core(M): 5.1.2 (see revision history for details)
  71         - Added Cortex-M1 support (beta).
  72       CMSIS-Core(A): 1.1.2 (see revision history for details)
  73       CMSIS-NN: 1.1.0
  74         - Added new math functions.
  75       CMSIS-RTOS2:
  76         - API 2.1.3 (see revision history for details)
  77         - RTX 5.4.0 (see revision history for details)
  78           * Updated exception handling on Cortex-A
  79       CMSIS-Driver:
  80         - Flash Driver API V2.2.0
  81       Utilities:
  82         - SVDConv 3.3.21
  83         - PackChk 1.3.71
  84     </release>
  85     <release version="5.3.0" date="2018-02-22">
  86       Updated Arm company brand.
  87       CMSIS-Core(M): 5.1.1 (see revision history for details)
  88       CMSIS-Core(A): 1.1.1 (see revision history for details)
  89       CMSIS-DAP: 2.0.0 (see revision history for details)
  90       CMSIS-NN: 1.0.0
  91         - Initial contribution of the bare metal Neural Network Library.
  92       CMSIS-RTOS2:
  93         - RTX 5.3.0 (see revision history for details)
  94         - OS Tick API 1.0.1
  95     </release>
  96     <release version="5.2.0" date="2017-11-16">
  97       CMSIS-Core(M): 5.1.0 (see revision history for details)
  98         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  99         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 100       CMSIS-Core(A): 1.1.0 (see revision history for details)
 101         - Added compiler_iccarm.h.
 102         - Added additional access functions for physical timer.
 103       CMSIS-DAP: 1.2.0 (see revision history for details)
 104       CMSIS-DSP: 1.5.2 (see revision history for details)
 105       CMSIS-Driver: 2.6.0 (see revision history for details)
 106         - CAN Driver API V1.2.0
 107         - NAND Driver API V2.3.0
 108       CMSIS-RTOS:
 109         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 110       CMSIS-RTOS2:
 111         - API 2.1.2 (see revision history for details)
 112         - RTX 5.2.3 (see revision history for details)
 113       Devices:
 114         - Added GCC startup and linker script for Cortex-A9.
 115         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 116         - Added IAR startup code for Cortex-A9
 117     </release>
 118     <release version="5.1.1" date="2017-09-19">
 119       CMSIS-RTOS2:
 120       - RTX 5.2.1 (see revision history for details)
 121     </release>
 122     <release version="5.1.0" date="2017-08-04">
 123       CMSIS-Core(M): 5.0.2 (see revision history for details)
 124       - Changed Version Control macros to be core agnostic.
 125       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 126       CMSIS-Core(A): 1.0.0 (see revision history for details)
 127       - Initial release
 128       - IRQ Controller API 1.0.0
 129       CMSIS-Driver: 2.05 (see revision history for details)
 130       - All typedefs related to status have been made volatile.
 131       CMSIS-RTOS2:
 132       - API 2.1.1 (see revision history for details)
 133       - RTX 5.2.0 (see revision history for details)
 134       - OS Tick API 1.0.0
 135       CMSIS-DSP: 1.5.2 (see revision history for details)
 136       - Fixed GNU Compiler specific diagnostics.
 137       CMSIS-Pack: 1.5.0 (see revision history for details)
 138       - added System Description File (*.SDF) Format
 139       CMSIS-Zone: 0.0.1 (Preview)
 140       - Initial specification draft
 141     </release>
 142     <release version="5.0.1" date="2017-02-03">
 143       Package Description:
 144       - added taxonomy for Cclass RTOS
 145       CMSIS-RTOS2:
 146       - API 2.1   (see revision history for details)
 147       - RTX 5.1.0 (see revision history for details)
 148       CMSIS-Core: 5.0.1 (see revision history for details)
 149       - Added __PACKED_STRUCT macro
 150       - Added uVisior support
 151       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 152       - Updated template for secure main function (main_s.c)
 153       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 154       CMSIS-DSP: 1.5.1 (see revision history for details)
 155       - added ARMv8M DSP libraries.
 156       CMSIS-Pack:1.4.9 (see revision history for details)
 157       - added Pack Index File specification and schema file
 158     </release>
 159     <release version="5.0.0" date="2016-11-11">
 160       Changed open source license to Apache 2.0
 161       CMSIS_Core:
 162        - Added support for Cortex-M23 and Cortex-M33.
 163        - Added ARMv8-M device configurations for mainline and baseline.
 164        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 165        - Added cmsis_compiler.h to unify compiler behaviour.
 166        - Updated function SCB_EnableICache (for Cortex-M7).
 167        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 168       CMSIS-RTOS:
 169         - bug fix in RTX 4.82 (see revision history for details)
 170       CMSIS-RTOS2:
 171         - new API including compatibility layer to CMSIS-RTOS
 172         - reference implementation based on RTX5
 173         - supports all Cortex-M variants including TrustZone for ARMv8-M
 174       CMSIS-SVD:
 175        - reworked SVD format documentation
 176        - removed SVD file database documentation as SVD files are distributed in packs
 177        - updated SVDConv for Win32 and Linux
 178       CMSIS-DSP:
 179        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 180        - Added DSP libraries build projects to CMSIS pack.
 181     </release>
 182     <release version="4.5.0" date="2015-10-28">
 183       - CMSIS-Core     4.30.0  (see revision history for details)
 184       - CMSIS-DAP      1.1.0   (unchanged)
 185       - CMSIS-Driver   2.04.0  (see revision history for details)
 186       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 187       - CMSIS-Pack     1.4.1   (see revision history for details)
 188       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 189       - CMSIS-SVD      1.3.1   (see revision history for details)
 190     </release>
 191     <release version="4.4.0" date="2015-09-11">
 192       - CMSIS-Core     4.20   (see revision history for details)
 193       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 194       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 195       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 196       - CMSIS-RTOS
 197         -- API         1.02   (unchanged)
 198         -- RTX         4.79   (see revision history for details)
 199       - CMSIS-SVD      1.3.0  (see revision history for details)
 200       - CMSIS-DAP      1.1.0  (extended with SWO support)
 201     </release>
 202     <release version="4.3.0" date="2015-03-20">
 203       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 204       - CMSIS-DSP      1.4.5  (see revision history for details)
 205       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 206       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 207       - CMSIS-RTOS
 208         -- API         1.02   (unchanged)
 209         -- RTX         4.78   (see revision history for details)
 210       - CMSIS-SVD      1.2    (unchanged)
 211     </release>
 212     <release version="4.2.0" date="2014-09-24">
 213       Adding Cortex-M7 support
 214       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 215       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 216       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 217       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 218       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 219     </release>
 220     <release version="4.1.1" date="2014-06-30">
 221       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 222     </release>
 223     <release version="4.1.0" date="2014-06-12">
 224       - CMSIS-Driver   2.02  (incompatible update)
 225       - CMSIS-Pack     1.3   (see revision history for details)
 226       - CMSIS-DSP      1.4.2 (unchanged)
 227       - CMSIS-Core     3.30  (unchanged)
 228       - CMSIS-RTOS RTX 4.74  (unchanged)
 229       - CMSIS-RTOS API 1.02  (unchanged)
 230       - CMSIS-SVD      1.10  (unchanged)
 231       PACK:
 232       - removed G++ specific files from PACK
 233       - added Component Startup variant "C Startup"
 234       - added Pack Checking Utility
 235       - updated conditions to reflect tool-chain dependency
 236       - added Taxonomy for Graphics
 237       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 238     </release>
 239     <release version="4.0.0">
 240       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 241       - CMSIS-Pack     1.1   Preliminary
 242       - CMSIS-DSP      1.4.2 (see revision history for details)
 243       - CMSIS-Core     3.30  (see revision history for details)
 244       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 245       - CMSIS-RTOS API 1.02  (unchanged)
 246       - CMSIS-SVD      1.10  (unchanged)
 247     </release>
 248     <release version="3.20.4">
 249       - CMSIS-RTOS 4.74 (see revision history for details)
 250       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 251     </release>
 252     <release version="3.20.3">
 253       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 254       - CMSIS-RTOS 4.73 (see revision history for details)
 255     </release>
 256     <release version="3.20.2">
 257       - CMSIS-Pack documentation has been added
 258       - CMSIS-Drivers header and documentation have been added to PACK
 259       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 260     </release>
 261     <release version="3.20.1">
 262       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 263       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 264     </release>
 265     <release version="3.20.0">
 266       The software portions that are deployed in the application program are now under a BSD license which allows usage
 267       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 268       The individual components have been update as listed below:
 269       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 270       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 271       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 272       - CMSIS-SVD is unchanged.
 273     </release>
 274   </releases>
 275
 276   <taxonomy>
 277     <description Cclass="Audio">Software components for audio processing</description>
 278     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 279     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 280     <description Cclass="Compiler">Compiler Software Extensions</description>
 281     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 282     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 283     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 284     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 285     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 286     <description Cclass="File System">File Drive Support and File System</description>
 287     <description Cclass="IoT Client">IoT cloud client connector</description>
 288     <description Cclass="IoT Utility">IoT specific software utility</description>
 289     <description Cclass="Graphics">Graphical User Interface</description>
 290     <description Cclass="Network">Network Stack using Internet Protocols</description>
 291     <description Cclass="RTOS">Real-time Operating System</description>
 292     <description Cclass="Security">Encryption for secure communication or storage</description>
 293     <description Cclass="USB">Universal Serial Bus Stack</description>
 294     <description Cclass="Utility">Generic software utility components</description>
 295   </taxonomy>
 296
 297   <devices>
 298     <!-- ******************************  Cortex-M0  ****************************** -->
 299     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 300       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 301       <description>
 302 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 303 - simple, easy-to-use programmers model
 304 - highly efficient ultra-low power operation
 305 - excellent code density
 306 - deterministic, high-performance interrupt handling
 307 - upward compatibility with the rest of the Cortex-M processor family.
 308       </description>
 309       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 310       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 311       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 312       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 313
 314       <device Dname="ARMCM0">
 315         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 316         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 317       </device>
 318     </family>
 319
 320     <!-- ******************************  Cortex-M0P  ****************************** -->
 321     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 322       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 323       <description>
 324 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 325 - simple, easy-to-use programmers model
 326 - highly efficient ultra-low power operation
 327 - excellent code density
 328 - deterministic, high-performance interrupt handling
 329 - upward compatibility with the rest of the Cortex-M processor family.
 330       </description>
 331       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 332       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 333       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 334       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 335
 336       <device Dname="ARMCM0P">
 337         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 338         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 339       </device>
 340
 341       <device Dname="ARMCM0P_MPU">
 342         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 343         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 344       </device>
 345     </family>
 346
 347     <!-- ******************************  Cortex-M1  ****************************** -->
 348     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 349       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 350       <description>
 351 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 352 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 353       </description>
 354       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 355       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 356       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 357       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 358
 359       <device Dname="ARMCM1">
 360         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 361         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 362       </device>
 363     </family>
 364
 365     <!-- ******************************  Cortex-M3  ****************************** -->
 366     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 367       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 368       <description>
 369 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 370 - simple, easy-to-use programmers model
 371 - highly efficient ultra-low power operation
 372 - excellent code density
 373 - deterministic, high-performance interrupt handling
 374 - upward compatibility with the rest of the Cortex-M processor family.
 375       </description>
 376       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 377       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 378       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 379       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 380
 381       <device Dname="ARMCM3">
 382         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 383         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 384       </device>
 385     </family>
 386
 387     <!-- ******************************  Cortex-M4  ****************************** -->
 388     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 389       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 390       <description>
 391 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 392 - simple, easy-to-use programmers model
 393 - highly efficient ultra-low power operation
 394 - excellent code density
 395 - deterministic, high-performance interrupt handling
 396 - upward compatibility with the rest of the Cortex-M processor family.
 397       </description>
 398       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 399       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 400       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 401       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 402
 403       <device Dname="ARMCM4">
 404         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 405         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 406       </device>
 407
 408       <device Dname="ARMCM4_FP">
 409         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 410         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 411       </device>
 412     </family>
 413
 414     <!-- ******************************  Cortex-M7  ****************************** -->
 415     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 416       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 417       <description>
 418 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 419 - simple, easy-to-use programmers model
 420 - highly efficient ultra-low power operation
 421 - excellent code density
 422 - deterministic, high-performance interrupt handling
 423 - upward compatibility with the rest of the Cortex-M processor family.
 424       </description>
 425       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 426       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 427       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 428       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 429
 430       <device Dname="ARMCM7">
 431         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 432         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 433       </device>
 434
 435       <device Dname="ARMCM7_SP">
 436         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 437         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 438       </device>
 439
 440       <device Dname="ARMCM7_DP">
 441         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 442         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 443       </device>
 444     </family>
 445
 446     <!-- ******************************  Cortex-M23  ********************** -->
 447     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 448       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 449       <description>
 450 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 451 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 452 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 453       </description>
 454       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 455       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 456       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 457       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 458       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 459       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 460
 461       <device Dname="ARMCM23">
 462         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 463         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 464       </device>
 465
 466       <device Dname="ARMCM23_TZ">
 467         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 468         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 469       </device>
 470     </family>
 471
 472     <!-- ******************************  Cortex-M33  ****************************** -->
 473     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 474       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 475       <description>
 476 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 477 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 478       </description>
 479       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 480       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 481       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 482       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 483       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 484       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 485
 486       <device Dname="ARMCM33">
 487         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 488         <description>
 489           no DSP Instructions, no Floating Point Unit, no TrustZone
 490         </description>
 491         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 492       </device>
 493
 494       <device Dname="ARMCM33_TZ">
 495         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 496         <description>
 497           no DSP Instructions, no Floating Point Unit, TrustZone
 498         </description>
 499         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 500       </device>
 501
 502       <device Dname="ARMCM33_DSP_FP">
 503         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 504         <description>
 505           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 506         </description>
 507         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 508       </device>
 509
 510       <device Dname="ARMCM33_DSP_FP_TZ">
 511         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 512         <description>
 513           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 514         </description>
 515         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 516       </device>
 517     </family>
 518
 519     <!-- ******************************  Cortex-M35P  ****************************** -->
 520     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 521       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 522       <description>
 523 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 524 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 525       </description>
 526
 527       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 528       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 529       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 530       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 531       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 532       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 533
 534       <device Dname="ARMCM35P">
 535         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 536         <description>
 537           no DSP Instructions, no Floating Point Unit, no TrustZone
 538         </description>
 539         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 540       </device>
 541
 542       <device Dname="ARMCM35P_TZ">
 543         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 544         <description>
 545           no DSP Instructions, no Floating Point Unit, TrustZone
 546         </description>
 547         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 548       </device>
 549
 550       <device Dname="ARMCM35P_DSP_FP">
 551         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 552         <description>
 553           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 554         </description>
 555         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 556       </device>
 557
 558       <device Dname="ARMCM35P_DSP_FP_TZ">
 559         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 560         <description>
 561           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 562         </description>
 563         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 564       </device>
 565     </family>
 566
 567     <!-- ******************************  ARMSC000  ****************************** -->
 568     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 569       <description>
 570 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 571 - simple, easy-to-use programmers model
 572 - highly efficient ultra-low power operation
 573 - excellent code density
 574 - deterministic, high-performance interrupt handling
 575       </description>
 576       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 577       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 578       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 579       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 580
 581       <device Dname="ARMSC000">
 582         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 583         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 584       </device>
 585     </family>
 586
 587     <!-- ******************************  ARMSC300  ****************************** -->
 588     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 589       <description>
 590 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 591 - simple, easy-to-use programmers model
 592 - highly efficient ultra-low power operation
 593 - excellent code density
 594 - deterministic, high-performance interrupt handling
 595       </description>
 596       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 597       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 598       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 599       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 600
 601       <device Dname="ARMSC300">
 602         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 603         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 604       </device>
 605     </family>
 606
 607     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 608     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 609       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 610       <description>
 611 Armv8-M Baseline based device with TrustZone
 612       </description>
 613       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 614       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 615       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 616       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 617       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 618       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 619
 620       <device Dname="ARMv8MBL">
 621         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 622         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 623       </device>
 624     </family>
 625
 626     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 627     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 628       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 629       <description>
 630 Armv8-M Mainline based device with TrustZone
 631       </description>
 632       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 633       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 634       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 635       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 636       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 637       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 638
 639       <device Dname="ARMv8MML">
 640         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 641         <description>
 642           no DSP Instructions, no Floating Point Unit, TrustZone
 643         </description>
 644         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 645       </device>
 646
 647       <device Dname="ARMv8MML_DSP">
 648         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 649         <description>
 650           DSP Instructions, no Floating Point Unit, TrustZone
 651         </description>
 652         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 653       </device>
 654
 655       <device Dname="ARMv8MML_SP">
 656         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 657         <description>
 658           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 659         </description>
 660         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 661       </device>
 662
 663       <device Dname="ARMv8MML_DSP_SP">
 664         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 665         <description>
 666           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 667         </description>
 668         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 669       </device>
 670
 671       <device Dname="ARMv8MML_DP">
 672         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 673         <description>
 674           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 675         </description>
 676         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 677       </device>
 678
 679       <device Dname="ARMv8MML_DSP_DP">
 680         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 681         <description>
 682           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 683         </description>
 684         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 685       </device>
 686     </family>
 687
 688     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 689     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 690       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 691       <description>
 692 Armv8.1-M Mainline based device with TrustZone and MVE
 693       </description>
 694       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 695       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 696       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 697       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 698       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 699       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 700
 701
 702       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 703         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 704         <description>
 705           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 706         </description>
 707         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 708       </device>
 709     </family>
 710
 711     <!-- ******************************  Cortex-A5  ****************************** -->
 712     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 713       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 714       <description>
 715 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 716 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 717 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 718       </description>
 719
 720       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 721       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 722       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 723       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 724
 725       <device Dname="ARMCA5">
 726         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 727         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 728       </device>
 729     </family>
 730
 731     <!-- ******************************  Cortex-A7  ****************************** -->
 732     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 733       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 734       <description>
 735 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 736 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 737 an optional integrated GIC, and an optional L2 cache controller.
 738       </description>
 739
 740       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 741       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 742       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 743       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 744
 745       <device Dname="ARMCA7">
 746         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 747         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 748       </device>
 749     </family>
 750
 751     <!-- ******************************  Cortex-A9  ****************************** -->
 752     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 753       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 754       <description>
 755 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 756 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 757 and 8-bit Java bytecodes in Jazelle state.
 758       </description>
 759
 760       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 761       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 762       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 763       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 764
 765       <device Dname="ARMCA9">
 766         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 767         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 768       </device>
 769     </family>
 770   </devices>
 771
 772
 773   <apis>
 774     <!-- CMSIS Device API -->
 775     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 776       <description>Device interrupt controller interface</description>
 777       <files>
 778         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 779       </files>
 780     </api>
 781     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 782       <description>RTOS Kernel system tick timer interface</description>
 783       <files>
 784         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 785       </files>
 786     </api>
 787     <!-- CMSIS-RTOS API -->
 788     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 789       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 790       <files>
 791         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 792       </files>
 793     </api>
 794     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 795       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 796       <files>
 797         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 798         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 799       </files>
 800     </api>
 801     <!-- CMSIS Driver API -->
 802     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 803       <description>USART Driver API for Cortex-M</description>
 804       <files>
 805         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 806         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 807       </files>
 808     </api>
 809     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 810       <description>SPI Driver API for Cortex-M</description>
 811       <files>
 812         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 813         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 814       </files>
 815     </api>
 816     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 817       <description>SAI Driver API for Cortex-M</description>
 818       <files>
 819         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 820         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 821       </files>
 822     </api>
 823     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 824       <description>I2C Driver API for Cortex-M</description>
 825       <files>
 826         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 827         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 828       </files>
 829     </api>
 830     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 831       <description>CAN Driver API for Cortex-M</description>
 832       <files>
 833         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 834         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 835       </files>
 836     </api>
 837     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.2.0" exclusive="0">
 838       <description>Flash Driver API for Cortex-M</description>
 839       <files>
 840         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 841         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 842       </files>
 843     </api>
 844     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 845       <description>MCI Driver API for Cortex-M</description>
 846       <files>
 847         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 848         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 849       </files>
 850     </api>
 851     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 852       <description>NAND Flash Driver API for Cortex-M</description>
 853       <files>
 854         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 855         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 856       </files>
 857     </api>
 858     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 859       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 860       <files>
 861         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 862         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 863         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 864       </files>
 865     </api>
 866     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 867       <description>Ethernet MAC Driver API for Cortex-M</description>
 868       <files>
 869         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 870         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 871       </files>
 872     </api>
 873     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 874       <description>Ethernet PHY Driver API for Cortex-M</description>
 875       <files>
 876         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 877         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 878       </files>
 879     </api>
 880     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 881       <description>USB Device Driver API for Cortex-M</description>
 882       <files>
 883         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 884         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 885       </files>
 886     </api>
 887     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 888       <description>USB Host Driver API for Cortex-M</description>
 889       <files>
 890         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 891         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 892       </files>
 893     </api>
 894     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.0.0-beta" exclusive="0">
 895       <description>WiFi driver</description>
 896       <files>
 897         <file category="doc"  name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 898         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 899       </files>
 900     </api>
 901   </apis>
 902
 903   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 904   <conditions>
 905     <!-- compiler -->
 906     <condition id="ARMCC6">
 907       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 908       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 909     </condition>
 910     <condition id="ARMCC5">
 911       <require Tcompiler="ARMCC" Toptions="AC5"/>
 912     </condition>
 913     <condition id="ARMCC">
 914       <require Tcompiler="ARMCC"/>
 915     </condition>
 916     <condition id="GCC">
 917       <require Tcompiler="GCC"/>
 918     </condition>
 919     <condition id="IAR">
 920       <require Tcompiler="IAR"/>
 921     </condition>
 922     <condition id="ARMCC GCC">
 923       <accept Tcompiler="ARMCC"/>
 924       <accept Tcompiler="GCC"/>
 925     </condition>
 926     <condition id="ARMCC GCC IAR">
 927       <accept Tcompiler="ARMCC"/>
 928       <accept Tcompiler="GCC"/>
 929       <accept Tcompiler="IAR"/>
 930     </condition>
 931
 932     <!-- Arm architecture -->
 933     <condition id="ARMv6-M Device">
 934       <description>Armv6-M architecture based device</description>
 935       <accept Dcore="Cortex-M0"/>
 936       <accept Dcore="Cortex-M1"/>
 937       <accept Dcore="Cortex-M0+"/>
 938       <accept Dcore="SC000"/>
 939     </condition>
 940     <condition id="ARMv7-M Device">
 941       <description>Armv7-M architecture based device</description>
 942       <accept Dcore="Cortex-M3"/>
 943       <accept Dcore="Cortex-M4"/>
 944       <accept Dcore="Cortex-M7"/>
 945       <accept Dcore="SC300"/>
 946     </condition>
 947     <condition id="ARMv8-M Device">
 948       <description>Armv8-M architecture based device</description>
 949       <accept Dcore="ARMV8MBL"/>
 950       <accept Dcore="ARMV8MML"/>
 951       <accept Dcore="ARMV81MML"/>
 952       <accept Dcore="Cortex-M23"/>
 953       <accept Dcore="Cortex-M33"/>
 954       <accept Dcore="Cortex-M35P"/>
 955     </condition>
 956     <condition id="ARMv8-M TZ Device">
 957       <description>Armv8-M architecture based device with TrustZone</description>
 958       <require condition="ARMv8-M Device"/>
 959       <require Dtz="TZ"/>
 960     </condition>
 961     <condition id="ARMv6_7-M Device">
 962       <description>Armv6_7-M architecture based device</description>
 963       <accept condition="ARMv6-M Device"/>
 964       <accept condition="ARMv7-M Device"/>
 965     </condition>
 966     <condition id="ARMv6_7_8-M Device">
 967       <description>Armv6_7_8-M architecture based device</description>
 968       <accept condition="ARMv6-M Device"/>
 969       <accept condition="ARMv7-M Device"/>
 970       <accept condition="ARMv8-M Device"/>
 971     </condition>
 972     <condition id="ARMv7-A Device">
 973       <description>Armv7-A architecture based device</description>
 974       <accept Dcore="Cortex-A5"/>
 975       <accept Dcore="Cortex-A7"/>
 976       <accept Dcore="Cortex-A9"/>
 977     </condition>
 978
 979     <!-- ARM core -->
 980     <condition id="CM0">
 981       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 982       <accept Dcore="Cortex-M0"/>
 983       <accept Dcore="Cortex-M0+"/>
 984       <accept Dcore="SC000"/>
 985     </condition>
 986     <condition id="CM1">
 987       <description>Cortex-M1</description>
 988       <require Dcore="Cortex-M1"/>
 989     </condition>
 990     <condition id="CM3">
 991       <description>Cortex-M3 or SC300 processor based device</description>
 992       <accept Dcore="Cortex-M3"/>
 993       <accept Dcore="SC300"/>
 994     </condition>
 995     <condition id="CM4">
 996       <description>Cortex-M4 processor based device</description>
 997       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 998     </condition>
 999     <condition id="CM4_FP">
1000       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1001       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1002       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1003       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1004     </condition>
1005     <condition id="CM7">
1006       <description>Cortex-M7 processor based device</description>
1007       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1008     </condition>
1009     <condition id="CM7_FP">
1010       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1011       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1012       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1013     </condition>
1014     <condition id="CM7_SP">
1015       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
1016       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1017     </condition>
1018     <condition id="CM7_DP">
1019       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
1020       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1021     </condition>
1022     <condition id="CM23">
1023       <description>Cortex-M23 processor based device</description>
1024       <require Dcore="Cortex-M23"/>
1025     </condition>
1026     <condition id="CM33">
1027       <description>Cortex-M33 processor based device</description>
1028       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1029     </condition>
1030     <condition id="CM33_FP">
1031       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1032       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1033     </condition>
1034     <condition id="CM35P">
1035       <description>Cortex-M35P processor based device</description>
1036       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1037     </condition>
1038     <condition id="CM35P_FP">
1039       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1040       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1041     </condition>
1042     <condition id="ARMv8MBL">
1043       <description>Armv8-M Baseline processor based device</description>
1044       <require Dcore="ARMV8MBL"/>
1045     </condition>
1046     <condition id="ARMv8MML">
1047       <description>Armv8-M Mainline processor based device</description>
1048       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1049     </condition>
1050     <condition id="ARMv8MML_FP">
1051       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1052       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1053       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1054     </condition>
1055
1056     <condition id="CM33_NODSP_NOFPU">
1057       <description>CM33, no DSP, no FPU</description>
1058       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1059     </condition>
1060     <condition id="CM33_DSP_NOFPU">
1061       <description>CM33, DSP, no FPU</description>
1062       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
1063     </condition>
1064     <condition id="CM33_NODSP_SP">
1065       <description>CM33, no DSP, SP FPU</description>
1066       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1067     </condition>
1068     <condition id="CM33_DSP_SP">
1069       <description>CM33, DSP, SP FPU</description>
1070       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
1071     </condition>
1072
1073     <condition id="CM35P_NODSP_NOFPU">
1074       <description>CM35P, no DSP, no FPU</description>
1075       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1076     </condition>
1077     <condition id="CM35P_DSP_NOFPU">
1078       <description>CM35P, DSP, no FPU</description>
1079       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="NO_FPU"/>
1080     </condition>
1081     <condition id="CM35P_NODSP_SP">
1082       <description>CM35P, no DSP, SP FPU</description>
1083       <require Dcore="Cortex-M35P" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1084     </condition>
1085     <condition id="CM35P_DSP_SP">
1086       <description>CM35P, DSP, SP FPU</description>
1087       <require Dcore="Cortex-M35P" Ddsp="DSP" Dfpu="SP_FPU"/>
1088     </condition>
1089
1090     <condition id="ARMv8MML_NODSP_NOFPU">
1091       <description>Armv8-M Mainline, no DSP, no FPU</description>
1092       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
1093     </condition>
1094     <condition id="ARMv8MML_DSP_NOFPU">
1095       <description>Armv8-M Mainline, DSP, no FPU</description>
1096       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
1097     </condition>
1098     <condition id="ARMv8MML_NODSP_SP">
1099       <description>Armv8-M Mainline, no DSP, SP FPU</description>
1100       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
1101     </condition>
1102     <condition id="ARMv8MML_DSP_SP">
1103       <description>Armv8-M Mainline, DSP, SP FPU</description>
1104       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
1105     </condition>
1106
1107     <condition id="ARMv81MML">
1108       <description>Armv8.1-M Mainline</description>
1109       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
1110     </condition>
1111
1112     <condition id="CA5_CA9">
1113       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1114       <accept Dcore="Cortex-A5"/>
1115       <accept Dcore="Cortex-A9"/>
1116     </condition>
1117
1118     <condition id="CA7">
1119       <description>Cortex-A7 processor based device</description>
1120       <accept Dcore="Cortex-A7"/>
1121     </condition>
1122
1123     <!-- ARMCC compiler -->
1124     <condition id="CA_ARMCC5">
1125       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1126       <require condition="ARMv7-A Device"/>
1127       <require condition="ARMCC5"/>
1128     </condition>
1129     <condition id="CA_ARMCC6">
1130       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1131       <require condition="ARMv7-A Device"/>
1132       <require condition="ARMCC6"/>
1133     </condition>
1134
1135     <condition id="CM0_ARMCC">
1136       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1137       <require condition="CM0"/>
1138       <require Tcompiler="ARMCC"/>
1139     </condition>
1140     <condition id="CM0_LE_ARMCC">
1141       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1142       <require condition="CM0_ARMCC"/>
1143       <require Dendian="Little-endian"/>
1144     </condition>
1145     <condition id="CM0_BE_ARMCC">
1146       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1147       <require condition="CM0_ARMCC"/>
1148       <require Dendian="Big-endian"/>
1149     </condition>
1150
1151     <condition id="CM1_ARMCC">
1152       <description>Cortex-M1 based device for the Arm Compiler</description>
1153       <require condition="CM1"/>
1154       <require Tcompiler="ARMCC"/>
1155     </condition>
1156     <condition id="CM1_LE_ARMCC">
1157       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1158       <require condition="CM1_ARMCC"/>
1159       <require Dendian="Little-endian"/>
1160     </condition>
1161     <condition id="CM1_BE_ARMCC">
1162       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1163       <require condition="CM1_ARMCC"/>
1164       <require Dendian="Big-endian"/>
1165     </condition>
1166
1167     <condition id="CM3_ARMCC">
1168       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1169       <require condition="CM3"/>
1170       <require Tcompiler="ARMCC"/>
1171     </condition>
1172     <condition id="CM3_LE_ARMCC">
1173       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1174       <require condition="CM3_ARMCC"/>
1175       <require Dendian="Little-endian"/>
1176     </condition>
1177     <condition id="CM3_BE_ARMCC">
1178       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1179       <require condition="CM3_ARMCC"/>
1180       <require Dendian="Big-endian"/>
1181     </condition>
1182
1183     <condition id="CM4_ARMCC">
1184       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1185       <require condition="CM4"/>
1186       <require Tcompiler="ARMCC"/>
1187     </condition>
1188     <condition id="CM4_LE_ARMCC">
1189       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1190       <require condition="CM4_ARMCC"/>
1191       <require Dendian="Little-endian"/>
1192     </condition>
1193     <condition id="CM4_BE_ARMCC">
1194       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1195       <require condition="CM4_ARMCC"/>
1196       <require Dendian="Big-endian"/>
1197     </condition>
1198
1199     <condition id="CM4_FP_ARMCC">
1200       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1201       <require condition="CM4_FP"/>
1202       <require Tcompiler="ARMCC"/>
1203     </condition>
1204     <condition id="CM4_FP_LE_ARMCC">
1205       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1206       <require condition="CM4_FP_ARMCC"/>
1207       <require Dendian="Little-endian"/>
1208     </condition>
1209     <condition id="CM4_FP_BE_ARMCC">
1210       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1211       <require condition="CM4_FP_ARMCC"/>
1212       <require Dendian="Big-endian"/>
1213     </condition>
1214
1215     <condition id="CM7_ARMCC">
1216       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1217       <require condition="CM7"/>
1218       <require Tcompiler="ARMCC"/>
1219     </condition>
1220     <condition id="CM7_LE_ARMCC">
1221       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1222       <require condition="CM7_ARMCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="CM7_BE_ARMCC">
1226       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1227       <require condition="CM7_ARMCC"/>
1228       <require Dendian="Big-endian"/>
1229     </condition>
1230
1231     <condition id="CM7_FP_ARMCC">
1232       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1233       <require condition="CM7_FP"/>
1234       <require Tcompiler="ARMCC"/>
1235     </condition>
1236     <condition id="CM7_FP_LE_ARMCC">
1237       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1238       <require condition="CM7_FP_ARMCC"/>
1239       <require Dendian="Little-endian"/>
1240     </condition>
1241     <condition id="CM7_FP_BE_ARMCC">
1242       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1243       <require condition="CM7_FP_ARMCC"/>
1244       <require Dendian="Big-endian"/>
1245     </condition>
1246
1247     <condition id="CM7_SP_ARMCC">
1248       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1249       <require condition="CM7_SP"/>
1250       <require Tcompiler="ARMCC"/>
1251     </condition>
1252     <condition id="CM7_SP_LE_ARMCC">
1253       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1254       <require condition="CM7_SP_ARMCC"/>
1255       <require Dendian="Little-endian"/>
1256     </condition>
1257     <condition id="CM7_SP_BE_ARMCC">
1258       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1259       <require condition="CM7_SP_ARMCC"/>
1260       <require Dendian="Big-endian"/>
1261     </condition>
1262
1263     <condition id="CM7_DP_ARMCC">
1264       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1265       <require condition="CM7_DP"/>
1266       <require Tcompiler="ARMCC"/>
1267     </condition>
1268     <condition id="CM7_DP_LE_ARMCC">
1269       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1270       <require condition="CM7_DP_ARMCC"/>
1271       <require Dendian="Little-endian"/>
1272     </condition>
1273     <condition id="CM7_DP_BE_ARMCC">
1274       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1275       <require condition="CM7_DP_ARMCC"/>
1276       <require Dendian="Big-endian"/>
1277     </condition>
1278
1279     <condition id="CM23_ARMCC">
1280       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1281       <require condition="CM23"/>
1282       <require Tcompiler="ARMCC"/>
1283     </condition>
1284     <condition id="CM23_LE_ARMCC">
1285       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1286       <require condition="CM23_ARMCC"/>
1287       <require Dendian="Little-endian"/>
1288     </condition>
1289     <condition id="CM23_BE_ARMCC">
1290       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1291       <require condition="CM23_ARMCC"/>
1292       <require Dendian="Big-endian"/>
1293     </condition>
1294
1295     <condition id="CM33_ARMCC">
1296       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1297       <require condition="CM33"/>
1298       <require Tcompiler="ARMCC"/>
1299     </condition>
1300     <condition id="CM33_LE_ARMCC">
1301       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1302       <require condition="CM33_ARMCC"/>
1303       <require Dendian="Little-endian"/>
1304     </condition>
1305     <condition id="CM33_BE_ARMCC">
1306       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1307       <require condition="CM33_ARMCC"/>
1308       <require Dendian="Big-endian"/>
1309     </condition>
1310
1311     <condition id="CM33_FP_ARMCC">
1312       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1313       <require condition="CM33_FP"/>
1314       <require Tcompiler="ARMCC"/>
1315     </condition>
1316     <condition id="CM33_FP_LE_ARMCC">
1317       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1318       <require condition="CM33_FP_ARMCC"/>
1319       <require Dendian="Little-endian"/>
1320     </condition>
1321     <condition id="CM33_FP_BE_ARMCC">
1322       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1323       <require condition="CM33_FP_ARMCC"/>
1324       <require Dendian="Big-endian"/>
1325     </condition>
1326
1327     <condition id="CM33_NODSP_NOFPU_ARMCC">
1328       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1329       <require condition="CM33_NODSP_NOFPU"/>
1330       <require Tcompiler="ARMCC"/>
1331     </condition>
1332     <condition id="CM33_DSP_NOFPU_ARMCC">
1333       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1334       <require condition="CM33_DSP_NOFPU"/>
1335       <require Tcompiler="ARMCC"/>
1336     </condition>
1337     <condition id="CM33_NODSP_SP_ARMCC">
1338       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1339       <require condition="CM33_NODSP_SP"/>
1340       <require Tcompiler="ARMCC"/>
1341     </condition>
1342     <condition id="CM33_DSP_SP_ARMCC">
1343       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1344       <require condition="CM33_DSP_SP"/>
1345       <require Tcompiler="ARMCC"/>
1346     </condition>
1347     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1348       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1349       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1350       <require Dendian="Little-endian"/>
1351     </condition>
1352     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1353       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1354       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1355       <require Dendian="Little-endian"/>
1356     </condition>
1357     <condition id="CM33_NODSP_SP_LE_ARMCC">
1358       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1359       <require condition="CM33_NODSP_SP_ARMCC"/>
1360       <require Dendian="Little-endian"/>
1361     </condition>
1362     <condition id="CM33_DSP_SP_LE_ARMCC">
1363       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1364       <require condition="CM33_DSP_SP_ARMCC"/>
1365       <require Dendian="Little-endian"/>
1366     </condition>
1367
1368     <condition id="CM35P_ARMCC">
1369       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1370       <require condition="CM35P"/>
1371       <require Tcompiler="ARMCC"/>
1372     </condition>
1373     <condition id="CM35P_LE_ARMCC">
1374       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1375       <require condition="CM35P_ARMCC"/>
1376       <require Dendian="Little-endian"/>
1377     </condition>
1378     <condition id="CM35P_BE_ARMCC">
1379       <description>Cortex-M35P processor based device in big endian mode for the Arm Compiler</description>
1380       <require condition="CM35P_ARMCC"/>
1381       <require Dendian="Big-endian"/>
1382     </condition>
1383
1384     <condition id="CM35P_FP_ARMCC">
1385       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1386       <require condition="CM35P_FP"/>
1387       <require Tcompiler="ARMCC"/>
1388     </condition>
1389     <condition id="CM35P_FP_LE_ARMCC">
1390       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1391       <require condition="CM35P_FP_ARMCC"/>
1392       <require Dendian="Little-endian"/>
1393     </condition>
1394     <condition id="CM35P_FP_BE_ARMCC">
1395       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1396       <require condition="CM35P_FP_ARMCC"/>
1397       <require Dendian="Big-endian"/>
1398     </condition>
1399
1400     <condition id="CM35P_NODSP_NOFPU_ARMCC">
1401       <description>Cortex-M35P processor, no DSP, no FPU, Arm Compiler</description>
1402       <require condition="CM35P_NODSP_NOFPU"/>
1403       <require Tcompiler="ARMCC"/>
1404     </condition>
1405     <condition id="CM35P_DSP_NOFPU_ARMCC">
1406       <description>Cortex-M35P processor, DSP, no FPU, Arm Compiler</description>
1407       <require condition="CM35P_DSP_NOFPU"/>
1408       <require Tcompiler="ARMCC"/>
1409     </condition>
1410     <condition id="CM35P_NODSP_SP_ARMCC">
1411       <description>Cortex-M35P processor, no DSP, SP FPU, Arm Compiler</description>
1412       <require condition="CM35P_NODSP_SP"/>
1413       <require Tcompiler="ARMCC"/>
1414     </condition>
1415     <condition id="CM35P_DSP_SP_ARMCC">
1416       <description>Cortex-M35P processor, DSP, SP FPU, Arm Compiler</description>
1417       <require condition="CM35P_DSP_SP"/>
1418       <require Tcompiler="ARMCC"/>
1419     </condition>
1420     <condition id="CM35P_NODSP_NOFPU_LE_ARMCC">
1421       <description>Cortex-M35P processor, little endian, no DSP, no FPU, Arm Compiler</description>
1422       <require condition="CM35P_NODSP_NOFPU_ARMCC"/>
1423       <require Dendian="Little-endian"/>
1424     </condition>
1425     <condition id="CM35P_DSP_NOFPU_LE_ARMCC">
1426       <description>Cortex-M35P processor, little endian, DSP, no FPU, Arm Compiler</description>
1427       <require condition="CM35P_DSP_NOFPU_ARMCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430     <condition id="CM35P_NODSP_SP_LE_ARMCC">
1431       <description>Cortex-M35P processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1432       <require condition="CM35P_NODSP_SP_ARMCC"/>
1433       <require Dendian="Little-endian"/>
1434     </condition>
1435     <condition id="CM35P_DSP_SP_LE_ARMCC">
1436       <description>Cortex-M35P processor, little endian, DSP, SP FPU, Arm Compiler</description>
1437       <require condition="CM35P_DSP_SP_ARMCC"/>
1438       <require Dendian="Little-endian"/>
1439     </condition>
1440
1441     <condition id="ARMv8MBL_ARMCC">
1442       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1443       <require condition="ARMv8MBL"/>
1444       <require Tcompiler="ARMCC"/>
1445     </condition>
1446     <condition id="ARMv8MBL_LE_ARMCC">
1447       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1448       <require condition="ARMv8MBL_ARMCC"/>
1449       <require Dendian="Little-endian"/>
1450     </condition>
1451     <condition id="ARMv8MBL_BE_ARMCC">
1452       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1453       <require condition="ARMv8MBL_ARMCC"/>
1454       <require Dendian="Big-endian"/>
1455     </condition>
1456
1457     <condition id="ARMv8MML_ARMCC">
1458       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1459       <require condition="ARMv8MML"/>
1460       <require Tcompiler="ARMCC"/>
1461     </condition>
1462     <condition id="ARMv8MML_LE_ARMCC">
1463       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1464       <require condition="ARMv8MML_ARMCC"/>
1465       <require Dendian="Little-endian"/>
1466     </condition>
1467     <condition id="ARMv8MML_BE_ARMCC">
1468       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1469       <require condition="ARMv8MML_ARMCC"/>
1470       <require Dendian="Big-endian"/>
1471     </condition>
1472
1473     <condition id="ARMv8MML_FP_ARMCC">
1474       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1475       <require condition="ARMv8MML_FP"/>
1476       <require Tcompiler="ARMCC"/>
1477     </condition>
1478     <condition id="ARMv8MML_FP_LE_ARMCC">
1479       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1480       <require condition="ARMv8MML_FP_ARMCC"/>
1481       <require Dendian="Little-endian"/>
1482     </condition>
1483     <condition id="ARMv8MML_FP_BE_ARMCC">
1484       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1485       <require condition="ARMv8MML_FP_ARMCC"/>
1486       <require Dendian="Big-endian"/>
1487     </condition>
1488
1489     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1490       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1491       <require condition="ARMv8MML_NODSP_NOFPU"/>
1492       <require Tcompiler="ARMCC"/>
1493     </condition>
1494     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1495       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1496       <require condition="ARMv8MML_DSP_NOFPU"/>
1497       <require Tcompiler="ARMCC"/>
1498     </condition>
1499     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1500       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1501       <require condition="ARMv8MML_NODSP_SP"/>
1502       <require Tcompiler="ARMCC"/>
1503     </condition>
1504     <condition id="ARMv8MML_DSP_SP_ARMCC">
1505       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1506       <require condition="ARMv8MML_DSP_SP"/>
1507       <require Tcompiler="ARMCC"/>
1508     </condition>
1509     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1510       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1511       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1512       <require Dendian="Little-endian"/>
1513     </condition>
1514     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1515       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1516       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1517       <require Dendian="Little-endian"/>
1518     </condition>
1519     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1520       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1521       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1522       <require Dendian="Little-endian"/>
1523     </condition>
1524     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1525       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1526       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1527       <require Dendian="Little-endian"/>
1528     </condition>
1529
1530     <!-- GCC compiler -->
1531     <condition id="CA_GCC">
1532       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1533       <require condition="ARMv7-A Device"/>
1534       <require Tcompiler="GCC"/>
1535     </condition>
1536
1537     <condition id="CM0_GCC">
1538       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1539       <require condition="CM0"/>
1540       <require Tcompiler="GCC"/>
1541     </condition>
1542     <condition id="CM0_LE_GCC">
1543       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1544       <require condition="CM0_GCC"/>
1545       <require Dendian="Little-endian"/>
1546     </condition>
1547     <condition id="CM0_BE_GCC">
1548       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1549       <require condition="CM0_GCC"/>
1550       <require Dendian="Big-endian"/>
1551     </condition>
1552
1553     <condition id="CM1_GCC">
1554       <description>Cortex-M1 based device for the GCC Compiler</description>
1555       <require condition="CM1"/>
1556       <require Tcompiler="GCC"/>
1557     </condition>
1558     <condition id="CM1_LE_GCC">
1559       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1560       <require condition="CM1_GCC"/>
1561       <require Dendian="Little-endian"/>
1562     </condition>
1563     <condition id="CM1_BE_GCC">
1564       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1565       <require condition="CM1_GCC"/>
1566       <require Dendian="Big-endian"/>
1567     </condition>
1568
1569     <condition id="CM3_GCC">
1570       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1571       <require condition="CM3"/>
1572       <require Tcompiler="GCC"/>
1573     </condition>
1574     <condition id="CM3_LE_GCC">
1575       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1576       <require condition="CM3_GCC"/>
1577       <require Dendian="Little-endian"/>
1578     </condition>
1579     <condition id="CM3_BE_GCC">
1580       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1581       <require condition="CM3_GCC"/>
1582       <require Dendian="Big-endian"/>
1583     </condition>
1584
1585     <condition id="CM4_GCC">
1586       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1587       <require condition="CM4"/>
1588       <require Tcompiler="GCC"/>
1589     </condition>
1590     <condition id="CM4_LE_GCC">
1591       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1592       <require condition="CM4_GCC"/>
1593       <require Dendian="Little-endian"/>
1594     </condition>
1595     <condition id="CM4_BE_GCC">
1596       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1597       <require condition="CM4_GCC"/>
1598       <require Dendian="Big-endian"/>
1599     </condition>
1600
1601     <condition id="CM4_FP_GCC">
1602       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1603       <require condition="CM4_FP"/>
1604       <require Tcompiler="GCC"/>
1605     </condition>
1606     <condition id="CM4_FP_LE_GCC">
1607       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1608       <require condition="CM4_FP_GCC"/>
1609       <require Dendian="Little-endian"/>
1610     </condition>
1611     <condition id="CM4_FP_BE_GCC">
1612       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1613       <require condition="CM4_FP_GCC"/>
1614       <require Dendian="Big-endian"/>
1615     </condition>
1616
1617     <condition id="CM7_GCC">
1618       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1619       <require condition="CM7"/>
1620       <require Tcompiler="GCC"/>
1621     </condition>
1622     <condition id="CM7_LE_GCC">
1623       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1624       <require condition="CM7_GCC"/>
1625       <require Dendian="Little-endian"/>
1626     </condition>
1627     <condition id="CM7_BE_GCC">
1628       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1629       <require condition="CM7_GCC"/>
1630       <require Dendian="Big-endian"/>
1631     </condition>
1632
1633     <condition id="CM7_FP_GCC">
1634       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1635       <require condition="CM7_FP"/>
1636       <require Tcompiler="GCC"/>
1637     </condition>
1638     <condition id="CM7_FP_LE_GCC">
1639       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1640       <require condition="CM7_FP_GCC"/>
1641       <require Dendian="Little-endian"/>
1642     </condition>
1643     <condition id="CM7_FP_BE_GCC">
1644       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1645       <require condition="CM7_FP_GCC"/>
1646       <require Dendian="Big-endian"/>
1647     </condition>
1648
1649     <condition id="CM7_SP_GCC">
1650       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1651       <require condition="CM7_SP"/>
1652       <require Tcompiler="GCC"/>
1653     </condition>
1654     <condition id="CM7_SP_LE_GCC">
1655       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1656       <require condition="CM7_SP_GCC"/>
1657       <require Dendian="Little-endian"/>
1658     </condition>
1659     <condition id="CM7_SP_BE_GCC">
1660       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1661       <require condition="CM7_SP_GCC"/>
1662       <require Dendian="Big-endian"/>
1663     </condition>
1664
1665     <condition id="CM7_DP_GCC">
1666       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1667       <require condition="CM7_DP"/>
1668       <require Tcompiler="GCC"/>
1669     </condition>
1670     <condition id="CM7_DP_LE_GCC">
1671       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1672       <require condition="CM7_DP_GCC"/>
1673       <require Dendian="Little-endian"/>
1674     </condition>
1675     <condition id="CM7_DP_BE_GCC">
1676       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1677       <require condition="CM7_DP_GCC"/>
1678       <require Dendian="Big-endian"/>
1679     </condition>
1680
1681     <condition id="CM23_GCC">
1682       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1683       <require condition="CM23"/>
1684       <require Tcompiler="GCC"/>
1685     </condition>
1686     <condition id="CM23_LE_GCC">
1687       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1688       <require condition="CM23_GCC"/>
1689       <require Dendian="Little-endian"/>
1690     </condition>
1691     <condition id="CM23_BE_GCC">
1692       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1693       <require condition="CM23_GCC"/>
1694       <require Dendian="Big-endian"/>
1695     </condition>
1696
1697     <condition id="CM33_GCC">
1698       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1699       <require condition="CM33"/>
1700       <require Tcompiler="GCC"/>
1701     </condition>
1702     <condition id="CM33_LE_GCC">
1703       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1704       <require condition="CM33_GCC"/>
1705       <require Dendian="Little-endian"/>
1706     </condition>
1707     <condition id="CM33_BE_GCC">
1708       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1709       <require condition="CM33_GCC"/>
1710       <require Dendian="Big-endian"/>
1711     </condition>
1712
1713     <condition id="CM33_FP_GCC">
1714       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1715       <require condition="CM33_FP"/>
1716       <require Tcompiler="GCC"/>
1717     </condition>
1718     <condition id="CM33_FP_LE_GCC">
1719       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1720       <require condition="CM33_FP_GCC"/>
1721       <require Dendian="Little-endian"/>
1722     </condition>
1723     <condition id="CM33_FP_BE_GCC">
1724       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1725       <require condition="CM33_FP_GCC"/>
1726       <require Dendian="Big-endian"/>
1727     </condition>
1728
1729     <condition id="CM33_NODSP_NOFPU_GCC">
1730       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1731       <require condition="CM33_NODSP_NOFPU"/>
1732       <require Tcompiler="GCC"/>
1733     </condition>
1734     <condition id="CM33_DSP_NOFPU_GCC">
1735       <description>CM33, DSP, no FPU, GCC Compiler</description>
1736       <require condition="CM33_DSP_NOFPU"/>
1737       <require Tcompiler="GCC"/>
1738     </condition>
1739     <condition id="CM33_NODSP_SP_GCC">
1740       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1741       <require condition="CM33_NODSP_SP"/>
1742       <require Tcompiler="GCC"/>
1743     </condition>
1744     <condition id="CM33_DSP_SP_GCC">
1745       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1746       <require condition="CM33_DSP_SP"/>
1747       <require Tcompiler="GCC"/>
1748     </condition>
1749     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1750       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1751       <require condition="CM33_NODSP_NOFPU_GCC"/>
1752       <require Dendian="Little-endian"/>
1753     </condition>
1754     <condition id="CM33_DSP_NOFPU_LE_GCC">
1755       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1756       <require condition="CM33_DSP_NOFPU_GCC"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759     <condition id="CM33_NODSP_SP_LE_GCC">
1760       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1761       <require condition="CM33_NODSP_SP_GCC"/>
1762       <require Dendian="Little-endian"/>
1763     </condition>
1764     <condition id="CM33_DSP_SP_LE_GCC">
1765       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1766       <require condition="CM33_DSP_SP_GCC"/>
1767       <require Dendian="Little-endian"/>
1768     </condition>
1769
1770     <condition id="CM35P_GCC">
1771       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1772       <require condition="CM35P"/>
1773       <require Tcompiler="GCC"/>
1774     </condition>
1775     <condition id="CM35P_LE_GCC">
1776       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1777       <require condition="CM35P_GCC"/>
1778       <require Dendian="Little-endian"/>
1779     </condition>
1780     <condition id="CM35P_BE_GCC">
1781       <description>Cortex-M35P processor based device in big endian mode for the GCC Compiler</description>
1782       <require condition="CM35P_GCC"/>
1783       <require Dendian="Big-endian"/>
1784     </condition>
1785
1786     <condition id="CM35P_FP_GCC">
1787       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1788       <require condition="CM35P_FP"/>
1789       <require Tcompiler="GCC"/>
1790     </condition>
1791     <condition id="CM35P_FP_LE_GCC">
1792       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1793       <require condition="CM35P_FP_GCC"/>
1794       <require Dendian="Little-endian"/>
1795     </condition>
1796     <condition id="CM35P_FP_BE_GCC">
1797       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1798       <require condition="CM35P_FP_GCC"/>
1799       <require Dendian="Big-endian"/>
1800     </condition>
1801
1802     <condition id="CM35P_NODSP_NOFPU_GCC">
1803       <description>CM35P, no DSP, no FPU, GCC Compiler</description>
1804       <require condition="CM35P_NODSP_NOFPU"/>
1805       <require Tcompiler="GCC"/>
1806     </condition>
1807     <condition id="CM35P_DSP_NOFPU_GCC">
1808       <description>CM35P, DSP, no FPU, GCC Compiler</description>
1809       <require condition="CM35P_DSP_NOFPU"/>
1810       <require Tcompiler="GCC"/>
1811     </condition>
1812     <condition id="CM35P_NODSP_SP_GCC">
1813       <description>CM35P, no DSP, SP FPU, GCC Compiler</description>
1814       <require condition="CM35P_NODSP_SP"/>
1815       <require Tcompiler="GCC"/>
1816     </condition>
1817     <condition id="CM35P_DSP_SP_GCC">
1818       <description>CM35P, DSP, SP FPU, GCC Compiler</description>
1819       <require condition="CM35P_DSP_SP"/>
1820       <require Tcompiler="GCC"/>
1821     </condition>
1822     <condition id="CM35P_NODSP_NOFPU_LE_GCC">
1823       <description>CM35P, little endian, no DSP, no FPU, GCC Compiler</description>
1824       <require condition="CM35P_NODSP_NOFPU_GCC"/>
1825       <require Dendian="Little-endian"/>
1826     </condition>
1827     <condition id="CM35P_DSP_NOFPU_LE_GCC">
1828       <description>CM35P, little endian, DSP, no FPU, GCC Compiler</description>
1829       <require condition="CM35P_DSP_NOFPU_GCC"/>
1830       <require Dendian="Little-endian"/>
1831     </condition>
1832     <condition id="CM35P_NODSP_SP_LE_GCC">
1833       <description>CM35P, little endian, no DSP, SP FPU, GCC Compiler</description>
1834       <require condition="CM35P_NODSP_SP_GCC"/>
1835       <require Dendian="Little-endian"/>
1836     </condition>
1837     <condition id="CM35P_DSP_SP_LE_GCC">
1838       <description>CM35P, little endian, DSP, SP FPU, GCC Compiler</description>
1839       <require condition="CM35P_DSP_SP_GCC"/>
1840       <require Dendian="Little-endian"/>
1841     </condition>
1842
1843     <condition id="ARMv8MBL_GCC">
1844       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1845       <require condition="ARMv8MBL"/>
1846       <require Tcompiler="GCC"/>
1847     </condition>
1848     <condition id="ARMv8MBL_LE_GCC">
1849       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1850       <require condition="ARMv8MBL_GCC"/>
1851       <require Dendian="Little-endian"/>
1852     </condition>
1853     <condition id="ARMv8MBL_BE_GCC">
1854       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1855       <require condition="ARMv8MBL_GCC"/>
1856       <require Dendian="Big-endian"/>
1857     </condition>
1858
1859     <condition id="ARMv8MML_GCC">
1860       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1861       <require condition="ARMv8MML"/>
1862       <require Tcompiler="GCC"/>
1863     </condition>
1864     <condition id="ARMv8MML_LE_GCC">
1865       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1866       <require condition="ARMv8MML_GCC"/>
1867       <require Dendian="Little-endian"/>
1868     </condition>
1869     <condition id="ARMv8MML_BE_GCC">
1870       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1871       <require condition="ARMv8MML_GCC"/>
1872       <require Dendian="Big-endian"/>
1873     </condition>
1874
1875     <condition id="ARMv8MML_FP_GCC">
1876       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1877       <require condition="ARMv8MML_FP"/>
1878       <require Tcompiler="GCC"/>
1879     </condition>
1880     <condition id="ARMv8MML_FP_LE_GCC">
1881       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1882       <require condition="ARMv8MML_FP_GCC"/>
1883       <require Dendian="Little-endian"/>
1884     </condition>
1885     <condition id="ARMv8MML_FP_BE_GCC">
1886       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1887       <require condition="ARMv8MML_FP_GCC"/>
1888       <require Dendian="Big-endian"/>
1889     </condition>
1890
1891     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1892       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1893       <require condition="ARMv8MML_NODSP_NOFPU"/>
1894       <require Tcompiler="GCC"/>
1895     </condition>
1896     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1897       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1898       <require condition="ARMv8MML_DSP_NOFPU"/>
1899       <require Tcompiler="GCC"/>
1900     </condition>
1901     <condition id="ARMv8MML_NODSP_SP_GCC">
1902       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1903       <require condition="ARMv8MML_NODSP_SP"/>
1904       <require Tcompiler="GCC"/>
1905     </condition>
1906     <condition id="ARMv8MML_DSP_SP_GCC">
1907       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1908       <require condition="ARMv8MML_DSP_SP"/>
1909       <require Tcompiler="GCC"/>
1910     </condition>
1911     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1912       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1913       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1914       <require Dendian="Little-endian"/>
1915     </condition>
1916     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1917       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1918       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1919       <require Dendian="Little-endian"/>
1920     </condition>
1921     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1922       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1923       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1924       <require Dendian="Little-endian"/>
1925     </condition>
1926     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1927       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1928       <require condition="ARMv8MML_DSP_SP_GCC"/>
1929       <require Dendian="Little-endian"/>
1930     </condition>
1931
1932     <!-- IAR compiler -->
1933     <condition id="CA_IAR">
1934       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1935       <require condition="ARMv7-A Device"/>
1936       <require Tcompiler="IAR"/>
1937     </condition>
1938
1939     <condition id="CM0_IAR">
1940       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1941       <require condition="CM0"/>
1942       <require Tcompiler="IAR"/>
1943     </condition>
1944     <condition id="CM0_LE_IAR">
1945       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1946       <require condition="CM0_IAR"/>
1947       <require Dendian="Little-endian"/>
1948     </condition>
1949     <condition id="CM0_BE_IAR">
1950       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1951       <require condition="CM0_IAR"/>
1952       <require Dendian="Big-endian"/>
1953     </condition>
1954
1955     <condition id="CM1_IAR">
1956       <description>Cortex-M1 based device for the IAR Compiler</description>
1957       <require condition="CM1"/>
1958       <require Tcompiler="IAR"/>
1959     </condition>
1960     <condition id="CM1_LE_IAR">
1961       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1962       <require condition="CM1_IAR"/>
1963       <require Dendian="Little-endian"/>
1964     </condition>
1965     <condition id="CM1_BE_IAR">
1966       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1967       <require condition="CM1_IAR"/>
1968       <require Dendian="Big-endian"/>
1969     </condition>
1970
1971     <condition id="CM3_IAR">
1972       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1973       <require condition="CM3"/>
1974       <require Tcompiler="IAR"/>
1975     </condition>
1976     <condition id="CM3_LE_IAR">
1977       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1978       <require condition="CM3_IAR"/>
1979       <require Dendian="Little-endian"/>
1980     </condition>
1981     <condition id="CM3_BE_IAR">
1982       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1983       <require condition="CM3_IAR"/>
1984       <require Dendian="Big-endian"/>
1985     </condition>
1986
1987     <condition id="CM4_IAR">
1988       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1989       <require condition="CM4"/>
1990       <require Tcompiler="IAR"/>
1991     </condition>
1992     <condition id="CM4_LE_IAR">
1993       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1994       <require condition="CM4_IAR"/>
1995       <require Dendian="Little-endian"/>
1996     </condition>
1997     <condition id="CM4_BE_IAR">
1998       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1999       <require condition="CM4_IAR"/>
2000       <require Dendian="Big-endian"/>
2001     </condition>
2002
2003     <condition id="CM4_FP_IAR">
2004       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
2005       <require condition="CM4_FP"/>
2006       <require Tcompiler="IAR"/>
2007     </condition>
2008     <condition id="CM4_FP_LE_IAR">
2009       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2010       <require condition="CM4_FP_IAR"/>
2011       <require Dendian="Little-endian"/>
2012     </condition>
2013     <condition id="CM4_FP_BE_IAR">
2014       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2015       <require condition="CM4_FP_IAR"/>
2016       <require Dendian="Big-endian"/>
2017     </condition>
2018
2019     <condition id="CM7_IAR">
2020       <description>Cortex-M7 processor based device for the IAR Compiler</description>
2021       <require condition="CM7"/>
2022       <require Tcompiler="IAR"/>
2023     </condition>
2024     <condition id="CM7_LE_IAR">
2025       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
2026       <require condition="CM7_IAR"/>
2027       <require Dendian="Little-endian"/>
2028     </condition>
2029     <condition id="CM7_BE_IAR">
2030       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
2031       <require condition="CM7_IAR"/>
2032       <require Dendian="Big-endian"/>
2033     </condition>
2034
2035     <condition id="CM7_FP_IAR">
2036       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
2037       <require condition="CM7_FP"/>
2038       <require Tcompiler="IAR"/>
2039     </condition>
2040     <condition id="CM7_FP_LE_IAR">
2041       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2042       <require condition="CM7_FP_IAR"/>
2043       <require Dendian="Little-endian"/>
2044     </condition>
2045     <condition id="CM7_FP_BE_IAR">
2046       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2047       <require condition="CM7_FP_IAR"/>
2048       <require Dendian="Big-endian"/>
2049     </condition>
2050
2051     <condition id="CM7_SP_IAR">
2052       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
2053       <require condition="CM7_SP"/>
2054       <require Tcompiler="IAR"/>
2055     </condition>
2056     <condition id="CM7_SP_LE_IAR">
2057       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
2058       <require condition="CM7_SP_IAR"/>
2059       <require Dendian="Little-endian"/>
2060     </condition>
2061     <condition id="CM7_SP_BE_IAR">
2062       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
2063       <require condition="CM7_SP_IAR"/>
2064       <require Dendian="Big-endian"/>
2065     </condition>
2066
2067     <condition id="CM7_DP_IAR">
2068       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
2069       <require condition="CM7_DP"/>
2070       <require Tcompiler="IAR"/>
2071     </condition>
2072     <condition id="CM7_DP_LE_IAR">
2073       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
2074       <require condition="CM7_DP_IAR"/>
2075       <require Dendian="Little-endian"/>
2076     </condition>
2077     <condition id="CM7_DP_BE_IAR">
2078       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
2079       <require condition="CM7_DP_IAR"/>
2080       <require Dendian="Big-endian"/>
2081     </condition>
2082
2083     <condition id="CM23_IAR">
2084       <description>Cortex-M23 processor based device for the IAR Compiler</description>
2085       <require condition="CM23"/>
2086       <require Tcompiler="IAR"/>
2087     </condition>
2088     <condition id="CM23_LE_IAR">
2089       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
2090       <require condition="CM23_IAR"/>
2091       <require Dendian="Little-endian"/>
2092     </condition>
2093     <condition id="CM23_BE_IAR">
2094       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
2095       <require condition="CM23_IAR"/>
2096       <require Dendian="Big-endian"/>
2097     </condition>
2098
2099     <condition id="CM33_IAR">
2100       <description>Cortex-M33 processor based device for the IAR Compiler</description>
2101       <require condition="CM33"/>
2102       <require Tcompiler="IAR"/>
2103     </condition>
2104     <condition id="CM33_LE_IAR">
2105       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
2106       <require condition="CM33_IAR"/>
2107       <require Dendian="Little-endian"/>
2108     </condition>
2109     <condition id="CM33_BE_IAR">
2110       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
2111       <require condition="CM33_IAR"/>
2112       <require Dendian="Big-endian"/>
2113     </condition>
2114
2115     <condition id="CM33_FP_IAR">
2116       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
2117       <require condition="CM33_FP"/>
2118       <require Tcompiler="IAR"/>
2119     </condition>
2120     <condition id="CM33_FP_LE_IAR">
2121       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2122       <require condition="CM33_FP_IAR"/>
2123       <require Dendian="Little-endian"/>
2124     </condition>
2125     <condition id="CM33_FP_BE_IAR">
2126       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2127       <require condition="CM33_FP_IAR"/>
2128       <require Dendian="Big-endian"/>
2129     </condition>
2130
2131     <condition id="CM33_NODSP_NOFPU_IAR">
2132       <description>CM33, no DSP, no FPU, IAR Compiler</description>
2133       <require condition="CM33_NODSP_NOFPU"/>
2134       <require Tcompiler="IAR"/>
2135     </condition>
2136     <condition id="CM33_DSP_NOFPU_IAR">
2137       <description>CM33, DSP, no FPU, IAR Compiler</description>
2138       <require condition="CM33_DSP_NOFPU"/>
2139       <require Tcompiler="IAR"/>
2140     </condition>
2141     <condition id="CM33_NODSP_SP_IAR">
2142       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
2143       <require condition="CM33_NODSP_SP"/>
2144       <require Tcompiler="IAR"/>
2145     </condition>
2146     <condition id="CM33_DSP_SP_IAR">
2147       <description>CM33, DSP, SP FPU, IAR Compiler</description>
2148       <require condition="CM33_DSP_SP"/>
2149       <require Tcompiler="IAR"/>
2150     </condition>
2151     <condition id="CM33_NODSP_NOFPU_LE_IAR">
2152       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
2153       <require condition="CM33_NODSP_NOFPU_IAR"/>
2154       <require Dendian="Little-endian"/>
2155     </condition>
2156     <condition id="CM33_DSP_NOFPU_LE_IAR">
2157       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
2158       <require condition="CM33_DSP_NOFPU_IAR"/>
2159       <require Dendian="Little-endian"/>
2160     </condition>
2161     <condition id="CM33_NODSP_SP_LE_IAR">
2162       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
2163       <require condition="CM33_NODSP_SP_IAR"/>
2164       <require Dendian="Little-endian"/>
2165     </condition>
2166     <condition id="CM33_DSP_SP_LE_IAR">
2167       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
2168       <require condition="CM33_DSP_SP_IAR"/>
2169       <require Dendian="Little-endian"/>
2170     </condition>
2171
2172     <condition id="CM35P_IAR">
2173       <description>Cortex-M35P processor based device for the IAR Compiler</description>
2174       <require condition="CM35P"/>
2175       <require Tcompiler="IAR"/>
2176     </condition>
2177     <condition id="CM35P_LE_IAR">
2178       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
2179       <require condition="CM35P_IAR"/>
2180       <require Dendian="Little-endian"/>
2181     </condition>
2182     <condition id="CM35P_BE_IAR">
2183       <description>Cortex-M35P processor based device in big endian mode for the IAR Compiler</description>
2184       <require condition="CM35P_IAR"/>
2185       <require Dendian="Big-endian"/>
2186     </condition>
2187
2188     <condition id="CM35P_FP_IAR">
2189       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
2190       <require condition="CM35P_FP"/>
2191       <require Tcompiler="IAR"/>
2192     </condition>
2193     <condition id="CM35P_FP_LE_IAR">
2194       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2195       <require condition="CM35P_FP_IAR"/>
2196       <require Dendian="Little-endian"/>
2197     </condition>
2198     <condition id="CM35P_FP_BE_IAR">
2199       <description>Cortex-M35P processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2200       <require condition="CM35P_FP_IAR"/>
2201       <require Dendian="Big-endian"/>
2202     </condition>
2203
2204     <condition id="CM35P_NODSP_NOFPU_IAR">
2205       <description>CM35P, no DSP, no FPU, IAR Compiler</description>
2206       <require condition="CM35P_NODSP_NOFPU"/>
2207       <require Tcompiler="IAR"/>
2208     </condition>
2209     <condition id="CM35P_DSP_NOFPU_IAR">
2210       <description>CM35P, DSP, no FPU, IAR Compiler</description>
2211       <require condition="CM35P_DSP_NOFPU"/>
2212       <require Tcompiler="IAR"/>
2213     </condition>
2214     <condition id="CM35P_NODSP_SP_IAR">
2215       <description>CM35P, no DSP, SP FPU, IAR Compiler</description>
2216       <require condition="CM35P_NODSP_SP"/>
2217       <require Tcompiler="IAR"/>
2218     </condition>
2219     <condition id="CM35P_DSP_SP_IAR">
2220       <description>CM35P, DSP, SP FPU, IAR Compiler</description>
2221       <require condition="CM35P_DSP_SP"/>
2222       <require Tcompiler="IAR"/>
2223     </condition>
2224     <condition id="CM35P_NODSP_NOFPU_LE_IAR">
2225       <description>CM35P, little endian, no DSP, no FPU, IAR Compiler</description>
2226       <require condition="CM35P_NODSP_NOFPU_IAR"/>
2227       <require Dendian="Little-endian"/>
2228     </condition>
2229     <condition id="CM35P_DSP_NOFPU_LE_IAR">
2230       <description>CM35P, little endian, DSP, no FPU, IAR Compiler</description>
2231       <require condition="CM35P_DSP_NOFPU_IAR"/>
2232       <require Dendian="Little-endian"/>
2233     </condition>
2234     <condition id="CM35P_NODSP_SP_LE_IAR">
2235       <description>CM35P, little endian, no DSP, SP FPU, IAR Compiler</description>
2236       <require condition="CM35P_NODSP_SP_IAR"/>
2237       <require Dendian="Little-endian"/>
2238     </condition>
2239     <condition id="CM35P_DSP_SP_LE_IAR">
2240       <description>CM35P, little endian, DSP, SP FPU, IAR Compiler</description>
2241       <require condition="CM35P_DSP_SP_IAR"/>
2242       <require Dendian="Little-endian"/>
2243     </condition>
2244
2245     <condition id="ARMv8MBL_IAR">
2246       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
2247       <require condition="ARMv8MBL"/>
2248       <require Tcompiler="IAR"/>
2249     </condition>
2250     <condition id="ARMv8MBL_LE_IAR">
2251       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
2252       <require condition="ARMv8MBL_IAR"/>
2253       <require Dendian="Little-endian"/>
2254     </condition>
2255     <condition id="ARMv8MBL_BE_IAR">
2256       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
2257       <require condition="ARMv8MBL_IAR"/>
2258       <require Dendian="Big-endian"/>
2259     </condition>
2260
2261     <condition id="ARMv8MML_IAR">
2262       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
2263       <require condition="ARMv8MML"/>
2264       <require Tcompiler="IAR"/>
2265     </condition>
2266     <condition id="ARMv8MML_LE_IAR">
2267       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
2268       <require condition="ARMv8MML_IAR"/>
2269       <require Dendian="Little-endian"/>
2270     </condition>
2271     <condition id="ARMv8MML_BE_IAR">
2272       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
2273       <require condition="ARMv8MML_IAR"/>
2274       <require Dendian="Big-endian"/>
2275     </condition>
2276
2277     <condition id="ARMv8MML_FP_IAR">
2278       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
2279       <require condition="ARMv8MML_FP"/>
2280       <require Tcompiler="IAR"/>
2281     </condition>
2282     <condition id="ARMv8MML_FP_LE_IAR">
2283       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
2284       <require condition="ARMv8MML_FP_IAR"/>
2285       <require Dendian="Little-endian"/>
2286     </condition>
2287     <condition id="ARMv8MML_FP_BE_IAR">
2288       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
2289       <require condition="ARMv8MML_FP_IAR"/>
2290       <require Dendian="Big-endian"/>
2291     </condition>
2292
2293     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
2294       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
2295       <require condition="ARMv8MML_NODSP_NOFPU"/>
2296       <require Tcompiler="IAR"/>
2297     </condition>
2298     <condition id="ARMv8MML_DSP_NOFPU_IAR">
2299       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
2300       <require condition="ARMv8MML_DSP_NOFPU"/>
2301       <require Tcompiler="IAR"/>
2302     </condition>
2303     <condition id="ARMv8MML_NODSP_SP_IAR">
2304       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
2305       <require condition="ARMv8MML_NODSP_SP"/>
2306       <require Tcompiler="IAR"/>
2307     </condition>
2308     <condition id="ARMv8MML_DSP_SP_IAR">
2309       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
2310       <require condition="ARMv8MML_DSP_SP"/>
2311       <require Tcompiler="IAR"/>
2312     </condition>
2313     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
2314       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
2315       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
2316       <require Dendian="Little-endian"/>
2317     </condition>
2318     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
2319       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
2320       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
2321       <require Dendian="Little-endian"/>
2322     </condition>
2323     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
2324       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
2325       <require condition="ARMv8MML_NODSP_SP_IAR"/>
2326       <require Dendian="Little-endian"/>
2327     </condition>
2328     <condition id="ARMv8MML_DSP_SP_LE_IAR">
2329       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
2330       <require condition="ARMv8MML_DSP_SP_IAR"/>
2331       <require Dendian="Little-endian"/>
2332     </condition>
2333
2334     <!-- conditions selecting single devices and CMSIS Core -->
2335     <!-- used for component startup, GCC version is used for C-Startup -->
2336     <condition id="ARMCM0 CMSIS">
2337       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
2338       <require Dvendor="ARM:82" Dname="ARMCM0"/>
2339       <require Cclass="CMSIS" Cgroup="CORE"/>
2340     </condition>
2341     <condition id="ARMCM0 CMSIS GCC">
2342       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
2343       <require condition="ARMCM0 CMSIS"/>
2344       <require condition="GCC"/>
2345     </condition>
2346
2347     <condition id="ARMCM0+ CMSIS">
2348       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
2349       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
2350       <require Cclass="CMSIS" Cgroup="CORE"/>
2351     </condition>
2352     <condition id="ARMCM0+ CMSIS GCC">
2353       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
2354       <require condition="ARMCM0+ CMSIS"/>
2355       <require condition="GCC"/>
2356     </condition>
2357
2358     <condition id="ARMCM1 CMSIS">
2359       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
2360       <require Dvendor="ARM:82" Dname="ARMCM1"/>
2361       <require Cclass="CMSIS" Cgroup="CORE"/>
2362     </condition>
2363     <condition id="ARMCM1 CMSIS GCC">
2364       <description>Generic ARM Cortex-M1 device startup and depends on CMSIS Core requiring GCC</description>
2365       <require condition="ARMCM1 CMSIS"/>
2366       <require condition="GCC"/>
2367     </condition>
2368
2369     <condition id="ARMCM3 CMSIS">
2370       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2371       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2372       <require Cclass="CMSIS" Cgroup="CORE"/>
2373     </condition>
2374     <condition id="ARMCM3 CMSIS GCC">
2375       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
2376       <require condition="ARMCM3 CMSIS"/>
2377       <require condition="GCC"/>
2378     </condition>
2379
2380     <condition id="ARMCM4 CMSIS">
2381       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2382       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2383       <require Cclass="CMSIS" Cgroup="CORE"/>
2384     </condition>
2385     <condition id="ARMCM4 CMSIS GCC">
2386       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
2387       <require condition="ARMCM4 CMSIS"/>
2388       <require condition="GCC"/>
2389     </condition>
2390
2391     <condition id="ARMCM7 CMSIS">
2392       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2393       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2394       <require Cclass="CMSIS" Cgroup="CORE"/>
2395     </condition>
2396     <condition id="ARMCM7 CMSIS GCC">
2397       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
2398       <require condition="ARMCM7 CMSIS"/>
2399       <require condition="GCC"/>
2400     </condition>
2401
2402     <condition id="ARMCM23 CMSIS">
2403       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2404       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2405       <require Cclass="CMSIS" Cgroup="CORE"/>
2406     </condition>
2407     <condition id="ARMCM23 CMSIS GCC">
2408       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
2409       <require condition="ARMCM23 CMSIS"/>
2410       <require condition="GCC"/>
2411     </condition>
2412
2413     <condition id="ARMCM33 CMSIS">
2414       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2415       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2416       <require Cclass="CMSIS" Cgroup="CORE"/>
2417     </condition>
2418     <condition id="ARMCM33 CMSIS GCC">
2419       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
2420       <require condition="ARMCM33 CMSIS"/>
2421       <require condition="GCC"/>
2422     </condition>
2423
2424     <condition id="ARMCM35P CMSIS">
2425       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2426       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2427       <require Cclass="CMSIS" Cgroup="CORE"/>
2428     </condition>
2429     <condition id="ARMCM35P CMSIS GCC">
2430       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core requiring GCC</description>
2431       <require condition="ARMCM35P CMSIS"/>
2432       <require condition="GCC"/>
2433     </condition>
2434
2435     <condition id="ARMSC000 CMSIS">
2436       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2437       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2438       <require Cclass="CMSIS" Cgroup="CORE"/>
2439     </condition>
2440     <condition id="ARMSC000 CMSIS GCC">
2441       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
2442       <require condition="ARMSC000 CMSIS"/>
2443       <require condition="GCC"/>
2444     </condition>
2445
2446     <condition id="ARMSC300 CMSIS">
2447       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2448       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2449       <require Cclass="CMSIS" Cgroup="CORE"/>
2450     </condition>
2451     <condition id="ARMSC300 CMSIS GCC">
2452       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
2453       <require condition="ARMSC300 CMSIS"/>
2454       <require condition="GCC"/>
2455     </condition>
2456
2457     <condition id="ARMv8MBL CMSIS">
2458       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2459       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2460       <require Cclass="CMSIS" Cgroup="CORE"/>
2461     </condition>
2462     <condition id="ARMv8MBL CMSIS GCC">
2463       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
2464       <require condition="ARMv8MBL CMSIS"/>
2465       <require condition="GCC"/>
2466     </condition>
2467
2468     <condition id="ARMv8MML CMSIS">
2469       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2470       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2471       <require Cclass="CMSIS" Cgroup="CORE"/>
2472     </condition>
2473     <condition id="ARMv8MML CMSIS GCC">
2474       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2475       <require condition="ARMv8MML CMSIS"/>
2476       <require condition="GCC"/>
2477     </condition>
2478
2479     <condition id="ARMv81MML CMSIS">
2480       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2481       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2482       <require Cclass="CMSIS" Cgroup="CORE"/>
2483     </condition>
2484     <condition id="ARMv81MML CMSIS GCC">
2485       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
2486       <require condition="ARMv81MML CMSIS"/>
2487       <require condition="GCC"/>
2488     </condition>
2489
2490     <condition id="ARMCA5 CMSIS">
2491       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2492       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2493       <require Cclass="CMSIS" Cgroup="CORE"/>
2494     </condition>
2495
2496     <condition id="ARMCA7 CMSIS">
2497       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2498       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2499       <require Cclass="CMSIS" Cgroup="CORE"/>
2500     </condition>
2501
2502     <condition id="ARMCA9 CMSIS">
2503       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2504       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2505       <require Cclass="CMSIS" Cgroup="CORE"/>
2506     </condition>
2507
2508     <!-- CMSIS DSP -->
2509     <condition id="CMSIS DSP">
2510       <description>Components required for DSP</description>
2511       <require condition="ARMv6_7_8-M Device"/>
2512       <require condition="ARMCC GCC IAR"/>
2513       <require Cclass="CMSIS" Cgroup="CORE"/>
2514     </condition>
2515
2516     <!-- CMSIS NN -->
2517     <condition id="CMSIS NN">
2518       <description>Components required for NN</description>
2519       <require condition="CMSIS DSP"/>
2520     </condition>
2521
2522     <!-- RTOS RTX -->
2523     <condition id="RTOS RTX">
2524       <description>Components required for RTOS RTX</description>
2525       <require condition="ARMv6_7-M Device"/>
2526       <require condition="ARMCC GCC IAR"/>
2527       <require Cclass="Device" Cgroup="Startup"/>
2528       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2529     </condition>
2530     <condition id="RTOS RTX IFX">
2531       <description>Components required for RTOS RTX IFX</description>
2532       <require condition="ARMv6_7-M Device"/>
2533       <require condition="ARMCC GCC IAR"/>
2534       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2535       <require Cclass="Device" Cgroup="Startup"/>
2536       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2537     </condition>
2538     <condition id="RTOS RTX5">
2539       <description>Components required for RTOS RTX5</description>
2540       <require condition="ARMv6_7_8-M Device"/>
2541       <require condition="ARMCC GCC IAR"/>
2542       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2543     </condition>
2544     <condition id="RTOS2 RTX5">
2545       <description>Components required for RTOS2 RTX5</description>
2546       <require condition="ARMv6_7_8-M Device"/>
2547       <require condition="ARMCC GCC IAR"/>
2548       <require Cclass="CMSIS"  Cgroup="CORE"/>
2549       <require Cclass="Device" Cgroup="Startup"/>
2550     </condition>
2551     <condition id="RTOS2 RTX5 v7-A">
2552       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2553       <require condition="ARMv7-A Device"/>
2554       <require condition="ARMCC GCC IAR"/>
2555       <require Cclass="CMSIS"  Cgroup="CORE"/>
2556       <require Cclass="Device" Cgroup="Startup"/>
2557       <require Cclass="Device" Cgroup="OS Tick"/>
2558       <require Cclass="Device" Cgroup="IRQ Controller"/>
2559     </condition>
2560     <condition id="RTOS2 RTX5 Lib">
2561       <description>Components required for RTOS2 RTX5 Library</description>
2562       <require condition="ARMv6_7_8-M Device"/>
2563       <require condition="ARMCC GCC IAR"/>
2564       <require Cclass="CMSIS"  Cgroup="CORE"/>
2565       <require Cclass="Device" Cgroup="Startup"/>
2566     </condition>
2567     <condition id="RTOS2 RTX5 NS">
2568       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2569       <require condition="ARMv8-M TZ Device"/>
2570       <require condition="ARMCC GCC IAR"/>
2571       <require Cclass="CMSIS"  Cgroup="CORE"/>
2572       <require Cclass="Device" Cgroup="Startup"/>
2573     </condition>
2574
2575     <!-- OS Tick -->
2576     <condition id="OS Tick PTIM">
2577       <description>Components required for OS Tick Private Timer</description>
2578       <require condition="CA5_CA9"/>
2579       <require Cclass="Device" Cgroup="IRQ Controller"/>
2580     </condition>
2581
2582     <condition id="OS Tick GTIM">
2583       <description>Components required for OS Tick Generic Physical Timer</description>
2584       <require condition="CA7"/>
2585       <require Cclass="Device" Cgroup="IRQ Controller"/>
2586     </condition>
2587
2588   </conditions>
2589
2590   <components>
2591     <!-- CMSIS-Core component -->
2592     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.2.0"  condition="ARMv6_7_8-M Device" >
2593       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2594       <files>
2595         <!-- CPU independent -->
2596         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2597         <file category="include" name="CMSIS/Core/Include/"/>
2598         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2599         <!-- Code template -->
2600         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2601         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2602       </files>
2603     </component>
2604
2605     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.3"  condition="ARMv7-A Device" >
2606       <description>CMSIS-CORE for Cortex-A</description>
2607       <files>
2608         <!-- CPU independent -->
2609         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2610         <file category="include" name="CMSIS/Core_A/Include/"/>
2611       </files>
2612     </component>
2613
2614     <!-- CMSIS-Startup components -->
2615     <!-- Cortex-M0 -->
2616     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0 CMSIS">
2617       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2618       <files>
2619         <!-- include folder / device header file -->
2620         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2621         <!-- startup / system file -->
2622         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2623         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.1.0" attr="config" condition="GCC"/>
2624         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2625         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2626         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2627       </files>
2628     </component>
2629     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0 CMSIS GCC">
2630       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2631       <files>
2632         <!-- include folder / device header file -->
2633         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2634         <!-- startup / system file -->
2635         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.1.0" attr="config" condition="GCC"/>
2636         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2637         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2638       </files>
2639     </component>
2640
2641     <!-- Cortex-M0+ -->
2642     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM0+ CMSIS">
2643       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2644       <files>
2645         <!-- include folder / device header file -->
2646         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2647         <!-- startup / system file -->
2648         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2649         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.1.0" attr="config" condition="GCC"/>
2650         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2651         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2652         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2653       </files>
2654     </component>
2655     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM0+ CMSIS GCC">
2656       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2657       <files>
2658         <!-- include folder / device header file -->
2659         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2660         <!-- startup / system file -->
2661         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.1.0" attr="config" condition="GCC"/>
2662         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2663         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2664       </files>
2665     </component>
2666
2667     <!-- Cortex-M1 -->
2668     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM1 CMSIS">
2669       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2670       <files>
2671         <!-- include folder / device header file -->
2672         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2673         <!-- startup / system file -->
2674         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.0" attr="config" condition="ARMCC"/>
2675         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="1.1.0" attr="config" condition="GCC"/>
2676         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2677         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2678         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2679       </files>
2680     </component>
2681     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM1 CMSIS GCC">
2682       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2683       <files>
2684         <!-- include folder / device header file -->
2685         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2686         <!-- startup / system file -->
2687         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.c" version="1.1.0" attr="config" condition="GCC"/>
2688         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2689         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2690       </files>
2691     </component>
2692
2693     <!-- Cortex-M3 -->
2694     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM3 CMSIS">
2695       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2696       <files>
2697         <!-- include folder / device header file -->
2698         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2699         <!-- startup / system file -->
2700         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2701         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.1.0" attr="config" condition="GCC"/>
2702         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2703         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2704         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2705       </files>
2706     </component>
2707     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM3 CMSIS GCC">
2708       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2709       <files>
2710         <!-- include folder / device header file -->
2711         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2712         <!-- startup / system file -->
2713         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.1.0" attr="config" condition="GCC"/>
2714         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2715         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2716       </files>
2717     </component>
2718
2719     <!-- Cortex-M4 -->
2720     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM4 CMSIS">
2721       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2722       <files>
2723         <!-- include folder / device header file -->
2724         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2725         <!-- startup / system file -->
2726         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2727         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.1.0" attr="config" condition="GCC"/>
2728         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2729         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2730         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2731       </files>
2732     </component>
2733     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM4 CMSIS GCC">
2734       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2735       <files>
2736         <!-- include folder / device header file -->
2737         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2738         <!-- startup / system file -->
2739         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.1.0" attr="config" condition="GCC"/>
2740         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2741         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2742       </files>
2743     </component>
2744
2745     <!-- Cortex-M7 -->
2746     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM7 CMSIS">
2747       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2748       <files>
2749         <!-- include folder / device header file -->
2750         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2751         <!-- startup / system file -->
2752         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2753         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.1.0" attr="config" condition="GCC"/>
2754         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2755         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2756         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2757       </files>
2758     </component>
2759     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM7 CMSIS GCC">
2760       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2761       <files>
2762         <!-- include folder / device header file -->
2763         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2764         <!-- startup / system file -->
2765         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.1.0" attr="config" condition="GCC"/>
2766         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2767         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2768       </files>
2769     </component>
2770
2771     <!-- Cortex-M23 -->
2772     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2773       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2774       <files>
2775         <!-- include folder / device header file -->
2776         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2777         <!-- startup / system file -->
2778         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2779         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.1.0" attr="config" condition="GCC"/>
2780         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2781         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2782         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2783         <!-- SAU configuration -->
2784         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2785       </files>
2786     </component>
2787     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2788       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2789       <files>
2790         <!-- include folder / device header file -->
2791         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2792         <!-- startup / system file -->
2793         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.1.0" attr="config" condition="GCC"/>
2794         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2795         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2796         <!-- SAU configuration -->
2797         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2798       </files>
2799     </component>
2800
2801     <!-- Cortex-M33 -->
2802     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2803       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2804       <files>
2805         <!-- include folder / device header file -->
2806         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2807         <!-- startup / system file -->
2808         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2809         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="GCC"/>
2810         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2811         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2812         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2813         <!-- SAU configuration -->
2814         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2815       </files>
2816     </component>
2817     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2818       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2819       <files>
2820         <!-- include folder / device header file -->
2821         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2822         <!-- startup / system file -->
2823         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.1.0" attr="config" condition="GCC"/>
2824         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2825         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2826         <!-- SAU configuration -->
2827         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2828       </files>
2829     </component>
2830
2831     <!-- Cortex-M35P -->
2832     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM35P CMSIS">
2833       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2834       <files>
2835         <!-- include folder / device header file -->
2836         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2837         <!-- startup / system file -->
2838         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2839         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.0" attr="config" condition="GCC"/>
2840         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2841         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="1.0.0" attr="config" condition="IAR"/>
2842         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2843         <!-- SAU configuration -->
2844         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2845       </files>
2846     </component>
2847     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM35P CMSIS GCC">
2848       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2849       <files>
2850         <!-- include folder / device header file -->
2851         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2852         <!-- startup / system file -->
2853         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.c"         version="1.0.0" attr="config" condition="GCC"/>
2854         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2855         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.0" attr="config"/>
2856         <!-- SAU configuration -->
2857         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2858       </files>
2859     </component>
2860
2861     <!-- Cortex-SC000 -->
2862     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC000 CMSIS">
2863       <description>System and Startup for Generic Arm SC000 device</description>
2864       <files>
2865         <!-- include folder / device header file -->
2866         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2867         <!-- startup / system file -->
2868         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2869         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.1.0" attr="config" condition="GCC"/>
2870         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2871         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2872         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2873       </files>
2874     </component>
2875     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC000 CMSIS GCC">
2876       <description>System and Startup for Generic Arm SC000 device</description>
2877       <files>
2878         <!-- include folder / device header file -->
2879         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2880         <!-- startup / system file -->
2881         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.1.0" attr="config" condition="GCC"/>
2882         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2883         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2884       </files>
2885     </component>
2886
2887     <!-- Cortex-SC300 -->
2888     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMSC300 CMSIS">
2889       <description>System and Startup for Generic Arm SC300 device</description>
2890       <files>
2891         <!-- include folder / device header file -->
2892         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2893         <!-- startup / system file -->
2894         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2895         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.1.0" attr="config" condition="GCC"/>
2896         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2897         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2898         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2899       </files>
2900     </component>
2901     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMSC300 CMSIS GCC">
2902       <description>System and Startup for Generic Arm SC300 device</description>
2903       <files>
2904         <!-- include folder / device header file -->
2905         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2906         <!-- startup / system file -->
2907         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.1.0" attr="config" condition="GCC"/>
2908         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2909         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2910       </files>
2911     </component>
2912
2913     <!-- ARMv8MBL -->
2914     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2915       <description>System and Startup for Generic Armv8-M Baseline device</description>
2916       <files>
2917         <!-- include folder / device header file -->
2918         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2919         <!-- startup / system file -->
2920         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2921         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.1.0" attr="config" condition="GCC"/>
2922         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2923         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2924         <!-- SAU configuration -->
2925         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2926       </files>
2927     </component>
2928     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2929       <description>System and Startup for Generic Armv8-M Baseline device</description>
2930       <files>
2931         <!-- include folder / device header file -->
2932         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2933         <!-- startup / system file -->
2934         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.1.0" attr="config" condition="GCC"/>
2935         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2936         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2937         <!-- SAU configuration -->
2938         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2939       </files>
2940     </component>
2941
2942     <!-- ARMv8MML -->
2943     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2944       <description>System and Startup for Generic Armv8-M Mainline device</description>
2945       <files>
2946         <!-- include folder / device header file -->
2947         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2948         <!-- startup / system file -->
2949         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2950         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="GCC"/>
2951         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2952         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2953         <!-- SAU configuration -->
2954         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2955       </files>
2956     </component>
2957     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2958       <description>System and Startup for Generic Armv8-M Mainline device</description>
2959       <files>
2960         <!-- include folder / device header file -->
2961         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2962         <!-- startup / system file -->
2963         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.1.0" attr="config" condition="GCC"/>
2964         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2965         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2966         <!-- SAU configuration -->
2967         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="ARMv8-M TZ Device"/>
2968       </files>
2969     </component>
2970
2971     <!-- ARMv81MML -->
2972     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv81MML CMSIS">
2973       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2974       <files>
2975         <!-- include folder / device header file -->
2976         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2977         <!-- startup / system file -->
2978         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="1.1.0" attr="config"/>
2979         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML.sct"               version="1.0.0" attr="config" condition="ARMCC6"/>
2980         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="1.0.0" attr="config" condition="GCC"/>
2981         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.0.0" attr="config"/>
2982         <!-- SAU configuration -->
2983         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2984       </files>
2985     </component>
2986
2987     <!-- Cortex-A5 -->
2988     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2989       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2990       <files>
2991         <!-- include folder / device header file -->
2992         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2993         <!-- startup / system / mmu files -->
2994         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2995         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2996         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2997         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2998         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2999         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
3000         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
3001         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
3002         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
3003         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
3004         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
3005         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
3006
3007       </files>
3008     </component>
3009
3010     <!-- Cortex-A7 -->
3011     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
3012       <description>System and Startup for Generic Arm Cortex-A7 device</description>
3013       <files>
3014         <!-- include folder / device header file -->
3015         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
3016         <!-- startup / system / mmu files -->
3017         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3018         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3019         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3020         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3021         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
3022         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
3023         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
3024         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
3025         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
3026         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
3027         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
3028         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
3029       </files>
3030     </component>
3031
3032     <!-- Cortex-A9 -->
3033     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
3034       <description>System and Startup for Generic Arm Cortex-A9 device</description>
3035       <files>
3036         <!-- include folder / device header file -->
3037         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
3038         <!-- startup / system / mmu files -->
3039         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
3040         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
3041         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
3042         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
3043         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
3044         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
3045         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
3046         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
3047         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
3048         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
3049         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
3050         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
3051       </files>
3052     </component>
3053
3054     <!-- IRQ Controller -->
3055     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
3056       <description>IRQ Controller implementation using GIC</description>
3057       <files>
3058         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
3059       </files>
3060     </component>
3061
3062     <!-- OS Tick -->
3063     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
3064       <description>OS Tick implementation using Private Timer</description>
3065       <files>
3066         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
3067       </files>
3068     </component>
3069
3070     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
3071       <description>OS Tick implementation using Generic Physical Timer</description>
3072       <files>
3073         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
3074       </files>
3075     </component>
3076
3077     <!-- CMSIS-DSP component -->
3078     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Library" Cversion="1.6.0" isDefaultVariant="true" condition="CMSIS DSP">
3079       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3080       <files>
3081         <!-- CPU independent -->
3082         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3083         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3084
3085         <!-- CPU and Compiler dependent -->
3086         <!-- ARMCC -->
3087         <file category="library" condition="CM0_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3088         <file category="library" condition="CM0_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3089         <file category="library" condition="CM1_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3090         <file category="library" condition="CM1_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3091         <file category="library" condition="CM3_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3092         <file category="library" condition="CM3_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3093         <file category="library" condition="CM4_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3094         <file category="library" condition="CM4_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3095         <file category="library" condition="CM4_FP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3096         <file category="library" condition="CM4_FP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3097         <file category="library" condition="CM7_LE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3098         <file category="library" condition="CM7_BE_ARMCC"                   name="CMSIS/DSP/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3099         <file category="library" condition="CM7_SP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3100         <file category="library" condition="CM7_SP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3101         <file category="library" condition="CM7_DP_LE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3102         <file category="library" condition="CM7_DP_BE_ARMCC"                name="CMSIS/DSP/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3103
3104         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3105         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3106         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3107         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3108         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3109         <file category="library" condition="CM35P_NODSP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3110         <file category="library" condition="CM35P_DSP_NOFPU_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3111         <file category="library" condition="CM35P_NODSP_SP_LE_ARMCC"        name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3112         <file category="library" condition="CM35P_DSP_SP_LE_ARMCC"          name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3113         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/DSP/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3114         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP/Source/ARM"/>
3115         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP/Source/ARM"/>
3116         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP/Source/ARM"/>
3117         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP/Source/ARM"/>
3118         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP/Source/ARM"/-->
3119         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/DSP/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP/Source/ARM"/-->
3120
3121         <!-- GCC -->
3122         <file category="library" condition="CM0_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3123         <file category="library" condition="CM1_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3124         <file category="library" condition="CM3_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3125         <file category="library" condition="CM4_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3126         <file category="library" condition="CM4_FP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP/Source/GCC"/>
3127         <file category="library" condition="CM7_LE_GCC"                     name="CMSIS/DSP/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP/Source/GCC"/>
3128         <file category="library" condition="CM7_SP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3129         <file category="library" condition="CM7_DP_LE_GCC"                  name="CMSIS/DSP/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3130
3131         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3132         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3133         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3134         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3135         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3136         <file category="library" condition="CM35P_NODSP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3137         <file category="library" condition="CM35P_DSP_NOFPU_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3138         <file category="library" condition="CM35P_NODSP_SP_LE_GCC"          name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3139         <file category="library" condition="CM35P_DSP_SP_LE_GCC"            name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3140         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3141         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/GCC"/>
3142         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/GCC"/>
3143         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/GCC"/>
3144         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/GCC"/>
3145         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/GCC"/-->
3146         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/DSP/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/GCC"/-->
3147
3148         <!-- IAR -->
3149         <file category="library" condition="CM0_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3150         <file category="library" condition="CM0_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3151         <file category="library" condition="CM1_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3152         <file category="library" condition="CM1_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM0b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3153         <file category="library" condition="CM3_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3154         <file category="library" condition="CM3_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM3b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3155         <file category="library" condition="CM4_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3156         <file category="library" condition="CM4_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM4b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3157         <file category="library" condition="CM4_FP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3158         <file category="library" condition="CM4_FP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM4bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3159         <file category="library" condition="CM7_LE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7l_math.a"     src="CMSIS/DSP/Source/IAR"/>
3160         <file category="library" condition="CM7_BE_IAR"                     name="CMSIS/DSP/Lib/IAR/iar_cortexM7b_math.a"     src="CMSIS/DSP/Source/IAR"/>
3161         <file category="library" condition="CM7_DP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7lf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3162         <file category="library" condition="CM7_DP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bf_math.a"    src="CMSIS/DSP/Source/IAR"/>
3163         <file category="library" condition="CM7_SP_LE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7ls_math.a"    src="CMSIS/DSP/Source/IAR"/>
3164         <file category="library" condition="CM7_SP_BE_IAR"                  name="CMSIS/DSP/Lib/IAR/iar_cortexM7bs_math.a"    src="CMSIS/DSP/Source/IAR"/>
3165
3166         <file category="library" condition="CM23_LE_IAR"                    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3167         <file category="library" condition="CM33_NODSP_NOFPU_LE_IAR"        name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3168         <file category="library" condition="CM33_DSP_NOFPU_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3169         <file category="library" condition="CM33_NODSP_SP_LE_IAR"           name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3170         <file category="library" condition="CM33_DSP_SP_LE_IAR"             name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3171         <file category="library" condition="CM35P_NODSP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3172         <file category="library" condition="CM35P_DSP_NOFPU_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3173         <file category="library" condition="CM35P_NODSP_SP_LE_IAR"          name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3174         <file category="library" condition="CM35P_DSP_SP_LE_IAR"            name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3175         <file category="library" condition="ARMv8MBL_LE_IAR"                name="CMSIS/DSP/Lib/IAR/iar_ARMv8MBLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3176         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_IAR"    name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLl_math.a"     src="CMSIS/DSP/Source/IAR"/>
3177         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_IAR"      name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLld_math.a"    src="CMSIS/DSP/Source/IAR"/>
3178         <file category="library" condition="ARMv8MML_NODSP_SP_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP/Source/IAR"/>
3179         <file category="library" condition="ARMv8MML_DSP_SP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfsp_math.a" src="CMSIS/DSP/Source/IAR"/>
3180         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_IAR"       name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP/Source/IAR"/-->
3181         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_IAR"         name="CMSIS/DSP/Lib/IAR/iar_ARMv8MMLldfdp_math.a" src="CMSIS/DSP/Source/IAR"/-->
3182
3183       </files>
3184     </component>
3185     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.6.0" condition="CMSIS DSP">
3186       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
3187       <files>
3188         <!-- CPU independent -->
3189         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
3190         <file category="header" name="CMSIS/DSP/Include/arm_math.h"/>
3191
3192         <!-- DSP sources (core) -->
3193         <file category="source" name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
3194         <file category="source" name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
3195         <file category="source" name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
3196         <file category="source" name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
3197         <file category="source" name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
3198         <file category="source" name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
3199         <file category="source" name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
3200         <file category="source" name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
3201         <file category="source" name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
3202         <file category="source" name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
3203
3204       </files>
3205     </component>
3206
3207     <!-- CMSIS-NN component -->
3208     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.1.0" condition="CMSIS NN">
3209       <description>CMSIS-NN Neural Network Library</description>
3210       <files>
3211         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
3212         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
3213
3214         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
3215         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
3216         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
3217         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
3218
3219         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
3220         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
3221         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
3222         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
3223         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
3224         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
3225         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
3226         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
3227         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
3228         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
3229         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
3230         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
3231
3232         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
3233         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
3234         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
3235         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
3236         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
3237         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
3238
3239         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
3240         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
3241         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
3242         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
3243         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
3244
3245         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
3246
3247         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
3248         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
3249       </files>
3250     </component>
3251
3252     <!-- CMSIS-RTOS Keil RTX component -->
3253     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
3254       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
3255       <RTE_Components_h>
3256         <!-- the following content goes into file 'RTE_Components.h' -->
3257         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3258         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3259       </RTE_Components_h>
3260       <files>
3261         <!-- CPU independent -->
3262         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3263         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3264         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3265
3266         <!-- RTX templates -->
3267         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3268         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3269         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3270         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3271         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3272         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3273         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3274         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3275         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3276         <!-- tool-chain specific template file -->
3277         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3278         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3279         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3280
3281         <!-- CPU and Compiler dependent -->
3282         <!-- ARMCC -->
3283         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3284         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3285         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3286         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3287         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3288         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3289         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3290         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3291         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3292         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3293         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3294         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3295         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
3296         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3297         <!-- GCC -->
3298         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3299         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3300         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3301         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3302         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3303         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3304         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3305         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3306         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3307         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3308         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3309         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3310         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
3311         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3312         <!-- IAR -->
3313         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3314         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3315         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3316         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3317         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3318         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3319         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3320         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3321         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3322         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3323         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3324         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3325         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
3326         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
3327       </files>
3328     </component>
3329     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
3330     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
3331       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
3332       <RTE_Components_h>
3333         <!-- the following content goes into file 'RTE_Components.h' -->
3334         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3335         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
3336       </RTE_Components_h>
3337       <files>
3338         <!-- CPU independent -->
3339         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
3340         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
3341         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
3342
3343         <!-- RTX templates -->
3344         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
3345         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
3346         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
3347         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
3348         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
3349         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
3350         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
3351         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
3352         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
3353         <!-- tool-chain specific template file -->
3354         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3355         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
3356         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
3357
3358         <!-- CPU and Compiler dependent -->
3359         <!-- ARMCC -->
3360         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3361         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
3362         <!-- GCC -->
3363         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3364         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
3365         <!-- IAR -->
3366       </files>
3367     </component>
3368
3369     <!-- CMSIS-RTOS Keil RTX5 component -->
3370     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.1" Capiversion="1.0.0" condition="RTOS RTX5">
3371       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
3372       <RTE_Components_h>
3373         <!-- the following content goes into file 'RTE_Components.h' -->
3374         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
3375         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
3376       </RTE_Components_h>
3377       <files>
3378         <!-- RTX header file -->
3379         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
3380         <!-- RTX compatibility module for API V1 -->
3381         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
3382       </files>
3383     </component>
3384
3385     <!-- CMSIS-RTOS2 Keil RTX5 component -->
3386     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 Lib">
3387       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
3388       <RTE_Components_h>
3389         <!-- the following content goes into file 'RTE_Components.h' -->
3390         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3391         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3392       </RTE_Components_h>
3393       <files>
3394         <!-- RTX documentation -->
3395         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3396
3397         <!-- RTX header files -->
3398         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3399
3400         <!-- RTX configuration -->
3401         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3402         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3403
3404         <!-- RTX templates -->
3405         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3406         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3407         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3408         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3409         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3410         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3411         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3412         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3413         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3414         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3415
3416         <!-- RTX library configuration -->
3417         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3418
3419         <!-- RTX libraries (CPU and Compiler dependent) -->
3420         <!-- ARMCC -->
3421         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3422         <file category="library" condition="CM1_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3423         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3424         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3425         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3426         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3427         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3428         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3429         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3430         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3431         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3432         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3433         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3434         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3435         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3436         <!-- GCC -->
3437         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3438         <file category="library" condition="CM1_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3439         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3440         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3441         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3442         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3443         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3444         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3445         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3446         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3447         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3448         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3449         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3450         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3451         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3452         <!-- IAR -->
3453         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3454         <file category="library" condition="CM1_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3455         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3456         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3457         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3458         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3459         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3460         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3461         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3462         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3463         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3464         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3465         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3466         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3467         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3468       </files>
3469     </component>
3470     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3471       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
3472       <RTE_Components_h>
3473         <!-- the following content goes into file 'RTE_Components.h' -->
3474         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3475         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3476         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3477       </RTE_Components_h>
3478       <files>
3479         <!-- RTX documentation -->
3480         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3481
3482         <!-- RTX header files -->
3483         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3484
3485         <!-- RTX configuration -->
3486         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3487         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3488
3489         <!-- RTX templates -->
3490         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3491         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3492         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3493         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3494         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3495         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3496         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3497         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3498         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3499         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3500
3501         <!-- RTX library configuration -->
3502         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3503
3504         <!-- RTX libraries (CPU and Compiler dependent) -->
3505         <!-- ARMCC -->
3506         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3507         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3508         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3509         <file category="library" condition="CM35P_LE_ARMCC"       name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3510         <file category="library" condition="CM35P_FP_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3511         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3512         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3513         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3514         <!-- GCC -->
3515         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3516         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3517         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3518         <file category="library" condition="CM35P_LE_GCC"         name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3519         <file category="library" condition="CM35P_FP_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3520         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3521         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3522         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3523         <!-- IAR -->
3524         <file category="library" condition="CM23_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3525         <file category="library" condition="CM33_LE_IAR"          name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3526         <file category="library" condition="CM33_FP_LE_IAR"       name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3527         <file category="library" condition="CM35P_LE_IAR"         name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3528         <file category="library" condition="CM35P_FP_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3529         <file category="library" condition="ARMv8MBL_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3530         <file category="library" condition="ARMv8MML_LE_IAR"      name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3531         <file category="library" condition="ARMv8MML_FP_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3532       </files>
3533     </component>
3534     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5">
3535       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
3536       <RTE_Components_h>
3537         <!-- the following content goes into file 'RTE_Components.h' -->
3538         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3539         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3540         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3541       </RTE_Components_h>
3542       <files>
3543         <!-- RTX documentation -->
3544         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3545
3546         <!-- RTX header files -->
3547         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3548
3549         <!-- RTX configuration -->
3550         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3551         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3552
3553         <!-- RTX templates -->
3554         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3555         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3556         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3557         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3558         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3559         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3560         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3561         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3562         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3563         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3564
3565         <!-- RTX sources (core) -->
3566         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3567         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3568         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3569         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3570         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3571         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3572         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3573         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3574         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3575         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3576         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3577         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3578         <!-- RTX sources (library configuration) -->
3579         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3580         <!-- RTX sources (handlers ARMCC) -->
3581         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
3582         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM1_ARMCC"/>
3583         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
3584         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
3585         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
3586         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
3587         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
3588         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
3589         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
3590         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
3591         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_ARMCC"/>
3592         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM35P_FP_ARMCC"/>
3593         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
3594         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
3595         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
3596         <!-- RTX sources (handlers GCC) -->
3597         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
3598         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM1_GCC"/>
3599         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
3600         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
3601         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
3602         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
3603         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
3604         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
3605         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
3606         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
3607         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM35P_GCC"/>
3608         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM35P_FP_GCC"/>
3609         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
3610         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
3611         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
3612         <!-- RTX sources (handlers IAR) -->
3613         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
3614         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM1_IAR"/>
3615         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
3616         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
3617         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
3618         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
3619         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
3620         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
3621         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
3622         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
3623         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_IAR"/>
3624         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM35P_FP_IAR"/>
3625         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
3626         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
3627         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
3628         <!-- OS Tick (SysTick) -->
3629         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3630       </files>
3631     </component>
3632     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3633       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3634       <RTE_Components_h>
3635         <!-- the following content goes into file 'RTE_Components.h' -->
3636         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3637         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3638         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3639       </RTE_Components_h>
3640       <files>
3641         <!-- RTX documentation -->
3642         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3643
3644         <!-- RTX header files -->
3645         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3646
3647         <!-- RTX configuration -->
3648         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3649         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3650
3651         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3652
3653         <!-- RTX templates -->
3654         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3655         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3656         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3657         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3658         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3659         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3660         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3661         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3662         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3663         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3664
3665         <!-- RTX sources (core) -->
3666         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3667         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3668         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3669         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3670         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3671         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3672         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3673         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3674         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3675         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3676         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3677         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3678         <!-- RTX sources (library configuration) -->
3679         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3680         <!-- RTX sources (handlers ARMCC) -->
3681         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
3682         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
3683         <!-- RTX sources (handlers GCC) -->
3684         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
3685         <!-- RTX sources (handlers IAR) -->
3686         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
3687       </files>
3688     </component>
3689     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.1" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3690       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
3691       <RTE_Components_h>
3692         <!-- the following content goes into file 'RTE_Components.h' -->
3693         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3694         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3695         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3696         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3697       </RTE_Components_h>
3698       <files>
3699         <!-- RTX documentation -->
3700         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3701
3702         <!-- RTX header files -->
3703         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3704
3705         <!-- RTX configuration -->
3706         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.0"/>
3707         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3708
3709         <!-- RTX templates -->
3710         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3711         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3712         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3713         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3714         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3715         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3716         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3717         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3718         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3719         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3720
3721         <!-- RTX sources (core) -->
3722         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3723         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3724         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3725         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3726         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3727         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3728         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3729         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3730         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3731         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3732         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3733         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3734         <!-- RTX sources (library configuration) -->
3735         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3736         <!-- RTX sources (ARMCC handlers) -->
3737         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3738         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3739         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3740         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_ARMCC"/>
3741         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM35P_FP_ARMCC"/>
3742         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3743         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3744         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3745         <!-- RTX sources (GCC handlers) -->
3746         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3747         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3748         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3749         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM35P_GCC"/>
3750         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM35P_FP_GCC"/>
3751         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3752         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3753         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3754         <!-- RTX sources (IAR handlers) -->
3755         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3756         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3757         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3758         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_IAR"/>
3759         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM35P_FP_IAR"/>
3760         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3761         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3762         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3763         <!-- OS Tick (SysTick) -->
3764         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3765       </files>
3766     </component>
3767
3768     <!-- CMSIS-Driver Custom components -->
3769     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3770       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3771       <files>
3772         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3773         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3774       </files>
3775     </component>
3776     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3777       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3778       <files>
3779         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3780         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3781       </files>
3782     </component>
3783     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.1.0" Capiversion="1.1.0">
3784       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3785       <files>
3786         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3787         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3788       </files>
3789     </component>
3790     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3791       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3792       <files>
3793         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3794         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3795       </files>
3796     </component>
3797     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.2.0" Capiversion="1.2.0">
3798       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3799       <files>
3800         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3801         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3802       </files>
3803     </component>
3804     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3805       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3806       <files>
3807         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3808         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3809       </files>
3810     </component>
3811     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3812       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3813       <files>
3814         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3815         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3816       </files>
3817     </component>
3818     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="2.3.0" Capiversion="2.3.0">
3819       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3820       <files>
3821         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3822         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/> -->
3823       </files>
3824     </component>
3825     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3826       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3827       <files>
3828         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3829         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3830         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3831         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3832       </files>
3833     </component>
3834     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3835       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3836       <files>
3837         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3838         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3839       </files>
3840     </component>
3841     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="2.1.0" Capiversion="2.1.0">
3842       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3843       <files>
3844         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3845         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3846       </files>
3847     </component>
3848     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3849       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3850       <files>
3851         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3852         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3853       </files>
3854     </component>
3855     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="2.2.0" Capiversion="2.2.0">
3856       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3857       <files>
3858         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3859         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3860       </files>
3861     </component>
3862     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0-beta" Capiversion="1.0.0-beta">
3863       <description>Access to #include Driver_WiFi.h file</description>
3864       <files>
3865         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3866         <!-- <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/> -->
3867       </files>
3868     </component>
3869   </components>
3870
3871   <boards>
3872     <board name="uVision Simulator" vendor="Keil">
3873       <description>uVision Simulator</description>
3874       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3875       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3876       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3877       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3878       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3879       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3880       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3881       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3882       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3883       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3884       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3885       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3886       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3887       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3888       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3889       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3890       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3891       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3892       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3893       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3894       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3895       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3896       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3897       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3898     </board>
3899
3900     <board name="EWARM Simulator" vendor="IAR">
3901       <description>EWARM Simulator</description>
3902       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3903       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3904       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3905       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3906       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3907       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3908       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3909       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3910       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3911       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3912       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3913       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3914       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3915       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3916       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3917       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3918       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3919       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3920       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3921       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3922       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3923       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3924       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3925       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3926     </board>
3927   </boards>
3928
3929   <examples>
3930     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3931       <description>DSP_Lib Class Marks example</description>
3932       <board name="uVision Simulator" vendor="Keil"/>
3933       <project>
3934         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3935       </project>
3936       <attributes>
3937         <component Cclass="CMSIS" Cgroup="CORE"/>
3938         <component Cclass="CMSIS" Cgroup="DSP"/>
3939         <component Cclass="Device" Cgroup="Startup"/>
3940         <category>Getting Started</category>
3941       </attributes>
3942     </example>
3943
3944     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3945       <description>DSP_Lib Convolution example</description>
3946       <board name="uVision Simulator" vendor="Keil"/>
3947       <project>
3948         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3949       </project>
3950       <attributes>
3951         <component Cclass="CMSIS" Cgroup="CORE"/>
3952         <component Cclass="CMSIS" Cgroup="DSP"/>
3953         <component Cclass="Device" Cgroup="Startup"/>
3954         <category>Getting Started</category>
3955       </attributes>
3956     </example>
3957
3958     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3959       <description>DSP_Lib Dotproduct example</description>
3960       <board name="uVision Simulator" vendor="Keil"/>
3961       <project>
3962         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3963       </project>
3964       <attributes>
3965         <component Cclass="CMSIS" Cgroup="CORE"/>
3966         <component Cclass="CMSIS" Cgroup="DSP"/>
3967         <component Cclass="Device" Cgroup="Startup"/>
3968         <category>Getting Started</category>
3969       </attributes>
3970     </example>
3971
3972     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3973       <description>DSP_Lib FFT Bin example</description>
3974       <board name="uVision Simulator" vendor="Keil"/>
3975       <project>
3976         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3977       </project>
3978       <attributes>
3979         <component Cclass="CMSIS" Cgroup="CORE"/>
3980         <component Cclass="CMSIS" Cgroup="DSP"/>
3981         <component Cclass="Device" Cgroup="Startup"/>
3982         <category>Getting Started</category>
3983       </attributes>
3984     </example>
3985
3986     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3987       <description>DSP_Lib FIR example</description>
3988       <board name="uVision Simulator" vendor="Keil"/>
3989       <project>
3990         <environment name="uv" load="arm_fir_example.uvprojx"/>
3991       </project>
3992       <attributes>
3993         <component Cclass="CMSIS" Cgroup="CORE"/>
3994         <component Cclass="CMSIS" Cgroup="DSP"/>
3995         <component Cclass="Device" Cgroup="Startup"/>
3996         <category>Getting Started</category>
3997       </attributes>
3998     </example>
3999
4000     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
4001       <description>DSP_Lib Graphic Equalizer example</description>
4002       <board name="uVision Simulator" vendor="Keil"/>
4003       <project>
4004         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
4005       </project>
4006       <attributes>
4007         <component Cclass="CMSIS" Cgroup="CORE"/>
4008         <component Cclass="CMSIS" Cgroup="DSP"/>
4009         <component Cclass="Device" Cgroup="Startup"/>
4010         <category>Getting Started</category>
4011       </attributes>
4012     </example>
4013
4014     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
4015       <description>DSP_Lib Linear Interpolation example</description>
4016       <board name="uVision Simulator" vendor="Keil"/>
4017       <project>
4018         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
4019       </project>
4020       <attributes>
4021         <component Cclass="CMSIS" Cgroup="CORE"/>
4022         <component Cclass="CMSIS" Cgroup="DSP"/>
4023         <component Cclass="Device" Cgroup="Startup"/>
4024         <category>Getting Started</category>
4025       </attributes>
4026     </example>
4027
4028     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
4029       <description>DSP_Lib Matrix example</description>
4030       <board name="uVision Simulator" vendor="Keil"/>
4031       <project>
4032         <environment name="uv" load="arm_matrix_example.uvprojx"/>
4033       </project>
4034       <attributes>
4035         <component Cclass="CMSIS" Cgroup="CORE"/>
4036         <component Cclass="CMSIS" Cgroup="DSP"/>
4037         <component Cclass="Device" Cgroup="Startup"/>
4038         <category>Getting Started</category>
4039       </attributes>
4040     </example>
4041
4042     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
4043       <description>DSP_Lib Signal Convergence example</description>
4044       <board name="uVision Simulator" vendor="Keil"/>
4045       <project>
4046         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
4047       </project>
4048       <attributes>
4049         <component Cclass="CMSIS" Cgroup="CORE"/>
4050         <component Cclass="CMSIS" Cgroup="DSP"/>
4051         <component Cclass="Device" Cgroup="Startup"/>
4052         <category>Getting Started</category>
4053       </attributes>
4054     </example>
4055
4056     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
4057       <description>DSP_Lib Sinus/Cosinus example</description>
4058       <board name="uVision Simulator" vendor="Keil"/>
4059       <project>
4060         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
4061       </project>
4062       <attributes>
4063         <component Cclass="CMSIS" Cgroup="CORE"/>
4064         <component Cclass="CMSIS" Cgroup="DSP"/>
4065         <component Cclass="Device" Cgroup="Startup"/>
4066         <category>Getting Started</category>
4067       </attributes>
4068     </example>
4069
4070     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
4071       <description>DSP_Lib Variance example</description>
4072       <board name="uVision Simulator" vendor="Keil"/>
4073       <project>
4074         <environment name="uv" load="arm_variance_example.uvprojx"/>
4075       </project>
4076       <attributes>
4077         <component Cclass="CMSIS" Cgroup="CORE"/>
4078         <component Cclass="CMSIS" Cgroup="DSP"/>
4079         <component Cclass="Device" Cgroup="Startup"/>
4080         <category>Getting Started</category>
4081       </attributes>
4082     </example>
4083
4084     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
4085       <description>Neural Network CIFAR10 example</description>
4086       <board name="uVision Simulator" vendor="Keil"/>
4087       <project>
4088         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
4089       </project>
4090       <attributes>
4091         <component Cclass="CMSIS" Cgroup="CORE"/>
4092         <component Cclass="CMSIS" Cgroup="DSP"/>
4093         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4094         <component Cclass="Device" Cgroup="Startup"/>
4095         <category>Getting Started</category>
4096       </attributes>
4097     </example>
4098
4099     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
4100       <description>Neural Network CIFAR10 example</description>
4101       <board name="EWARM Simulator" vendor="IAR"/>
4102       <project>
4103         <environment name="iar" load="NN-example-cifar10.ewp"/>
4104       </project>
4105       <attributes>
4106         <component Cclass="CMSIS" Cgroup="CORE"/>
4107         <component Cclass="CMSIS" Cgroup="DSP"/>
4108         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4109         <component Cclass="Device" Cgroup="Startup"/>
4110         <category>Getting Started</category>
4111       </attributes>
4112     </example>
4113
4114     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
4115       <description>Neural Network GRU example</description>
4116       <board name="uVision Simulator" vendor="Keil"/>
4117       <project>
4118         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
4119       </project>
4120       <attributes>
4121         <component Cclass="CMSIS" Cgroup="CORE"/>
4122         <component Cclass="CMSIS" Cgroup="DSP"/>
4123         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4124         <component Cclass="Device" Cgroup="Startup"/>
4125         <category>Getting Started</category>
4126       </attributes>
4127     </example>
4128
4129     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
4130       <description>Neural Network GRU example</description>
4131       <board name="EWARM Simulator" vendor="IAR"/>
4132       <project>
4133         <environment name="iar" load="NN-example-gru.ewp"/>
4134       </project>
4135       <attributes>
4136         <component Cclass="CMSIS" Cgroup="CORE"/>
4137         <component Cclass="CMSIS" Cgroup="DSP"/>
4138         <component Cclass="CMSIS" Cgroup="NN Lib"/>
4139         <component Cclass="Device" Cgroup="Startup"/>
4140         <category>Getting Started</category>
4141       </attributes>
4142     </example>
4143
4144     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
4145       <description>CMSIS-RTOS2 Blinky example</description>
4146       <board name="uVision Simulator" vendor="Keil"/>
4147       <project>
4148         <environment name="uv" load="Blinky.uvprojx"/>
4149       </project>
4150       <attributes>
4151         <component Cclass="CMSIS" Cgroup="CORE"/>
4152         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4153         <component Cclass="Device" Cgroup="Startup"/>
4154         <category>Getting Started</category>
4155       </attributes>
4156     </example>
4157
4158     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
4159       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
4160       <board name="uVision Simulator" vendor="Keil"/>
4161       <project>
4162         <environment name="uv" load="Blinky.uvprojx"/>
4163       </project>
4164       <attributes>
4165         <component Cclass="CMSIS" Cgroup="CORE"/>
4166         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4167         <component Cclass="Device" Cgroup="Startup"/>
4168         <category>Getting Started</category>
4169       </attributes>
4170     </example>
4171
4172     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
4173       <description>CMSIS-RTOS2 Message Queue Example</description>
4174       <board name="uVision Simulator" vendor="Keil"/>
4175       <project>
4176         <environment name="uv" load="MsqQueue.uvprojx"/>
4177       </project>
4178       <attributes>
4179         <component Cclass="CMSIS" Cgroup="CORE"/>
4180         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4181         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4182         <component Cclass="Device" Cgroup="Startup"/>
4183         <category>Getting Started</category>
4184       </attributes>
4185     </example>
4186
4187     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
4188       <description>CMSIS-RTOS2 Memory Pool Example</description>
4189       <board name="uVision Simulator" vendor="Keil"/>
4190       <project>
4191         <environment name="uv" load="MemPool.uvprojx"/>
4192       </project>
4193       <attributes>
4194         <component Cclass="CMSIS" Cgroup="CORE"/>
4195         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4196         <component Cclass="Compiler" Cgroup="EventRecorder"/>
4197         <component Cclass="Device" Cgroup="Startup"/>
4198         <category>Getting Started</category>
4199       </attributes>
4200     </example>
4201
4202     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
4203       <description>Bare-metal secure/non-secure example without RTOS</description>
4204       <board name="uVision Simulator" vendor="Keil"/>
4205       <project>
4206         <environment name="uv" load="NoRTOS.uvmpw"/>
4207       </project>
4208       <attributes>
4209         <component Cclass="CMSIS" Cgroup="CORE"/>
4210         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4211         <component Cclass="Device" Cgroup="Startup"/>
4212         <category>Getting Started</category>
4213       </attributes>
4214     </example>
4215
4216     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
4217       <description>Secure/non-secure RTOS example with thread context management</description>
4218       <board name="uVision Simulator" vendor="Keil"/>
4219       <project>
4220         <environment name="uv" load="RTOS.uvmpw"/>
4221       </project>
4222       <attributes>
4223         <component Cclass="CMSIS" Cgroup="CORE"/>
4224         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4225         <component Cclass="Device" Cgroup="Startup"/>
4226         <category>Getting Started</category>
4227       </attributes>
4228     </example>
4229
4230     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
4231       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
4232       <board name="uVision Simulator" vendor="Keil"/>
4233       <project>
4234         <environment name="uv" load="RTOS_Faults.uvmpw"/>
4235       </project>
4236       <attributes>
4237         <component Cclass="CMSIS" Cgroup="CORE"/>
4238         <component Cclass="CMSIS" Cgroup="RTOS2"/>
4239         <component Cclass="Device" Cgroup="Startup"/>
4240         <category>Getting Started</category>
4241       </attributes>
4242     </example>
4243
4244   </examples>
4245
4246 </package>