begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.8.0">
  12       Active development ...
  13       CMSIS-Core(M): 5.5.0 (see revision history for details)
  14         - Updated GCC LinkerDescription, GCC Assembler startup
  15         - Added ARMv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC
  16         - Changed C-Startup to default Startup.
  17       CMSIS-Core(A): 1.2.1 (see revision history for details)
  18       CMSIS-DSP: 1.9.0
  19         - Purged pre-built libs from Git
  20       CMSIS-NN: 3.0.0 (see revision history for details including version 2.0.0)
  21         - Major interface change for functions compatible with TensorFlow Lite for Microcontroller
  22         - Added optimization for SVDF kernel
  23         - Improved MVE performance for fully Connected and max pool operator
  24         - NULL bias support for fully connected operator in non-MVE case(Can affect performance)
  25         - Expanded existing unit test suite along with support for FVP
  26       CMSIS-RTOS2:
  27         - RTX 5.5.3 (see revision history for details)
  28       CMSIS-Pack: 1.7.2 (see revision history for details)
  29         - Support for Microchip XC32 compiler
  30         - Support for Custom Datapath Extension
  31     </release>
  32     <release version="5.7.0" date="2020-04-09">
  33       CMSIS-Build: 0.9.0 (beta)
  34         - Draft for CMSIS Project description (CPRJ)
  35       CMSIS-Core(M): 5.4.0 (see revision history for details)
  36         - Cortex-M55 cpu support
  37         - Enhanced MVE support for Armv8.1-MML
  38         - Fixed device config define checks.
  39         - L1 Cache functions for Armv7-M and later
  40       CMSIS-Core(A): 1.2.0 (see revision history for details)
  41         - Fixed GIC_SetPendingIRQ to use GICD_SGIR
  42         - Added missing DSP intrinsics
  43         - Reworked assembly intrinsics: volatile, barriers and clobber
  44       CMSIS-DSP: 1.8.0 (see revision history for details)
  45         - Added new functions and function groups
  46         - Added MVE support
  47       CMSIS-NN: 1.3.0 (see revision history for details)
  48         - Added MVE support
  49         - Further optimizations for kernels using DSP extension
  50       CMSIS-RTOS2:
  51         - RTX 5.5.2 (see revision history for details)
  52       CMSIS-Driver: 2.8.0
  53         - Added VIO API 0.1.0 (Preview)
  54         - removed volatile from status related typedefs in APIs
  55         - enhanced WiFi Interface API with support for polling Socket Receive/Send
  56       CMSIS-Pack: 1.6.3 (see revision history for details)
  57         - deprecating all types specific to cpdsc format. Cpdsc is replaced by Cprj with dedicated schema.
  58       Devices:
  59         - ARMCM55 device
  60         - ARMv81MML startup code recognizing __MVE_USED macro
  61         - Refactored vector table references for all Cortex-M devices
  62         - Reworked ARMCM* C-StartUp files.
  63         - Include L1 Cache functions in ARMv8MML/ARMv81MML devices
  64       Utilities:
  65         Attention: Linux binaries moved to Linux64 folder!
  66         - SVDConv 3.3.35
  67         - PackChk 1.3.89
  68     </release>
  69     <release version="5.6.0" date="2019-07-10">
  70       CMSIS-Core(M): 5.3.0 (see revision history for details)
  71         - Added provisions for compiler-independent C startup code.
  72       CMSIS-Core(A): 1.1.4 (see revision history for details)
  73         - Fixed __FPU_Enable.
  74       CMSIS-DSP: 1.7.0 (see revision history for details)
  75         - New Neon versions of f32 functions
  76         - Python wrapper
  77         - Preliminary cmake build
  78         - Compilation flags for FFTs
  79         - Changes to arm_math.h
  80       CMSIS-NN: 1.2.0 (see revision history for details)
  81         - New function for depthwise convolution with asymmetric quantization.
  82         - New support functions for requantization.
  83       CMSIS-RTOS:
  84         - RTX 4.82.0 (updated provisions for Arm Compiler 6 when using Cortex-M0/M0+)
  85       CMSIS-RTOS2:
  86         - RTX 5.5.1 (see revision history for details)
  87       CMSIS-Driver: 2.7.1
  88         - WiFi Interface API 1.0.0
  89       Devices:
  90         - Generalized C startup code for all Cortex-M family devices.
  91         - Updated Cortex-A default memory regions and MMU configurations
  92         - Moved Cortex-A memory and system config files to avoid include path issues
  93     </release>
  94     <release version="5.5.1" date="2019-03-20">
  95       The following folders are deprecated
  96         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
  97
  98       CMSIS-Core(M): 5.2.1 (see revision history for details)
  99         - Fixed compilation issue in cmsis_armclang_ltm.h
 100     </release>
 101     <release version="5.5.0" date="2019-03-18">
 102       The following folders have been removed:
 103         - CMSIS/Lib/ (superseded by CMSIS/DSP/Lib/)
 104         - CMSIS/DSP_Lib/ (superseded by CMSIS/DSP/)
 105       The following folders are deprecated
 106         - CMSIS/Include/ (superseded by CMSIS/DSP/Include/ and CMSIS/Core/Include/)
 107
 108       CMSIS-Core(M): 5.2.0 (see revision history for details)
 109         - Reworked Stack/Heap configuration for ARM startup files.
 110         - Added Cortex-M35P device support.
 111         - Added generic Armv8.1-M Mainline device support.
 112       CMSIS-Core(A): 1.1.3 (see revision history for details)
 113       CMSIS-DSP: 1.6.0 (see revision history for details)
 114         - reworked DSP library source files
 115         - reworked DSP library documentation
 116         - Changed DSP folder structure
 117         - moved DSP libraries to folder ./DSP/Lib
 118         - ARM DSP Libraries are built with ARMCLANG
 119         - Added DSP Libraries Source variant
 120       CMSIS-RTOS2:
 121         - RTX 5.5.0 (see revision history for details)
 122       CMSIS-Driver: 2.7.0
 123         - Added WiFi Interface API 1.0.0-beta
 124         - Added components for project specific driver implementations
 125       CMSIS-Pack: 1.6.0 (see revision history for details)
 126       Devices:
 127         - Added Cortex-M35P and ARMv81MML device templates.
 128         - Fixed C-Startup Code for GCC (aligned with other compilers)
 129       Utilities:
 130         - SVDConv 3.3.25
 131         - PackChk 1.3.82
 132     </release>
 133     <release version="5.4.0" date="2018-08-01">
 134       Aligned pack structure with repository.
 135       The following folders are deprecated:
 136         - CMSIS/Include/
 137         - CMSIS/DSP_Lib/
 138
 139       CMSIS-Core(M): 5.1.2 (see revision history for details)
 140         - Added Cortex-M1 support (beta).
 141       CMSIS-Core(A): 1.1.2 (see revision history for details)
 142       CMSIS-NN: 1.1.0
 143         - Added new math functions.
 144       CMSIS-RTOS2:
 145         - API 2.1.3 (see revision history for details)
 146         - RTX 5.4.0 (see revision history for details)
 147           * Updated exception handling on Cortex-A
 148       CMSIS-Driver:
 149         - Flash Driver API V2.2.0
 150       Utilities:
 151         - SVDConv 3.3.21
 152         - PackChk 1.3.71
 153     </release>
 154     <release version="5.3.0" date="2018-02-22">
 155       Updated Arm company brand.
 156       CMSIS-Core(M): 5.1.1 (see revision history for details)
 157       CMSIS-Core(A): 1.1.1 (see revision history for details)
 158       CMSIS-DAP: 2.0.0 (see revision history for details)
 159       CMSIS-NN: 1.0.0
 160         - Initial contribution of the bare metal Neural Network Library.
 161       CMSIS-RTOS2:
 162         - RTX 5.3.0 (see revision history for details)
 163         - OS Tick API 1.0.1
 164     </release>
 165     <release version="5.2.0" date="2017-11-16">
 166       CMSIS-Core(M): 5.1.0 (see revision history for details)
 167         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
 168         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
 169       CMSIS-Core(A): 1.1.0 (see revision history for details)
 170         - Added compiler_iccarm.h.
 171         - Added additional access functions for physical timer.
 172       CMSIS-DAP: 1.2.0 (see revision history for details)
 173       CMSIS-DSP: 1.5.2 (see revision history for details)
 174       CMSIS-Driver: 2.6.0 (see revision history for details)
 175         - CAN Driver API V1.2.0
 176         - NAND Driver API V2.3.0
 177       CMSIS-RTOS:
 178         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
 179       CMSIS-RTOS2:
 180         - API 2.1.2 (see revision history for details)
 181         - RTX 5.2.3 (see revision history for details)
 182       Devices:
 183         - Added GCC startup and linker script for Cortex-A9.
 184         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
 185         - Added IAR startup code for Cortex-A9
 186     </release>
 187     <release version="5.1.1" date="2017-09-19">
 188       CMSIS-RTOS2:
 189       - RTX 5.2.1 (see revision history for details)
 190     </release>
 191     <release version="5.1.0" date="2017-08-04">
 192       CMSIS-Core(M): 5.0.2 (see revision history for details)
 193       - Changed Version Control macros to be core agnostic.
 194       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
 195       CMSIS-Core(A): 1.0.0 (see revision history for details)
 196       - Initial release
 197       - IRQ Controller API 1.0.0
 198       CMSIS-Driver: 2.05 (see revision history for details)
 199       - All typedefs related to status have been made volatile.
 200       CMSIS-RTOS2:
 201       - API 2.1.1 (see revision history for details)
 202       - RTX 5.2.0 (see revision history for details)
 203       - OS Tick API 1.0.0
 204       CMSIS-DSP: 1.5.2 (see revision history for details)
 205       - Fixed GNU Compiler specific diagnostics.
 206       CMSIS-Pack: 1.5.0 (see revision history for details)
 207       - added System Description File (*.SDF) Format
 208       CMSIS-Zone: 0.0.1 (Preview)
 209       - Initial specification draft
 210     </release>
 211     <release version="5.0.1" date="2017-02-03">
 212       Package Description:
 213       - added taxonomy for Cclass RTOS
 214       CMSIS-RTOS2:
 215       - API 2.1   (see revision history for details)
 216       - RTX 5.1.0 (see revision history for details)
 217       CMSIS-Core: 5.0.1 (see revision history for details)
 218       - Added __PACKED_STRUCT macro
 219       - Added uVisior support
 220       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
 221       - Updated template for secure main function (main_s.c)
 222       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
 223       CMSIS-DSP: 1.5.1 (see revision history for details)
 224       - added ARMv8M DSP libraries.
 225       CMSIS-Pack:1.4.9 (see revision history for details)
 226       - added Pack Index File specification and schema file
 227     </release>
 228     <release version="5.0.0" date="2016-11-11">
 229       Changed open source license to Apache 2.0
 230       CMSIS_Core:
 231        - Added support for Cortex-M23 and Cortex-M33.
 232        - Added ARMv8-M device configurations for mainline and baseline.
 233        - Added CMSE support and thread context management for TrustZone for ARMv8-M
 234        - Added cmsis_compiler.h to unify compiler behaviour.
 235        - Updated function SCB_EnableICache (for Cortex-M7).
 236        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
 237       CMSIS-RTOS:
 238         - bug fix in RTX 4.82 (see revision history for details)
 239       CMSIS-RTOS2:
 240         - new API including compatibility layer to CMSIS-RTOS
 241         - reference implementation based on RTX5
 242         - supports all Cortex-M variants including TrustZone for ARMv8-M
 243       CMSIS-SVD:
 244        - reworked SVD format documentation
 245        - removed SVD file database documentation as SVD files are distributed in packs
 246        - updated SVDConv for Win32 and Linux
 247       CMSIS-DSP:
 248        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 249        - Added DSP libraries build projects to CMSIS pack.
 250     </release>
 251     <release version="4.5.0" date="2015-10-28">
 252       - CMSIS-Core     4.30.0  (see revision history for details)
 253       - CMSIS-DAP      1.1.0   (unchanged)
 254       - CMSIS-Driver   2.04.0  (see revision history for details)
 255       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 256       - CMSIS-Pack     1.4.1   (see revision history for details)
 257       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 258       - CMSIS-SVD      1.3.1   (see revision history for details)
 259     </release>
 260     <release version="4.4.0" date="2015-09-11">
 261       - CMSIS-Core     4.20   (see revision history for details)
 262       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 263       - CMSIS-Pack     1.4.0  (adding memory attributes, algorithm style)
 264       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 265       - CMSIS-RTOS
 266         -- API         1.02   (unchanged)
 267         -- RTX         4.79   (see revision history for details)
 268       - CMSIS-SVD      1.3.0  (see revision history for details)
 269       - CMSIS-DAP      1.1.0  (extended with SWO support)
 270     </release>
 271     <release version="4.3.0" date="2015-03-20">
 272       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 273       - CMSIS-DSP      1.4.5  (see revision history for details)
 274       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 275       - CMSIS-Pack     1.3.3  (Semantic Versioning, Generator extensions)
 276       - CMSIS-RTOS
 277         -- API         1.02   (unchanged)
 278         -- RTX         4.78   (see revision history for details)
 279       - CMSIS-SVD      1.2    (unchanged)
 280     </release>
 281     <release version="4.2.0" date="2014-09-24">
 282       Adding Cortex-M7 support
 283       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 284       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 285       - CMSIS-Pack     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 286       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 287       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 288     </release>
 289     <release version="4.1.1" date="2014-06-30">
 290       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 291     </release>
 292     <release version="4.1.0" date="2014-06-12">
 293       - CMSIS-Driver   2.02  (incompatible update)
 294       - CMSIS-Pack     1.3   (see revision history for details)
 295       - CMSIS-DSP      1.4.2 (unchanged)
 296       - CMSIS-Core     3.30  (unchanged)
 297       - CMSIS-RTOS RTX 4.74  (unchanged)
 298       - CMSIS-RTOS API 1.02  (unchanged)
 299       - CMSIS-SVD      1.10  (unchanged)
 300       PACK:
 301       - removed G++ specific files from PACK
 302       - added Component Startup variant "C Startup"
 303       - added Pack Checking Utility
 304       - updated conditions to reflect tool-chain dependency
 305       - added Taxonomy for Graphics
 306       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 307     </release>
 308     <!-- release version="4.0.0">
 309       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 310       - CMSIS-Pack     1.1   Preliminary
 311       - CMSIS-DSP      1.4.2 (see revision history for details)
 312       - CMSIS-Core     3.30  (see revision history for details)
 313       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 314       - CMSIS-RTOS API 1.02  (unchanged)
 315       - CMSIS-SVD      1.10  (unchanged)
 316     </release -->
 317     <release version="3.20.4" date="2014-02-20">
 318       - CMSIS-RTOS 4.74 (see revision history for details)
 319       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 320     </release>
 321     <!-- release version="3.20.3">
 322       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 323       - CMSIS-RTOS 4.73 (see revision history for details)
 324     </release -->
 325     <!-- release version="3.20.2">
 326       - CMSIS-Pack documentation has been added
 327       - CMSIS-Drivers header and documentation have been added to PACK
 328       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 329     </release -->
 330     <!-- release version="3.20.1">
 331       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 332       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 333     </release -->
 334     <!-- release version="3.20.0">
 335       The software portions that are deployed in the application program are now under a BSD license which allows usage
 336       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 337       The individual components have been update as listed below:
 338       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 339       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 340       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 341       - CMSIS-SVD is unchanged.
 342     </release -->
 343   </releases>
 344
 345   <taxonomy>
 346     <description Cclass="Audio">Software components for audio processing</description>
 347     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 348     <description Cclass="Board Part">Drivers that support an external component available on an evaluation board</description>
 349     <description Cclass="Compiler">Compiler Software Extensions</description>
 350     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 351     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 352     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 353     <description Cclass="Data Exchange">Data exchange or data formatter</description>
 354     <description Cclass="Extension Board">Drivers that support an extension board or shield</description>
 355     <description Cclass="File System">File Drive Support and File System</description>
 356     <description Cclass="IoT Client">IoT cloud client connector</description>
 357     <description Cclass="IoT Service">IoT specific services</description>
 358     <description Cclass="IoT Utility">IoT specific software utility</description>
 359     <description Cclass="Graphics">Graphical User Interface</description>
 360     <description Cclass="Network">Network Stack using Internet Protocols</description>
 361     <description Cclass="RTOS">Real-time Operating System</description>
 362     <description Cclass="Security">Encryption for secure communication or storage</description>
 363     <description Cclass="USB">Universal Serial Bus Stack</description>
 364     <description Cclass="Utility">Generic software utility components</description>
 365   </taxonomy>
 366
 367   <devices>
 368     <!-- ******************************  Cortex-M0  ****************************** -->
 369     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 370       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 371       <description>
 372 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 373 - simple, easy-to-use programmers model
 374 - highly efficient ultra-low power operation
 375 - excellent code density
 376 - deterministic, high-performance interrupt handling
 377 - upward compatibility with the rest of the Cortex-M processor family.
 378       </description>
 379       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 380       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 381       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 382       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 383
 384       <device Dname="ARMCM0">
 385         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 386         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 387       </device>
 388     </family>
 389
 390     <!-- ******************************  Cortex-M0P  ****************************** -->
 391     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 392       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 393       <description>
 394 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 395 - simple, easy-to-use programmers model
 396 - highly efficient ultra-low power operation
 397 - excellent code density
 398 - deterministic, high-performance interrupt handling
 399 - upward compatibility with the rest of the Cortex-M processor family.
 400       </description>
 401       <!-- debug svd="Device/ARM/SVD/ARMCM0P.svd"/ SVD files do not contain any peripheral -->
 402       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 403       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 404       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 405
 406       <device Dname="ARMCM0P">
 407         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 408         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 409       </device>
 410
 411       <device Dname="ARMCM0P_MPU">
 412         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 413         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 414       </device>
 415     </family>
 416
 417     <!-- ******************************  Cortex-M1  ****************************** -->
 418     <family Dfamily="ARM Cortex M1" Dvendor="ARM:82">
 419       <!--book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M1 Device Generic Users Guide"/-->
 420       <description>
 421 The ARM Cortex-M1 FPGA processor is intended for deeply embedded applications that require a small processor integrated into an FPGA.
 422 The ARM Cortex-M1 processor implements the ARMv6-M architecture profile.
 423       </description>
 424       <!-- debug svd="Device/ARM/SVD/ARMCM0.svd"/ SVD files do not contain any peripheral -->
 425       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 426       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 427       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 428
 429       <device Dname="ARMCM1">
 430         <processor Dcore="Cortex-M1" DcoreVersion="r1p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 431         <compile header="Device/ARM/ARMCM1/Include/ARMCM1.h" define="ARMCM1"/>
 432       </device>
 433     </family>
 434
 435     <!-- ******************************  Cortex-M3  ****************************** -->
 436     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 437       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 438       <description>
 439 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 440 - simple, easy-to-use programmers model
 441 - highly efficient ultra-low power operation
 442 - excellent code density
 443 - deterministic, high-performance interrupt handling
 444 - upward compatibility with the rest of the Cortex-M processor family.
 445       </description>
 446       <!-- debug svd="Device/ARM/SVD/ARMCM3.svd"/ SVD files do not contain any peripheral -->
 447       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 448       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 449       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 450
 451       <device Dname="ARMCM3">
 452         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 453         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 454       </device>
 455     </family>
 456
 457     <!-- ******************************  Cortex-M4  ****************************** -->
 458     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 459       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 460       <description>
 461 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 462 - simple, easy-to-use programmers model
 463 - highly efficient ultra-low power operation
 464 - excellent code density
 465 - deterministic, high-performance interrupt handling
 466 - upward compatibility with the rest of the Cortex-M processor family.
 467       </description>
 468       <!-- debug svd="Device/ARM/SVD/ARMCM4.svd"/ SVD files do not contain any peripheral -->
 469       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 470       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 471       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 472
 473       <device Dname="ARMCM4">
 474         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 475         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 476       </device>
 477
 478       <device Dname="ARMCM4_FP">
 479         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 480         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 481       </device>
 482     </family>
 483
 484     <!-- ******************************  Cortex-M7  ****************************** -->
 485     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 486       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 487       <description>
 488 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 489 - simple, easy-to-use programmers model
 490 - highly efficient ultra-low power operation
 491 - excellent code density
 492 - deterministic, high-performance interrupt handling
 493 - upward compatibility with the rest of the Cortex-M processor family.
 494       </description>
 495       <!-- debug svd="Device/ARM/SVD/ARMCM7.svd"/ SVD files do not contain any peripheral -->
 496       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 497       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 498       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 499
 500       <device Dname="ARMCM7">
 501         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 502         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 503       </device>
 504
 505       <device Dname="ARMCM7_SP">
 506         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 507         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 508       </device>
 509
 510       <device Dname="ARMCM7_DP">
 511         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 512         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 513       </device>
 514     </family>
 515
 516     <!-- ******************************  Cortex-M23  ********************** -->
 517     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 518       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 519       <description>
 520 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 521 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 522 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 523       </description>
 524       <!-- debug svd="Device/ARM/SVD/ARMCM23.svd"/ SVD files do not contain any peripheral -->
 525       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 526       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 527       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 528       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 529       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 530
 531       <device Dname="ARMCM23">
 532         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 533         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 534       </device>
 535
 536       <device Dname="ARMCM23_TZ">
 537         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 538         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 539       </device>
 540     </family>
 541
 542     <!-- ******************************  Cortex-M33  ****************************** -->
 543     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 544       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 545       <description>
 546 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 547 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 548       </description>
 549       <!-- debug svd="Device/ARM/SVD/ARMCM33.svd"/ SVD files do not contain any peripheral -->
 550       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 551       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 552       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 553       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 554       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 555
 556       <device Dname="ARMCM33">
 557         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 558         <description>
 559           no DSP Instructions, no Floating Point Unit, no TrustZone
 560         </description>
 561         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 562       </device>
 563
 564       <device Dname="ARMCM33_TZ">
 565         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 566         <description>
 567           no DSP Instructions, no Floating Point Unit, TrustZone
 568         </description>
 569         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 570       </device>
 571
 572       <device Dname="ARMCM33_DSP_FP">
 573         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 574         <description>
 575           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 576         </description>
 577         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 578       </device>
 579
 580       <device Dname="ARMCM33_DSP_FP_TZ">
 581         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 582         <description>
 583           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 584         </description>
 585         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 586       </device>
 587     </family>
 588
 589     <!-- ******************************  Cortex-M35P  ****************************** -->
 590     <family Dfamily="ARM Cortex M35P" Dvendor="ARM:82">
 591       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 592       <description>
 593 The Arm Cortex-M35P is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 594 class processor based on the Armv8-M mainline architecture with Arm TrustZone security designed for a broad range of secure embedded applications.
 595       </description>
 596
 597       <!-- debug svd="Device/ARM/SVD/ARMCM35P.svd"/ SVD files do not contain any peripheral -->
 598       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 599       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 600       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 601       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 602       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 603
 604       <device Dname="ARMCM35P">
 605         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 606         <description>
 607           no DSP Instructions, no Floating Point Unit, no TrustZone
 608         </description>
 609         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P.h" define="ARMCM35P"/>
 610       </device>
 611
 612       <device Dname="ARMCM35P_TZ">
 613         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 614         <description>
 615           no DSP Instructions, no Floating Point Unit, TrustZone
 616         </description>
 617         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h" define="ARMCM35P_TZ"/>
 618       </device>
 619
 620       <device Dname="ARMCM35P_DSP_FP">
 621         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 622         <description>
 623           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 624         </description>
 625         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h" define="ARMCM35P_DSP_FP"/>
 626       </device>
 627
 628       <device Dname="ARMCM35P_DSP_FP_TZ">
 629         <processor Dcore="Cortex-M35P" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 630         <description>
 631           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 632         </description>
 633         <compile header="Device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h" define="ARMCM35P_DSP_FP_TZ"/>
 634       </device>
 635     </family>
 636
 637     <!-- ******************************  Cortex-M55  ****************************** -->
 638     <family Dfamily="ARM Cortex M55" Dvendor="ARM:82">
 639       <!--book name="Device/ARM/Documents/Arm Cortex-M55 Processor Datasheet.pdf" title="Arm Cortex-M55 Processor Datasheet"/-->
 640       <description>
 641 The Arm Cortex-M55 processor is a fully synthesizable, mid-range, microcontroller-class processor that implements the Armv8.1-M mainline architecture and includes support for the M-profile Vector Extension (MVE), also known as Arm Helium technology.
 642 It is Arm's most AI-capable Cortex-M processor, delivering enhanced, energy-efficient digital signal processing (DSP) and machine learning (ML) performance.
 643 The Cortex-M55 processor achieves high compute performance across scalar and vector operations, while maintaining low energy consumption.
 644       </description>
 645
 646       <!-- debug svd="Device/ARM/SVD/ARMCM55.svd"/ SVD files do not contain any peripheral -->
 647       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 648       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 649       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 650       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 651       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 652
 653       <device Dname="ARMCM55">
 654         <processor Dcore="Cortex-M55" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 655         <description>
 656           Floating Point Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 657         </description>
 658         <compile header="Device/ARM/ARMCM55/Include/ARMCM55.h" define="ARMCM55"/>
 659       </device>
 660     </family>
 661
 662     <!-- ******************************  ARMSC000  ****************************** -->
 663     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 664       <description>
 665 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 666 - simple, easy-to-use programmers model
 667 - highly efficient ultra-low power operation
 668 - excellent code density
 669 - deterministic, high-performance interrupt handling
 670       </description>
 671       <!-- debug svd="Device/ARM/SVD/ARMSC000.svd"/ SVD files do not contain any peripheral -->
 672       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 673       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 674       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 675
 676       <device Dname="ARMSC000">
 677         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 678         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 679       </device>
 680     </family>
 681
 682     <!-- ******************************  ARMSC300  ****************************** -->
 683     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 684       <description>
 685 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 686 - simple, easy-to-use programmers model
 687 - highly efficient ultra-low power operation
 688 - excellent code density
 689 - deterministic, high-performance interrupt handling
 690       </description>
 691       <!-- debug svd="Device/ARM/SVD/ARMSC300.svd"/ SVD files do not contain any peripheral -->
 692       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 693       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 694       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 695
 696       <device Dname="ARMSC300">
 697         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 698         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 699       </device>
 700     </family>
 701
 702     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 703     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 704       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 705       <description>
 706 Armv8-M Baseline based device with TrustZone
 707       </description>
 708       <!-- debug svd="Device/ARM/SVD/ARMv8MBL.svd"/ SVD files do not contain any peripheral -->
 709       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 710       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 711       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 712       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 713       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 714
 715       <device Dname="ARMv8MBL">
 716         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 717         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 718       </device>
 719     </family>
 720
 721     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 722     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 723       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 724       <description>
 725 Armv8-M Mainline based device with TrustZone
 726       </description>
 727       <!-- debug svd="Device/ARM/SVD/ARMv8MML.svd"/ SVD files do not contain any peripheral -->
 728       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 729       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 730       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 731       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 732       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 733
 734       <device Dname="ARMv8MML">
 735         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 736         <description>
 737           no DSP Instructions, no Floating Point Unit, TrustZone
 738         </description>
 739         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 740       </device>
 741
 742       <device Dname="ARMv8MML_DSP">
 743         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 744         <description>
 745           DSP Instructions, no Floating Point Unit, TrustZone
 746         </description>
 747         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 748       </device>
 749
 750       <device Dname="ARMv8MML_SP">
 751         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 752         <description>
 753           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 754         </description>
 755         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 756       </device>
 757
 758       <device Dname="ARMv8MML_DSP_SP">
 759         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 760         <description>
 761           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 762         </description>
 763         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 764       </device>
 765
 766       <device Dname="ARMv8MML_DP">
 767         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 768         <description>
 769           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 770         </description>
 771         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 772       </device>
 773
 774       <device Dname="ARMv8MML_DSP_DP">
 775         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 776         <description>
 777           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 778         </description>
 779         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 780       </device>
 781     </family>
 782
 783     <!-- ******************************  ARMv8.1-M Mainline  ****************************** -->
 784     <family Dfamily="ARMv8.1-M Mainline" Dvendor="ARM:82">
 785       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 786       <description>
 787 Armv8.1-M Mainline based device with TrustZone and MVE
 788       </description>
 789       <!-- <debug svd="Device/ARM/SVD/ARMv8MML.svd"/> -->
 790       <memory id="IROM1"                                start="0x10000000" size="0x00200000" startup="1" default="1"/>
 791       <memory id="IROM2"                                start="0x00000000" size="0x00200000" startup="0" default="0"/>
 792       <memory id="IRAM1"                                start="0x30000000" size="0x00020000" init   ="0" default="1"/>
 793       <memory id="IRAM2"                                start="0x20000000" size="0x00020000" init   ="0" default="0"/>
 794       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 795
 796
 797       <device Dname="ARMv81MML_DSP_DP_MVE_FP">
 798         <processor Dcore="ARMV81MML" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dmve="FP_MVE" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 799         <description>
 800           Double Precision Vector Extensions, DSP Instructions, Double Precision Floating Point Unit, TrustZone
 801         </description>
 802         <compile header="Device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h" define="ARMv81MML_DSP_DP_MVE_FP"/>
 803       </device>
 804     </family>
 805
 806     <!-- ******************************  Cortex-A5  ****************************** -->
 807     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 808       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 809       <description>
 810 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 811 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 812 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 813       </description>
 814
 815       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 816       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 817       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 818       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 819
 820       <device Dname="ARMCA5">
 821         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 822         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 823       </device>
 824     </family>
 825
 826     <!-- ******************************  Cortex-A7  ****************************** -->
 827     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 828       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 829       <description>
 830 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 831 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 832 an optional integrated GIC, and an optional L2 cache controller.
 833       </description>
 834
 835       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 836       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 837       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 838       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 839
 840       <device Dname="ARMCA7">
 841         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 842         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 843       </device>
 844     </family>
 845
 846     <!-- ******************************  Cortex-A9  ****************************** -->
 847     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 848       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 849       <description>
 850 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 851 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 852 and 8-bit Java bytecodes in Jazelle state.
 853       </description>
 854
 855       <memory id="IROM1"                                start="0x00000000" size="0x04000000" startup="1" default="1"/> <!-- 64MB NOR -->
 856       <memory id="IROM2"                                start="0x0C000000" size="0x04000000" startup="0" default="0"/> <!-- 64MB NOR -->
 857       <memory id="IRAM1"                                start="0x14000000" size="0x02000000" init   ="0" default="1"/> <!-- 32MB SRAM -->
 858       <memory id="IRAM2"                                start="0x80000000" size="0x40000000" init   ="0" default="0"/> <!-- 1GB DRAM -->
 859
 860       <device Dname="ARMCA9">
 861         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="12000000"/>
 862         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 863       </device>
 864     </family>
 865   </devices>
 866
 867
 868   <apis>
 869     <!-- CMSIS Device API -->
 870     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 871       <description>Device interrupt controller interface</description>
 872       <files>
 873         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 874       </files>
 875     </api>
 876     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 877       <description>RTOS Kernel system tick timer interface</description>
 878       <files>
 879         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 880       </files>
 881     </api>
 882     <!-- CMSIS-RTOS API -->
 883     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 884       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 885       <files>
 886         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 887       </files>
 888     </api>
 889     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.3" exclusive="1">
 890       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 891       <files>
 892         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 893         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 894       </files>
 895     </api>
 896     <!-- CMSIS Driver API -->
 897     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.4.0" exclusive="0">
 898       <description>USART Driver API for Cortex-M</description>
 899       <files>
 900         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 901         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 902       </files>
 903     </api>
 904     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.3.0" exclusive="0">
 905       <description>SPI Driver API for Cortex-M</description>
 906       <files>
 907         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 908         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 909       </files>
 910     </api>
 911     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.2.0" exclusive="0">
 912       <description>SAI Driver API for Cortex-M</description>
 913       <files>
 914         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 915         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 916       </files>
 917     </api>
 918     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.4.0" exclusive="0">
 919       <description>I2C Driver API for Cortex-M</description>
 920       <files>
 921         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 922         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 923       </files>
 924     </api>
 925     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.3.0" exclusive="0">
 926       <description>CAN Driver API for Cortex-M</description>
 927       <files>
 928         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 929         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 930       </files>
 931     </api>
 932     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.3.0" exclusive="0">
 933       <description>Flash Driver API for Cortex-M</description>
 934       <files>
 935         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 936         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 937       </files>
 938     </api>
 939     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.4.0" exclusive="0">
 940       <description>MCI Driver API for Cortex-M</description>
 941       <files>
 942         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 943         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 944       </files>
 945     </api>
 946     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.4.0" exclusive="0">
 947       <description>NAND Flash Driver API for Cortex-M</description>
 948       <files>
 949         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 950         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 951       </files>
 952     </api>
 953     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.2.0" exclusive="0">
 954       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 955       <files>
 956         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 957         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 958         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 959       </files>
 960     </api>
 961     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.2.0" exclusive="0">
 962       <description>Ethernet MAC Driver API for Cortex-M</description>
 963       <files>
 964         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 965         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 966       </files>
 967     </api>
 968     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.2.0" exclusive="0">
 969       <description>Ethernet PHY Driver API for Cortex-M</description>
 970       <files>
 971         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 972         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 973       </files>
 974     </api>
 975     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.3.0" exclusive="0">
 976       <description>USB Device Driver API for Cortex-M</description>
 977       <files>
 978         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 979         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 980       </files>
 981     </api>
 982     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.3.0" exclusive="0">
 983       <description>USB Host Driver API for Cortex-M</description>
 984       <files>
 985         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 986         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 987       </files>
 988     </api>
 989     <api Cclass="CMSIS Driver" Cgroup="WiFi" Capiversion="1.1.0" exclusive="0">
 990       <description>WiFi driver</description>
 991       <files>
 992         <file category="doc" name="CMSIS/Documentation/Driver/html/group__wifi__interface__gr.html" />
 993         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h" />
 994       </files>
 995     </api>
 996     <api Cclass="CMSIS Driver" Cgroup="VIO" Capiversion="0.1.0" exclusive="1">
 997       <description>Virtual I/O</description>
 998       <files>
 999         <file category="doc"    name="CMSIS/Documentation/Driver/html/group__vio__interface__gr.html" />
1000         <file category="header" name="CMSIS/Driver/VIO/Include/cmsis_vio.h" />
1001         <file category="other"  name="CMSIS/Driver/VIO/cmsis_vio.scvd" />
1002       </files>
1003     </api>
1004   </apis>
1005
1006   <!-- conditions are dependency rules that can apply to a component or an individual file -->
1007   <conditions>
1008     <!-- compiler -->
1009     <condition id="ARMCC6">
1010       <accept Tcompiler="ARMCC" Toptions="AC6"/>
1011       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
1012     </condition>
1013     <condition id="ARMCC5">
1014       <require Tcompiler="ARMCC" Toptions="AC5"/>
1015     </condition>
1016     <condition id="ARMCC">
1017       <require Tcompiler="ARMCC"/>
1018     </condition>
1019     <condition id="GCC">
1020       <require Tcompiler="GCC"/>
1021     </condition>
1022     <condition id="IAR">
1023       <require Tcompiler="IAR"/>
1024     </condition>
1025     <condition id="ARMCC GCC">
1026       <accept Tcompiler="ARMCC"/>
1027       <accept Tcompiler="GCC"/>
1028     </condition>
1029     <condition id="ARMCC GCC IAR">
1030       <accept Tcompiler="ARMCC"/>
1031       <accept Tcompiler="GCC"/>
1032       <accept Tcompiler="IAR"/>
1033     </condition>
1034
1035     <!-- Arm architecture -->
1036     <condition id="ARMv6-M Device">
1037       <description>Armv6-M architecture based device</description>
1038       <accept Dcore="Cortex-M0"/>
1039       <accept Dcore="Cortex-M1"/>
1040       <accept Dcore="Cortex-M0+"/>
1041       <accept Dcore="SC000"/>
1042     </condition>
1043     <condition id="ARMv7-M Device">
1044       <description>Armv7-M architecture based device</description>
1045       <accept Dcore="Cortex-M3"/>
1046       <accept Dcore="Cortex-M4"/>
1047       <accept Dcore="Cortex-M7"/>
1048       <accept Dcore="SC300"/>
1049     </condition>
1050     <condition id="ARMv8-M Device">
1051       <description>Armv8-M architecture based device</description>
1052       <accept Dcore="ARMV8MBL"/>
1053       <accept Dcore="ARMV8MML"/>
1054       <accept Dcore="ARMV81MML"/>
1055       <accept Dcore="Cortex-M23"/>
1056       <accept Dcore="Cortex-M33"/>
1057       <accept Dcore="Cortex-M35P"/>
1058       <accept Dcore="Cortex-M55"/>
1059     </condition>
1060     <condition id="ARMv6_7-M Device">
1061       <description>Armv6_7-M architecture based device</description>
1062       <accept condition="ARMv6-M Device"/>
1063       <accept condition="ARMv7-M Device"/>
1064     </condition>
1065     <condition id="ARMv6_7_8-M Device">
1066       <description>Armv6_7_8-M architecture based device</description>
1067       <accept condition="ARMv6-M Device"/>
1068       <accept condition="ARMv7-M Device"/>
1069       <accept condition="ARMv8-M Device"/>
1070     </condition>
1071     <condition id="ARMv7-A Device">
1072       <description>Armv7-A architecture based device</description>
1073       <accept Dcore="Cortex-A5"/>
1074       <accept Dcore="Cortex-A7"/>
1075       <accept Dcore="Cortex-A9"/>
1076     </condition>
1077
1078     <condition id="TrustZone">
1079       <description>TrustZone</description>
1080       <require Dtz="TZ"/>
1081     </condition>
1082     <condition id="TZ Secure">
1083       <description>TrustZone (Secure)</description>
1084       <require Dtz="TZ"/>
1085       <require Dsecure="Secure"/>
1086     </condition>
1087     <condition id="TZ Non-secure">
1088       <description>TrustZone (Non-secure)</description>
1089       <require Dtz="TZ"/>
1090       <accept Dsecure="Non-secure"/>
1091       <accept Dsecure="TZ-disabled"/>
1092     </condition>
1093     <condition id="TZ Unavailable">
1094       <description>TrustZone not available</description>
1095       <deny Dtz="TZ"/>
1096     </condition>
1097
1098     <!-- ARM core -->
1099     <condition id="CM0">
1100       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
1101       <accept Dcore="Cortex-M0"/>
1102       <accept Dcore="Cortex-M0+"/>
1103       <accept Dcore="SC000"/>
1104     </condition>
1105     <condition id="CM1">
1106       <description>Cortex-M1</description>
1107       <require Dcore="Cortex-M1"/>
1108     </condition>
1109     <condition id="CM3">
1110       <description>Cortex-M3 or SC300 processor based device</description>
1111       <accept Dcore="Cortex-M3"/>
1112       <accept Dcore="SC300"/>
1113     </condition>
1114     <condition id="CM4">
1115       <description>Cortex-M4 processor based device</description>
1116       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
1117     </condition>
1118     <condition id="CM4_FP">
1119       <description>Cortex-M4 processor based device using Floating Point Unit</description>
1120       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
1121       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
1122       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
1123     </condition>
1124     <condition id="CM7">
1125       <description>Cortex-M7 processor based device</description>
1126       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
1127     </condition>
1128     <condition id="CM7_FP">
1129       <description>Cortex-M7 processor based device using Floating Point Unit</description>
1130       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
1131       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
1132     </condition>
1133     <condition id="CM23">
1134       <description>Cortex-M23 processor based device</description>
1135       <require Dcore="Cortex-M23"/>
1136     </condition>
1137     <condition id="CM33">
1138       <description>Cortex-M33 processor based device</description>
1139       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
1140     </condition>
1141     <condition id="CM33_FP">
1142       <description>Cortex-M33 processor based device using Floating Point Unit</description>
1143       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
1144     </condition>
1145     <condition id="CM35P">
1146       <description>Cortex-M35P processor based device</description>
1147       <require Dcore="Cortex-M35P" Dfpu="NO_FPU"/>
1148     </condition>
1149     <condition id="CM35P_FP">
1150       <description>Cortex-M35P processor based device using Floating Point Unit</description>
1151       <require Dcore="Cortex-M35P" Dfpu="SP_FPU"/>
1152     </condition>
1153     <condition id="ARMv8MBL">
1154       <description>Armv8-M Baseline processor based device</description>
1155       <require Dcore="ARMV8MBL"/>
1156     </condition>
1157     <condition id="ARMv8MML">
1158       <description>Armv8-M Mainline processor based device</description>
1159       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
1160     </condition>
1161     <condition id="ARMv8MML_FP">
1162       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
1163       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
1164       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
1165     </condition>
1166
1167     <condition id="CM55_NOFPU_NOMVE">
1168       <description>Cortex-M55, no FPU, no MVE</description>
1169       <require Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="NO_MVE"/>
1170     </condition>
1171     <condition id="CM55_NOFPU_MVE">
1172       <description>Cortex-M55, no FPU, MVE</description>
1173       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="MVE"/>
1174       <accept  Dcore="Cortex-M55" Dfpu="NO_FPU" Dmve="FP_MVE"/>
1175     </condition>
1176     <condition id="CM55_FPU">
1177       <description>Cortex-M55, FPU</description>
1178       <accept  Dcore="Cortex-M55" Dfpu="SP_FPU"/>
1179       <accept  Dcore="Cortex-M55" Dfpu="DP_FPU"/>
1180     </condition>
1181
1182     <condition id="CA5_CA9">
1183       <description>Cortex-A5 or Cortex-A9 processor based device</description>
1184       <accept Dcore="Cortex-A5"/>
1185       <accept Dcore="Cortex-A9"/>
1186     </condition>
1187
1188     <condition id="CA7">
1189       <description>Cortex-A7 processor based device</description>
1190       <accept Dcore="Cortex-A7"/>
1191     </condition>
1192
1193     <!-- ARMCC compiler -->
1194     <condition id="CA_ARMCC5">
1195       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
1196       <require condition="ARMv7-A Device"/>
1197       <require condition="ARMCC5"/>
1198     </condition>
1199     <condition id="CA_ARMCC6">
1200       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
1201       <require condition="ARMv7-A Device"/>
1202       <require condition="ARMCC6"/>
1203     </condition>
1204
1205     <condition id="CM0_ARMCC">
1206       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
1207       <require condition="CM0"/>
1208       <require Tcompiler="ARMCC"/>
1209     </condition>
1210     <condition id="CM0_ARMCC5">
1211       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 5</description>
1212       <require condition="CM0"/>
1213       <require condition="ARMCC5"/>
1214     </condition>
1215     <condition id="CM0_ARMCC6">
1216       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler 6</description>
1217       <require condition="CM0"/>
1218       <require condition="ARMCC6"/>
1219     </condition>
1220     <condition id="CM0_LE_ARMCC">
1221       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
1222       <require condition="CM0_ARMCC"/>
1223       <require Dendian="Little-endian"/>
1224     </condition>
1225     <condition id="CM0_BE_ARMCC">
1226       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
1227       <require condition="CM0_ARMCC"/>
1228       <require Dendian="Big-endian"/>
1229     </condition>
1230
1231     <condition id="CM1_ARMCC">
1232       <description>Cortex-M1 based device for the Arm Compiler</description>
1233       <require condition="CM1"/>
1234       <require Tcompiler="ARMCC"/>
1235     </condition>
1236     <condition id="CM1_ARMCC5">
1237       <description>Cortex-M1 based device for the Arm Compiler 5</description>
1238       <require condition="CM1"/>
1239       <require condition="ARMCC5"/>
1240     </condition>
1241     <condition id="CM1_ARMCC6">
1242       <description>Cortex-M1 based device for the Arm Compiler 6</description>
1243       <require condition="CM1"/>
1244       <require condition="ARMCC6"/>
1245     </condition>
1246     <condition id="CM1_LE_ARMCC">
1247       <description>Cortex-M1 based device in little endian mode for the Arm Compiler</description>
1248       <require condition="CM1_ARMCC"/>
1249       <require Dendian="Little-endian"/>
1250     </condition>
1251     <condition id="CM1_BE_ARMCC">
1252       <description>Cortex-M1 based device in big endian mode for the Arm Compiler</description>
1253       <require condition="CM1_ARMCC"/>
1254       <require Dendian="Big-endian"/>
1255     </condition>
1256
1257     <condition id="CM3_ARMCC">
1258       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
1259       <require condition="CM3"/>
1260       <require Tcompiler="ARMCC"/>
1261     </condition>
1262     <condition id="CM3_ARMCC5">
1263       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 5</description>
1264       <require condition="CM3"/>
1265       <require condition="ARMCC5"/>
1266     </condition>
1267     <condition id="CM3_ARMCC6">
1268       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler 6</description>
1269       <require condition="CM3"/>
1270       <require condition="ARMCC6"/>
1271     </condition>
1272     <condition id="CM3_LE_ARMCC">
1273       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
1274       <require condition="CM3_ARMCC"/>
1275       <require Dendian="Little-endian"/>
1276     </condition>
1277     <condition id="CM3_BE_ARMCC">
1278       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
1279       <require condition="CM3_ARMCC"/>
1280       <require Dendian="Big-endian"/>
1281     </condition>
1282
1283     <condition id="CM4_ARMCC">
1284       <description>Cortex-M4 processor based device for the Arm Compiler</description>
1285       <require condition="CM4"/>
1286       <require Tcompiler="ARMCC"/>
1287     </condition>
1288     <condition id="CM4_ARMCC5">
1289       <description>Cortex-M4 processor based device for the Arm Compiler 5</description>
1290       <require condition="CM4"/>
1291       <require condition="ARMCC5"/>
1292     </condition>
1293     <condition id="CM4_ARMCC6">
1294       <description>Cortex-M4 processor based device for the Arm Compiler 6</description>
1295       <require condition="CM4"/>
1296       <require condition="ARMCC6"/>
1297     </condition>
1298     <condition id="CM4_LE_ARMCC">
1299       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
1300       <require condition="CM4_ARMCC"/>
1301       <require Dendian="Little-endian"/>
1302     </condition>
1303     <condition id="CM4_BE_ARMCC">
1304       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
1305       <require condition="CM4_ARMCC"/>
1306       <require Dendian="Big-endian"/>
1307     </condition>
1308
1309     <condition id="CM4_FP_ARMCC">
1310       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
1311       <require condition="CM4_FP"/>
1312       <require Tcompiler="ARMCC"/>
1313     </condition>
1314     <condition id="CM4_FP_ARMCC5">
1315       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1316       <require condition="CM4_FP"/>
1317       <require condition="ARMCC5"/>
1318     </condition>
1319     <condition id="CM4_FP_ARMCC6">
1320       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1321       <require condition="CM4_FP"/>
1322       <require condition="ARMCC6"/>
1323     </condition>
1324     <condition id="CM4_FP_LE_ARMCC">
1325       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1326       <require condition="CM4_FP_ARMCC"/>
1327       <require Dendian="Little-endian"/>
1328     </condition>
1329     <condition id="CM4_FP_BE_ARMCC">
1330       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1331       <require condition="CM4_FP_ARMCC"/>
1332       <require Dendian="Big-endian"/>
1333     </condition>
1334
1335     <condition id="CM7_ARMCC">
1336       <description>Cortex-M7 processor based device for the Arm Compiler</description>
1337       <require condition="CM7"/>
1338       <require Tcompiler="ARMCC"/>
1339     </condition>
1340     <condition id="CM7_ARMCC5">
1341       <description>Cortex-M7 processor based device for the Arm Compiler 5</description>
1342       <require condition="CM7"/>
1343       <require condition="ARMCC5"/>
1344     </condition>
1345     <condition id="CM7_ARMCC6">
1346       <description>Cortex-M7 processor based device for the Arm Compiler 6</description>
1347       <require condition="CM7"/>
1348       <require condition="ARMCC6"/>
1349     </condition>
1350     <condition id="CM7_LE_ARMCC">
1351       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
1352       <require condition="CM7_ARMCC"/>
1353       <require Dendian="Little-endian"/>
1354     </condition>
1355     <condition id="CM7_BE_ARMCC">
1356       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
1357       <require condition="CM7_ARMCC"/>
1358       <require Dendian="Big-endian"/>
1359     </condition>
1360
1361     <condition id="CM7_FP_ARMCC">
1362       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
1363       <require condition="CM7_FP"/>
1364       <require Tcompiler="ARMCC"/>
1365     </condition>
1366     <condition id="CM7_FP_ARMCC5">
1367       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 5</description>
1368       <require condition="CM7_FP"/>
1369       <require condition="ARMCC5"/>
1370     </condition>
1371     <condition id="CM7_FP_ARMCC6">
1372       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler 6</description>
1373       <require condition="CM7_FP"/>
1374       <require condition="ARMCC6"/>
1375     </condition>
1376     <condition id="CM7_FP_LE_ARMCC">
1377       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1378       <require condition="CM7_FP_ARMCC"/>
1379       <require Dendian="Little-endian"/>
1380     </condition>
1381     <condition id="CM7_FP_BE_ARMCC">
1382       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1383       <require condition="CM7_FP_ARMCC"/>
1384       <require Dendian="Big-endian"/>
1385     </condition>
1386
1387     <condition id="CM23_ARMCC">
1388       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1389       <require condition="CM23"/>
1390       <require Tcompiler="ARMCC"/>
1391     </condition>
1392     <condition id="CM23_LE_ARMCC">
1393       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1394       <require condition="CM23_ARMCC"/>
1395       <require Dendian="Little-endian"/>
1396     </condition>
1397
1398     <condition id="CM33_ARMCC">
1399       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1400       <require condition="CM33"/>
1401       <require Tcompiler="ARMCC"/>
1402     </condition>
1403     <condition id="CM33_LE_ARMCC">
1404       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1405       <require condition="CM33_ARMCC"/>
1406       <require Dendian="Little-endian"/>
1407     </condition>
1408
1409     <condition id="CM33_FP_ARMCC">
1410       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1411       <require condition="CM33_FP"/>
1412       <require Tcompiler="ARMCC"/>
1413     </condition>
1414     <condition id="CM33_FP_LE_ARMCC">
1415       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1416       <require condition="CM33_FP_ARMCC"/>
1417       <require Dendian="Little-endian"/>
1418     </condition>
1419
1420     <condition id="CM35P_ARMCC">
1421       <description>Cortex-M35P processor based device for the Arm Compiler</description>
1422       <require condition="CM35P"/>
1423       <require Tcompiler="ARMCC"/>
1424     </condition>
1425     <condition id="CM35P_LE_ARMCC">
1426       <description>Cortex-M35P processor based device in little endian mode for the Arm Compiler</description>
1427       <require condition="CM35P_ARMCC"/>
1428       <require Dendian="Little-endian"/>
1429     </condition>
1430
1431     <condition id="CM35P_FP_ARMCC">
1432       <description>Cortex-M35P processor based device using Floating Point Unit for the Arm Compiler</description>
1433       <require condition="CM35P_FP"/>
1434       <require Tcompiler="ARMCC"/>
1435     </condition>
1436     <condition id="CM35P_FP_LE_ARMCC">
1437       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1438       <require condition="CM35P_FP_ARMCC"/>
1439       <require Dendian="Little-endian"/>
1440     </condition>
1441
1442     <condition id="CM55_NOFPU_NOMVE_ARMCC">
1443       <description>Cortex-M55 processor, no FPU, no MVE, Arm Compiler</description>
1444       <require condition="CM55_NOFPU_NOMVE"/>
1445       <require Tcompiler="ARMCC"/>
1446     </condition>
1447     <condition id="CM55_NOFPU_MVE_ARMCC">
1448       <description>Cortex-M55 processor, no FPU, MVE, Arm Compiler</description>
1449       <require condition="CM55_NOFPU_MVE"/>
1450       <require Tcompiler="ARMCC"/>
1451     </condition>
1452     <condition id="CM55_FPU_ARMCC">
1453       <description>Cortex-M55 processor, FPU, Arm Compiler</description>
1454       <require condition="CM55_FPU"/>
1455       <require Tcompiler="ARMCC"/>
1456     </condition>
1457     <condition id="CM55_NOFPU_NOMVE_LE_ARMCC">
1458       <description>Cortex-M55 processor, little endian, no FPU, no MVE, Arm Compiler</description>
1459       <require condition="CM55_NOFPU_NOMVE_ARMCC"/>
1460       <require Dendian="Little-endian"/>
1461     </condition>
1462     <condition id="CM55_FPU_LE_ARMCC">
1463       <description>Cortex-M55 processor, little endian, FPU, Arm Compiler</description>
1464       <require condition="CM55_FPU_ARMCC"/>
1465       <require Dendian="Little-endian"/>
1466     </condition>
1467
1468     <condition id="ARMv8MBL_ARMCC">
1469       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1470       <require condition="ARMv8MBL"/>
1471       <require Tcompiler="ARMCC"/>
1472     </condition>
1473     <condition id="ARMv8MBL_LE_ARMCC">
1474       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1475       <require condition="ARMv8MBL_ARMCC"/>
1476       <require Dendian="Little-endian"/>
1477     </condition>
1478
1479     <condition id="ARMv8MML_ARMCC">
1480       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1481       <require condition="ARMv8MML"/>
1482       <require Tcompiler="ARMCC"/>
1483     </condition>
1484     <condition id="ARMv8MML_LE_ARMCC">
1485       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1486       <require condition="ARMv8MML_ARMCC"/>
1487       <require Dendian="Little-endian"/>
1488     </condition>
1489
1490     <condition id="ARMv8MML_FP_ARMCC">
1491       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1492       <require condition="ARMv8MML_FP"/>
1493       <require Tcompiler="ARMCC"/>
1494     </condition>
1495     <condition id="ARMv8MML_FP_LE_ARMCC">
1496       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1497       <require condition="ARMv8MML_FP_ARMCC"/>
1498       <require Dendian="Little-endian"/>
1499     </condition>
1500
1501     <condition id="TZ Secure ARMCC6">
1502       <description>TrustZone (Secure), Arm Compiler</description>
1503       <require condition="TZ Secure"/>
1504       <require condition="ARMCC6"/>
1505     </condition>
1506     <condition id="TZ Non-secure ARMCC6">
1507       <description>TrustZone (Non-secure), Arm Compiler</description>
1508       <require condition="TZ Non-secure"/>
1509       <require condition="ARMCC6"/>
1510     </condition>
1511     <condition id="TZ Unavailable ARMCC6">
1512       <description>TrustZone not available, Arm Compiler</description>
1513       <require condition="TZ Unavailable"/>
1514       <require condition="ARMCC6"/>
1515     </condition>
1516
1517     <!-- GCC compiler -->
1518     <condition id="CA_GCC">
1519       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1520       <require condition="ARMv7-A Device"/>
1521       <require Tcompiler="GCC"/>
1522     </condition>
1523
1524     <condition id="CM0_GCC">
1525       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1526       <require condition="CM0"/>
1527       <require Tcompiler="GCC"/>
1528     </condition>
1529     <condition id="CM0_LE_GCC">
1530       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1531       <require condition="CM0_GCC"/>
1532       <require Dendian="Little-endian"/>
1533     </condition>
1534     <condition id="CM0_BE_GCC">
1535       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1536       <require condition="CM0_GCC"/>
1537       <require Dendian="Big-endian"/>
1538     </condition>
1539
1540     <condition id="CM1_GCC">
1541       <description>Cortex-M1 based device for the GCC Compiler</description>
1542       <require condition="CM1"/>
1543       <require Tcompiler="GCC"/>
1544     </condition>
1545     <condition id="CM1_LE_GCC">
1546       <description>Cortex-M1 based device in little endian mode for the GCC Compiler</description>
1547       <require condition="CM1_GCC"/>
1548       <require Dendian="Little-endian"/>
1549     </condition>
1550     <condition id="CM1_BE_GCC">
1551       <description>Cortex-M1 based device in big endian mode for the GCC Compiler</description>
1552       <require condition="CM1_GCC"/>
1553       <require Dendian="Big-endian"/>
1554     </condition>
1555
1556     <condition id="CM3_GCC">
1557       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1558       <require condition="CM3"/>
1559       <require Tcompiler="GCC"/>
1560     </condition>
1561     <condition id="CM3_LE_GCC">
1562       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1563       <require condition="CM3_GCC"/>
1564       <require Dendian="Little-endian"/>
1565     </condition>
1566     <condition id="CM3_BE_GCC">
1567       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1568       <require condition="CM3_GCC"/>
1569       <require Dendian="Big-endian"/>
1570     </condition>
1571
1572     <condition id="CM4_GCC">
1573       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1574       <require condition="CM4"/>
1575       <require Tcompiler="GCC"/>
1576     </condition>
1577     <condition id="CM4_LE_GCC">
1578       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1579       <require condition="CM4_GCC"/>
1580       <require Dendian="Little-endian"/>
1581     </condition>
1582     <condition id="CM4_BE_GCC">
1583       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1584       <require condition="CM4_GCC"/>
1585       <require Dendian="Big-endian"/>
1586     </condition>
1587
1588     <condition id="CM4_FP_GCC">
1589       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1590       <require condition="CM4_FP"/>
1591       <require Tcompiler="GCC"/>
1592     </condition>
1593     <condition id="CM4_FP_LE_GCC">
1594       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1595       <require condition="CM4_FP_GCC"/>
1596       <require Dendian="Little-endian"/>
1597     </condition>
1598     <condition id="CM4_FP_BE_GCC">
1599       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1600       <require condition="CM4_FP_GCC"/>
1601       <require Dendian="Big-endian"/>
1602     </condition>
1603
1604     <condition id="CM7_GCC">
1605       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1606       <require condition="CM7"/>
1607       <require Tcompiler="GCC"/>
1608     </condition>
1609     <condition id="CM7_LE_GCC">
1610       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1611       <require condition="CM7_GCC"/>
1612       <require Dendian="Little-endian"/>
1613     </condition>
1614     <condition id="CM7_BE_GCC">
1615       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1616       <require condition="CM7_GCC"/>
1617       <require Dendian="Big-endian"/>
1618     </condition>
1619
1620     <condition id="CM7_FP_GCC">
1621       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1622       <require condition="CM7_FP"/>
1623       <require Tcompiler="GCC"/>
1624     </condition>
1625     <condition id="CM7_FP_LE_GCC">
1626       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1627       <require condition="CM7_FP_GCC"/>
1628       <require Dendian="Little-endian"/>
1629     </condition>
1630     <condition id="CM7_FP_BE_GCC">
1631       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1632       <require condition="CM7_FP_GCC"/>
1633       <require Dendian="Big-endian"/>
1634     </condition>
1635
1636     <condition id="CM23_GCC">
1637       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1638       <require condition="CM23"/>
1639       <require Tcompiler="GCC"/>
1640     </condition>
1641     <condition id="CM23_LE_GCC">
1642       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1643       <require condition="CM23_GCC"/>
1644       <require Dendian="Little-endian"/>
1645     </condition>
1646
1647     <condition id="CM33_GCC">
1648       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1649       <require condition="CM33"/>
1650       <require Tcompiler="GCC"/>
1651     </condition>
1652     <condition id="CM33_LE_GCC">
1653       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1654       <require condition="CM33_GCC"/>
1655       <require Dendian="Little-endian"/>
1656     </condition>
1657
1658     <condition id="CM33_FP_GCC">
1659       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1660       <require condition="CM33_FP"/>
1661       <require Tcompiler="GCC"/>
1662     </condition>
1663     <condition id="CM33_FP_LE_GCC">
1664       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1665       <require condition="CM33_FP_GCC"/>
1666       <require Dendian="Little-endian"/>
1667     </condition>
1668
1669     <condition id="CM35P_GCC">
1670       <description>Cortex-M35P processor based device for the GCC Compiler</description>
1671       <require condition="CM35P"/>
1672       <require Tcompiler="GCC"/>
1673     </condition>
1674     <condition id="CM35P_LE_GCC">
1675       <description>Cortex-M35P processor based device in little endian mode for the GCC Compiler</description>
1676       <require condition="CM35P_GCC"/>
1677       <require Dendian="Little-endian"/>
1678     </condition>
1679
1680     <condition id="CM35P_FP_GCC">
1681       <description>Cortex-M35P processor based device using Floating Point Unit for the GCC Compiler</description>
1682       <require condition="CM35P_FP"/>
1683       <require Tcompiler="GCC"/>
1684     </condition>
1685     <condition id="CM35P_FP_LE_GCC">
1686       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1687       <require condition="CM35P_FP_GCC"/>
1688       <require Dendian="Little-endian"/>
1689     </condition>
1690
1691     <condition id="CM55_NOFPU_NOMVE_GCC">
1692       <description>Cortex-M55 processor, no FPU, no MVE, GCC Compiler</description>
1693       <require condition="CM55_NOFPU_NOMVE"/>
1694       <require Tcompiler="GCC"/>
1695     </condition>
1696     <condition id="CM55_NOFPU_MVE_GCC">
1697       <description>Cortex-M55 processor, no FPU, MVE, GCC Compiler</description>
1698       <require condition="CM55_NOFPU_MVE"/>
1699       <require Tcompiler="GCC"/>
1700     </condition>
1701     <condition id="CM55_FPU_GCC">
1702       <description>Cortex-M55 processor, FPU, GCC Compiler</description>
1703       <require condition="CM55_FPU"/>
1704       <require Tcompiler="GCC"/>
1705     </condition>
1706     <condition id="CM55_NOFPU_NOMVE_LE_GCC">
1707       <description>Cortex-M55 processor, little endian, no FPU, no MVE, GCC Compiler</description>
1708       <require condition="CM55_NOFPU_NOMVE_GCC"/>
1709       <require Dendian="Little-endian"/>
1710     </condition>
1711     <condition id="CM55_FPU_LE_GCC">
1712       <description>Cortex-M55 processor, little endian, FPU, GCC Compiler</description>
1713       <require condition="CM55_FPU_GCC"/>
1714       <require Dendian="Little-endian"/>
1715     </condition>
1716
1717     <condition id="ARMv8MBL_GCC">
1718       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1719       <require condition="ARMv8MBL"/>
1720       <require Tcompiler="GCC"/>
1721     </condition>
1722     <condition id="ARMv8MBL_LE_GCC">
1723       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1724       <require condition="ARMv8MBL_GCC"/>
1725       <require Dendian="Little-endian"/>
1726     </condition>
1727
1728     <condition id="ARMv8MML_GCC">
1729       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1730       <require condition="ARMv8MML"/>
1731       <require Tcompiler="GCC"/>
1732     </condition>
1733     <condition id="ARMv8MML_LE_GCC">
1734       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1735       <require condition="ARMv8MML_GCC"/>
1736       <require Dendian="Little-endian"/>
1737     </condition>
1738
1739     <condition id="ARMv8MML_FP_GCC">
1740       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1741       <require condition="ARMv8MML_FP"/>
1742       <require Tcompiler="GCC"/>
1743     </condition>
1744     <condition id="ARMv8MML_FP_LE_GCC">
1745       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1746       <require condition="ARMv8MML_FP_GCC"/>
1747       <require Dendian="Little-endian"/>
1748     </condition>
1749
1750     <!-- IAR compiler -->
1751     <condition id="CA_IAR">
1752       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1753       <require condition="ARMv7-A Device"/>
1754       <require Tcompiler="IAR"/>
1755     </condition>
1756
1757     <condition id="CM0_IAR">
1758       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1759       <require condition="CM0"/>
1760       <require Tcompiler="IAR"/>
1761     </condition>
1762     <condition id="CM0_LE_IAR">
1763       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1764       <require condition="CM0_IAR"/>
1765       <require Dendian="Little-endian"/>
1766     </condition>
1767     <condition id="CM0_BE_IAR">
1768       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1769       <require condition="CM0_IAR"/>
1770       <require Dendian="Big-endian"/>
1771     </condition>
1772
1773     <condition id="CM1_IAR">
1774       <description>Cortex-M1 based device for the IAR Compiler</description>
1775       <require condition="CM1"/>
1776       <require Tcompiler="IAR"/>
1777     </condition>
1778     <condition id="CM1_LE_IAR">
1779       <description>Cortex-M1 based device in little endian mode for the IAR Compiler</description>
1780       <require condition="CM1_IAR"/>
1781       <require Dendian="Little-endian"/>
1782     </condition>
1783     <condition id="CM1_BE_IAR">
1784       <description>Cortex-M1 based device in big endian mode for the IAR Compiler</description>
1785       <require condition="CM1_IAR"/>
1786       <require Dendian="Big-endian"/>
1787     </condition>
1788
1789     <condition id="CM3_IAR">
1790       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1791       <require condition="CM3"/>
1792       <require Tcompiler="IAR"/>
1793     </condition>
1794     <condition id="CM3_LE_IAR">
1795       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1796       <require condition="CM3_IAR"/>
1797       <require Dendian="Little-endian"/>
1798     </condition>
1799     <condition id="CM3_BE_IAR">
1800       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1801       <require condition="CM3_IAR"/>
1802       <require Dendian="Big-endian"/>
1803     </condition>
1804
1805     <condition id="CM4_IAR">
1806       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1807       <require condition="CM4"/>
1808       <require Tcompiler="IAR"/>
1809     </condition>
1810     <condition id="CM4_LE_IAR">
1811       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1812       <require condition="CM4_IAR"/>
1813       <require Dendian="Little-endian"/>
1814     </condition>
1815     <condition id="CM4_BE_IAR">
1816       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1817       <require condition="CM4_IAR"/>
1818       <require Dendian="Big-endian"/>
1819     </condition>
1820
1821     <condition id="CM4_FP_IAR">
1822       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1823       <require condition="CM4_FP"/>
1824       <require Tcompiler="IAR"/>
1825     </condition>
1826     <condition id="CM4_FP_LE_IAR">
1827       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1828       <require condition="CM4_FP_IAR"/>
1829       <require Dendian="Little-endian"/>
1830     </condition>
1831     <condition id="CM4_FP_BE_IAR">
1832       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1833       <require condition="CM4_FP_IAR"/>
1834       <require Dendian="Big-endian"/>
1835     </condition>
1836
1837     <condition id="CM7_IAR">
1838       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1839       <require condition="CM7"/>
1840       <require Tcompiler="IAR"/>
1841     </condition>
1842     <condition id="CM7_LE_IAR">
1843       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1844       <require condition="CM7_IAR"/>
1845       <require Dendian="Little-endian"/>
1846     </condition>
1847     <condition id="CM7_BE_IAR">
1848       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1849       <require condition="CM7_IAR"/>
1850       <require Dendian="Big-endian"/>
1851     </condition>
1852
1853     <condition id="CM7_FP_IAR">
1854       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1855       <require condition="CM7_FP"/>
1856       <require Tcompiler="IAR"/>
1857     </condition>
1858     <condition id="CM7_FP_LE_IAR">
1859       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1860       <require condition="CM7_FP_IAR"/>
1861       <require Dendian="Little-endian"/>
1862     </condition>
1863     <condition id="CM7_FP_BE_IAR">
1864       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1865       <require condition="CM7_FP_IAR"/>
1866       <require Dendian="Big-endian"/>
1867     </condition>
1868
1869     <condition id="CM23_IAR">
1870       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1871       <require condition="CM23"/>
1872       <require Tcompiler="IAR"/>
1873     </condition>
1874     <condition id="CM23_LE_IAR">
1875       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1876       <require condition="CM23_IAR"/>
1877       <require Dendian="Little-endian"/>
1878     </condition>
1879
1880     <condition id="CM33_IAR">
1881       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1882       <require condition="CM33"/>
1883       <require Tcompiler="IAR"/>
1884     </condition>
1885     <condition id="CM33_LE_IAR">
1886       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1887       <require condition="CM33_IAR"/>
1888       <require Dendian="Little-endian"/>
1889     </condition>
1890
1891     <condition id="CM33_FP_IAR">
1892       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1893       <require condition="CM33_FP"/>
1894       <require Tcompiler="IAR"/>
1895     </condition>
1896     <condition id="CM33_FP_LE_IAR">
1897       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1898       <require condition="CM33_FP_IAR"/>
1899       <require Dendian="Little-endian"/>
1900     </condition>
1901
1902     <condition id="CM35P_IAR">
1903       <description>Cortex-M35P processor based device for the IAR Compiler</description>
1904       <require condition="CM35P"/>
1905       <require Tcompiler="IAR"/>
1906     </condition>
1907     <condition id="CM35P_LE_IAR">
1908       <description>Cortex-M35P processor based device in little endian mode for the IAR Compiler</description>
1909       <require condition="CM35P_IAR"/>
1910       <require Dendian="Little-endian"/>
1911     </condition>
1912
1913     <condition id="CM35P_FP_IAR">
1914       <description>Cortex-M35P processor based device using Floating Point Unit for the IAR Compiler</description>
1915       <require condition="CM35P_FP"/>
1916       <require Tcompiler="IAR"/>
1917     </condition>
1918     <condition id="CM35P_FP_LE_IAR">
1919       <description>Cortex-M35P processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1920       <require condition="CM35P_FP_IAR"/>
1921       <require Dendian="Little-endian"/>
1922     </condition>
1923
1924     <condition id="CM55_NOFPU_NOMVE_IAR">
1925       <description>Cortex-M55 processor, no FPU, no MVE, IAR Compiler</description>
1926       <require condition="CM55_NOFPU_NOMVE"/>
1927       <require Tcompiler="IAR"/>
1928     </condition>
1929     <condition id="CM55_NOFPU_MVE_IAR">
1930       <description>Cortex-M55 processor, no FPU, MVE, IAR Compiler</description>
1931       <require condition="CM55_NOFPU_MVE"/>
1932       <require Tcompiler="IAR"/>
1933     </condition>
1934     <condition id="CM55_FPU_IAR">
1935       <description>Cortex-M55 processor, FPU, IAR Compiler</description>
1936       <require condition="CM55_FPU"/>
1937       <require Tcompiler="IAR"/>
1938     </condition>
1939     <condition id="CM55_NOFPU_NOMVE_LE_IAR">
1940       <description>Cortex-M55 processor, little endian, no FPU, no MVE, IAR Compiler</description>
1941       <require condition="CM55_NOFPU_NOMVE_IAR"/>
1942       <require Dendian="Little-endian"/>
1943     </condition>
1944     <condition id="CM55_FPU_LE_IAR">
1945       <description>Cortex-M55 processor, little endian, FPU, IAR Compiler</description>
1946       <require condition="CM55_FPU_IAR"/>
1947       <require Dendian="Little-endian"/>
1948     </condition>
1949
1950     <condition id="ARMv8MBL_IAR">
1951       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1952       <require condition="ARMv8MBL"/>
1953       <require Tcompiler="IAR"/>
1954     </condition>
1955     <condition id="ARMv8MBL_LE_IAR">
1956       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1957       <require condition="ARMv8MBL_IAR"/>
1958       <require Dendian="Little-endian"/>
1959     </condition>
1960
1961     <condition id="ARMv8MML_IAR">
1962       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1963       <require condition="ARMv8MML"/>
1964       <require Tcompiler="IAR"/>
1965     </condition>
1966     <condition id="ARMv8MML_LE_IAR">
1967       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1968       <require condition="ARMv8MML_IAR"/>
1969       <require Dendian="Little-endian"/>
1970     </condition>
1971
1972     <condition id="ARMv8MML_FP_IAR">
1973       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1974       <require condition="ARMv8MML_FP"/>
1975       <require Tcompiler="IAR"/>
1976     </condition>
1977     <condition id="ARMv8MML_FP_LE_IAR">
1978       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1979       <require condition="ARMv8MML_FP_IAR"/>
1980       <require Dendian="Little-endian"/>
1981     </condition>
1982
1983     <!-- conditions selecting single devices and CMSIS Core -->
1984     <condition id="ARMCM0 CMSIS">
1985       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1986       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1987       <require Cclass="CMSIS" Cgroup="CORE"/>
1988     </condition>
1989
1990     <condition id="ARMCM0+ CMSIS">
1991       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1992       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1993       <require Cclass="CMSIS" Cgroup="CORE"/>
1994     </condition>
1995
1996     <condition id="ARMCM1 CMSIS">
1997       <description>Generic Arm Cortex-M1 device startup and depends on CMSIS Core</description>
1998       <require Dvendor="ARM:82" Dname="ARMCM1"/>
1999       <require Cclass="CMSIS" Cgroup="CORE"/>
2000     </condition>
2001
2002     <condition id="ARMCM3 CMSIS">
2003       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
2004       <require Dvendor="ARM:82" Dname="ARMCM3"/>
2005       <require Cclass="CMSIS" Cgroup="CORE"/>
2006     </condition>
2007
2008     <condition id="ARMCM4 CMSIS">
2009       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
2010       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
2011       <require Cclass="CMSIS" Cgroup="CORE"/>
2012     </condition>
2013
2014     <condition id="ARMCM7 CMSIS">
2015       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
2016       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
2017       <require Cclass="CMSIS" Cgroup="CORE"/>
2018     </condition>
2019
2020     <condition id="ARMCM23 CMSIS">
2021       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
2022       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
2023       <require Cclass="CMSIS" Cgroup="CORE"/>
2024     </condition>
2025
2026     <condition id="ARMCM33 CMSIS">
2027       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
2028       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
2029       <require Cclass="CMSIS" Cgroup="CORE"/>
2030     </condition>
2031
2032     <condition id="ARMCM35P CMSIS">
2033       <description>Generic Arm Cortex-M35P device startup and depends on CMSIS Core</description>
2034       <require Dvendor="ARM:82" Dname="ARMCM35P*"/>
2035       <require Cclass="CMSIS" Cgroup="CORE"/>
2036     </condition>
2037
2038     <condition id="ARMCM55 CMSIS">
2039       <description>Generic Arm Cortex-M55 device startup and depends on CMSIS Core</description>
2040       <require Dvendor="ARM:82" Dname="ARMCM55*"/>
2041       <require Cclass="CMSIS" Cgroup="CORE"/>
2042     </condition>
2043
2044     <condition id="ARMSC000 CMSIS">
2045       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
2046       <require Dvendor="ARM:82" Dname="ARMSC000"/>
2047       <require Cclass="CMSIS" Cgroup="CORE"/>
2048     </condition>
2049
2050     <condition id="ARMSC300 CMSIS">
2051       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
2052       <require Dvendor="ARM:82" Dname="ARMSC300"/>
2053       <require Cclass="CMSIS" Cgroup="CORE"/>
2054     </condition>
2055
2056     <condition id="ARMv8MBL CMSIS">
2057       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
2058       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
2059       <require Cclass="CMSIS" Cgroup="CORE"/>
2060     </condition>
2061
2062     <condition id="ARMv8MML CMSIS">
2063       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
2064       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
2065       <require Cclass="CMSIS" Cgroup="CORE"/>
2066     </condition>
2067
2068     <condition id="ARMv81MML CMSIS">
2069       <description>Generic Armv8.1-M Mainline device startup and depends on CMSIS Core</description>
2070       <require Dvendor="ARM:82" Dname="ARMv81MML*"/>
2071       <require Cclass="CMSIS" Cgroup="CORE"/>
2072     </condition>
2073
2074     <condition id="ARMCA5 CMSIS">
2075       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
2076       <require Dvendor="ARM:82" Dname="ARMCA5"/>
2077       <require Cclass="CMSIS" Cgroup="CORE"/>
2078     </condition>
2079
2080     <condition id="ARMCA7 CMSIS">
2081       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
2082       <require Dvendor="ARM:82" Dname="ARMCA7"/>
2083       <require Cclass="CMSIS" Cgroup="CORE"/>
2084     </condition>
2085
2086     <condition id="ARMCA9 CMSIS">
2087       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
2088       <require Dvendor="ARM:82" Dname="ARMCA9"/>
2089       <require Cclass="CMSIS" Cgroup="CORE"/>
2090     </condition>
2091
2092     <!-- CMSIS DSP -->
2093     <condition id="CMSIS DSP">
2094       <description>Components required for DSP</description>
2095       <require condition="ARMv6_7_8-M Device"/>
2096       <require condition="ARMCC GCC IAR"/>
2097       <require Cclass="CMSIS" Cgroup="CORE"/>
2098     </condition>
2099
2100     <!-- CMSIS NN -->
2101     <condition id="CMSIS NN">
2102       <description>Components required for NN</description>
2103       <require Cclass="CMSIS" Cgroup="DSP"/>
2104     </condition>
2105
2106     <!-- RTOS RTX -->
2107     <condition id="RTOS RTX">
2108       <description>Components required for RTOS RTX</description>
2109       <require condition="ARMv6_7-M Device"/>
2110       <require condition="ARMCC GCC IAR"/>
2111       <require Cclass="Device" Cgroup="Startup"/>
2112       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2113     </condition>
2114     <condition id="RTOS RTX IFX">
2115       <description>Components required for RTOS RTX IFX</description>
2116       <require condition="ARMv6_7-M Device"/>
2117       <require condition="ARMCC GCC IAR"/>
2118       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2119       <require Cclass="Device" Cgroup="Startup"/>
2120       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2121     </condition>
2122     <condition id="RTOS RTX5">
2123       <description>Components required for RTOS RTX5</description>
2124       <require condition="ARMv6_7_8-M Device"/>
2125       <require condition="ARMCC GCC IAR"/>
2126       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2127     </condition>
2128     <condition id="RTOS2 RTX5">
2129       <description>Components required for RTOS2 RTX5</description>
2130       <require condition="ARMv6_7_8-M Device"/>
2131       <require condition="ARMCC GCC IAR"/>
2132       <require Cclass="CMSIS"  Cgroup="CORE"/>
2133       <require Cclass="Device" Cgroup="Startup"/>
2134     </condition>
2135     <condition id="RTOS2 RTX5 v7-A">
2136       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2137       <require condition="ARMv7-A Device"/>
2138       <require condition="ARMCC GCC IAR"/>
2139       <require Cclass="CMSIS"  Cgroup="CORE"/>
2140       <require Cclass="Device" Cgroup="Startup"/>
2141       <require Cclass="Device" Cgroup="OS Tick"/>
2142       <require Cclass="Device" Cgroup="IRQ Controller"/>
2143     </condition>
2144     <condition id="RTOS2 RTX5 NS">
2145       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2146       <require condition="ARMv8-M Device"/>
2147       <require condition="TZ Non-secure"/>
2148       <require condition="ARMCC GCC IAR"/>
2149       <require Cclass="CMSIS"  Cgroup="CORE"/>
2150       <require Cclass="Device" Cgroup="Startup"/>
2151     </condition>
2152
2153     <!-- OS Tick -->
2154     <condition id="OS Tick PTIM">
2155       <description>Components required for OS Tick Private Timer</description>
2156       <require condition="CA5_CA9"/>
2157       <require Cclass="Device" Cgroup="IRQ Controller"/>
2158     </condition>
2159
2160     <condition id="OS Tick GTIM">
2161       <description>Components required for OS Tick Generic Physical Timer</description>
2162       <require condition="CA7"/>
2163       <require Cclass="Device" Cgroup="IRQ Controller"/>
2164     </condition>
2165
2166   </conditions>
2167
2168   <components>
2169     <!-- CMSIS-Core component -->
2170     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.5.0"  condition="ARMv6_7_8-M Device" >
2171       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M</description>
2172       <files>
2173         <!-- CPU independent -->
2174         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2175         <file category="include" name="CMSIS/Core/Include/"/>
2176         <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
2177         <!-- Code template -->
2178         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
2179         <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2180       </files>
2181     </component>
2182
2183     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.2.1"  condition="ARMv7-A Device" >
2184       <description>CMSIS-CORE for Cortex-A</description>
2185       <files>
2186         <!-- CPU independent -->
2187         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2188         <file category="include" name="CMSIS/Core_A/Include/"/>
2189       </files>
2190     </component>
2191
2192     <!-- CMSIS-Startup components -->
2193     <!-- Cortex-M0 -->
2194     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0 CMSIS" isDefaultVariant="true">
2195       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2196       <files>
2197         <!-- include folder / device header file -->
2198         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2199         <!-- startup / system file -->
2200         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
2201         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2202         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2203         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2204         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2205       </files>
2206     </component>
2207     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM0 CMSIS">
2208       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0 device</description>
2209       <files>
2210         <!-- include folder / device header file -->
2211         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2212         <!-- startup / system file -->
2213         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
2214         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.2.0" attr="config" condition="GCC"/>
2215         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2216         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2217         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2218       </files>
2219     </component>
2220
2221     <!-- Cortex-M0+ -->
2222     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM0+ CMSIS" isDefaultVariant="true">
2223       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2224       <files>
2225         <!-- include folder / device header file -->
2226         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2227         <!-- startup / system file -->
2228         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
2229         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2230         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2231         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2232         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2233       </files>
2234     </component>
2235     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM0+ CMSIS">
2236       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M0+ device</description>
2237       <files>
2238         <!-- include folder / device header file -->
2239         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2240         <!-- startup / system file -->
2241         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
2242         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.2.0" attr="config" condition="GCC"/>
2243         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
2244         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2245         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2246       </files>
2247     </component>
2248
2249     <!-- Cortex-M1 -->
2250     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM1 CMSIS" isDefaultVariant="true">
2251       <description>System and Startup for Generic Arm Cortex-M1 device</description>
2252       <files>
2253         <!-- include folder / device header file -->
2254         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2255         <!-- startup / system file -->
2256         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
2257         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2258         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2259         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2260         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2261       </files>
2262     </component>
2263     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM1 CMSIS">
2264       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M1 device</description>
2265       <files>
2266         <!-- include folder / device header file -->
2267         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
2268         <!-- startup / system file -->
2269         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
2270         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.2.0" attr="config" condition="GCC"/>
2271         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2272         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
2273         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
2274       </files>
2275     </component>
2276
2277     <!-- Cortex-M3 -->
2278     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM3 CMSIS" isDefaultVariant="true">
2279       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2280       <files>
2281         <!-- include folder / device header file -->
2282         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2283         <!-- startup / system file -->
2284         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
2285         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2286         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2287         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2288         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2289       </files>
2290     </component>
2291     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM3 CMSIS">
2292       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M3 device</description>
2293       <files>
2294         <!-- include folder / device header file -->
2295         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2296         <!-- startup / system file -->
2297         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
2298         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.2.0" attr="config" condition="GCC"/>
2299         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2300         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2301         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
2302       </files>
2303     </component>
2304
2305     <!-- Cortex-M4 -->
2306     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM4 CMSIS" isDefaultVariant="true">
2307       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2308       <files>
2309         <!-- include folder / device header file -->
2310         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2311         <!-- startup / system file -->
2312         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
2313         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2314         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2315         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2316        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2317       </files>
2318     </component>
2319     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM4 CMSIS">
2320       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M4 device</description>
2321       <files>
2322         <!-- include folder / device header file -->
2323         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2324         <!-- startup / system file -->
2325         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
2326         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.2.0" attr="config" condition="GCC"/>
2327         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2328         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2329         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
2330       </files>
2331     </component>
2332
2333     <!-- Cortex-M7 -->
2334     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMCM7 CMSIS" isDefaultVariant="true">
2335       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2336       <files>
2337         <!-- include folder / device header file -->
2338         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2339         <!-- startup / system file -->
2340         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
2341         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2342         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2343         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2344         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2345       </files>
2346     </component>
2347     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.2" condition="ARMCM7 CMSIS">
2348       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M7 device</description>
2349       <files>
2350         <!-- include folder / device header file -->
2351         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2352         <!-- startup / system file -->
2353         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
2354         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.2.0" attr="config" condition="GCC"/>
2355         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
2356         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2357         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
2358       </files>
2359     </component>
2360
2361     <!-- Cortex-M23 -->
2362     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM23 CMSIS" isDefaultVariant="true">
2363       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2364       <files>
2365         <!-- include folder / device header file -->
2366         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2367         <!-- startup / system file -->
2368         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"             version="2.1.0" attr="config"/>
2369         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2370         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2371         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2372         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2373         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
2374         <!-- SAU configuration -->
2375         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2376       </files>
2377     </component>
2378     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM23 CMSIS">
2379       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M23 device</description>
2380       <files>
2381         <!-- include folder / device header file -->
2382         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2383         <!-- startup / system file -->
2384         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2385         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2386         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2387         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2388         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S"         version="2.2.0" attr="config" condition="GCC"/>
2389         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2390         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.1.0" attr="config" condition="IAR"/>
2391         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
2392         <!-- SAU configuration -->
2393         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2394       </files>
2395     </component>
2396
2397     <!-- Cortex-M33 -->
2398     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM33 CMSIS" isDefaultVariant="true">
2399       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2400       <files>
2401         <!-- include folder / device header file -->
2402         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2403         <!-- startup / system file -->
2404         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.1.0" attr="config"/>
2405         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2406         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2407         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2408         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2409         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2410         <!-- SAU configuration -->
2411         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2412       </files>
2413     </component>
2414     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMCM33 CMSIS">
2415       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M33 device</description>
2416       <files>
2417         <!-- include folder / device header file -->
2418         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2419         <!-- startup / system file -->
2420         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2421         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2422         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2423         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2424         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.3.0" attr="config" condition="GCC"/>
2425         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2426         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.1.0" attr="config" condition="IAR"/>
2427         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
2428         <!-- SAU configuration -->
2429         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2430       </files>
2431     </component>
2432
2433     <!-- Cortex-M35P -->
2434     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMCM35P CMSIS" isDefaultVariant="true">
2435       <description>System and Startup for Generic Arm Cortex-M35P device</description>
2436       <files>
2437         <!-- include folder / device header file -->
2438         <file category="include"  name="Device/ARM/ARMCM35P/Include/"/>
2439         <!-- startup / system file -->
2440         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.1.0" attr="config"/>
2441         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2442         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2443         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2444         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2445         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2446         <!-- SAU configuration -->
2447         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2448       </files>
2449     </component>
2450     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMCM35P CMSIS">
2451       <description>DEPRECATED: System and Startup for Generic Arm Cortex-M35P device</description>
2452       <files>
2453         <!-- include folder / device header file -->
2454         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
2455         <!-- startup / system file -->
2456         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2457         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2458         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2459         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2460         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.3.0" attr="config" condition="GCC"/>
2461         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2462         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.1.0" attr="config" condition="IAR"/>
2463         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
2464         <!-- SAU configuration -->
2465         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2466       </files>
2467     </component>
2468
2469     <!-- Cortex-M55 -->
2470     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM55 CMSIS" isDefaultVariant="true">
2471       <description>System and Startup for Generic Cortex-M55 device</description>
2472       <files>
2473         <!-- include folder / device header file -->
2474         <file category="include"      name="Device/ARM/ARMCM55/Include/"/>
2475         <!-- startup / system file -->
2476         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.1.0" attr="config"/>
2477         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2478         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2479         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2480         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.2.0" attr="config" condition="GCC"/>
2481         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.1" attr="config"/>
2482         <!-- SAU configuration -->
2483         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2484       </files>
2485     </component>
2486
2487     <!-- Cortex-SC000 -->
2488     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC000 CMSIS" isDefaultVariant="true">
2489       <description>System and Startup for Generic Arm SC000 device</description>
2490       <files>
2491         <!-- include folder / device header file -->
2492         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2493         <!-- startup / system file -->
2494         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
2495         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2496         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2497         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2498         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2499       </files>
2500     </component>
2501     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC000 CMSIS">
2502       <description>DEPRECATED: System and Startup for Generic Arm SC000 device</description>
2503       <files>
2504         <!-- include folder / device header file -->
2505         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2506         <!-- startup / system file -->
2507         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
2508         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.2.0" attr="config" condition="GCC"/>
2509         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2510         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2511         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2512       </files>
2513     </component>
2514
2515     <!-- Cortex-SC300 -->
2516     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.0.3" condition="ARMSC300 CMSIS" isDefaultVariant="true">
2517       <description>System and Startup for Generic Arm SC300 device</description>
2518       <files>
2519         <!-- include folder / device header file -->
2520         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2521         <!-- startup / system file -->
2522         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
2523         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
2524         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
2525         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2526         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2527       </files>
2528     </component>
2529     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.3" condition="ARMSC300 CMSIS">
2530       <description>DEPRECATED: System and Startup for Generic Arm SC300 device</description>
2531       <files>
2532         <!-- include folder / device header file -->
2533         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2534         <!-- startup / system file -->
2535         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
2536         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.2.0" attr="config" condition="GCC"/>
2537         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
2538         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2539         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
2540       </files>
2541     </component>
2542
2543     <!-- ARMv8MBL -->
2544     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MBL CMSIS" isDefaultVariant="true">
2545       <description>System and Startup for Generic Armv8-M Baseline device</description>
2546       <files>
2547         <!-- include folder / device header file -->
2548         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2549         <!-- startup / system file -->
2550         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"             version="2.1.0" attr="config"/>
2551         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2552         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2553         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2554         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2555         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
2556         <!-- SAU configuration -->
2557         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
2558       </files>
2559     </component>
2560     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.2.0" condition="ARMv8MBL CMSIS">
2561       <description>DEPRECATED: System and Startup for Generic Armv8-M Baseline device</description>
2562       <files>
2563         <!-- include folder / device header file -->
2564         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2565         <!-- startup / system file -->
2566         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2567         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2568         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2569         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2570         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S"         version="2.2.0" attr="config" condition="GCC"/>
2571         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2572         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
2573         <!-- SAU configuration -->
2574         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2575       </files>
2576     </component>
2577
2578     <!-- ARMv8MML -->
2579     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.1.0" condition="ARMv8MML CMSIS" isDefaultVariant="true">
2580       <description>System and Startup for Generic Armv8-M Mainline device</description>
2581       <files>
2582         <!-- include folder / device header file -->
2583         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2584         <!-- startup / system file -->
2585         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.1.0" attr="config"/>
2586         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2587         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2588         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2589         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2590         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
2591         <!-- SAU configuration -->
2592         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2593       </files>
2594     </component>
2595     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.3.0" condition="ARMv8MML CMSIS">
2596       <description>DEPRECATED: System and Startup for Generic Armv8-M Mainline device</description>
2597       <files>
2598         <!-- include folder / device header file -->
2599         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2600         <!-- startup / system file -->
2601         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S"         version="1.1.0" attr="config" condition="ARMCC6"/>
2602         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2603         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2604         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2605         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.3.0" attr="config" condition="GCC"/>
2606         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.2.0" attr="config" condition="GCC"/>
2607         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
2608         <!-- SAU configuration -->
2609         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
2610       </files>
2611     </component>
2612
2613     <!-- ARMv81MML -->
2614     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="2.2.0" condition="ARMv81MML CMSIS" isDefaultVariant="true">
2615       <description>System and Startup for Generic Armv8.1-M Mainline device</description>
2616       <files>
2617         <!-- include folder / device header file -->
2618         <file category="include"      name="Device/ARM/ARMv81MML/Include/"/>
2619         <!-- startup / system file -->
2620         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.1.0" attr="config"/>
2621         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct"         version="1.1.0" attr="config" condition="TZ Secure ARMCC6"/>
2622         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Non-secure ARMCC6"/>
2623         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.1.0" attr="config" condition="TZ Unavailable ARMCC6"/>
2624         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.2.0" attr="config" condition="GCC"/>
2625         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
2626         <!-- SAU configuration -->
2627         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>
2628       </files>
2629     </component>
2630
2631     <!-- Cortex-A5 -->
2632     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA5 CMSIS">
2633       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2634       <files>
2635         <!-- include folder / device header file -->
2636         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2637         <!-- startup / system / mmu files -->
2638         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2639         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2640         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2641         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2642         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.1" attr="config" condition="GCC"/>
2643         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2644         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2645         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2646         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.1" attr="config"/>
2647         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.2.0" attr="config"/>
2648         <file category="header"       name="Device/ARM/ARMCA5/Config/system_ARMCA5.h"      version="1.0.0" attr="config"/>
2649         <file category="header"       name="Device/ARM/ARMCA5/Config/mem_ARMCA5.h"         version="1.1.0" attr="config"/>
2650
2651       </files>
2652     </component>
2653
2654     <!-- Cortex-A7 -->
2655     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA7 CMSIS">
2656       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2657       <files>
2658         <!-- include folder / device header file -->
2659         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2660         <!-- startup / system / mmu files -->
2661         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2662         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2663         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2664         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2665         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.1" attr="config" condition="GCC"/>
2666         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2667         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2668         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2669         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.1" attr="config"/>
2670         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.2.0" attr="config"/>
2671         <file category="header"       name="Device/ARM/ARMCA7/Config/system_ARMCA7.h"      version="1.0.0" attr="config"/>
2672         <file category="header"       name="Device/ARM/ARMCA7/Config/mem_ARMCA7.h"         version="1.1.0" attr="config"/>
2673       </files>
2674     </component>
2675
2676     <!-- Cortex-A9 -->
2677     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.2" condition="ARMCA9 CMSIS">
2678       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2679       <files>
2680         <!-- include folder / device header file -->
2681         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2682         <!-- startup / system / mmu files -->
2683         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2684         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2685         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.1" attr="config" condition="ARMCC6"/>
2686         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2687         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.1" attr="config" condition="GCC"/>
2688         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2689         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2690         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2691         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.1" attr="config"/>
2692         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.2.0" attr="config"/>
2693         <file category="header"       name="Device/ARM/ARMCA9/Config/system_ARMCA9.h"      version="1.0.0" attr="config"/>
2694         <file category="header"       name="Device/ARM/ARMCA9/Config/mem_ARMCA9.h"         version="1.1.0" attr="config"/>
2695       </files>
2696     </component>
2697
2698     <!-- IRQ Controller -->
2699     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.1" condition="ARMv7-A Device">
2700       <description>IRQ Controller implementation using GIC</description>
2701       <files>
2702         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2703       </files>
2704     </component>
2705
2706     <!-- OS Tick -->
2707     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.2" condition="OS Tick PTIM">
2708       <description>OS Tick implementation using Private Timer</description>
2709       <files>
2710         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2711       </files>
2712     </component>
2713
2714     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2715       <description>OS Tick implementation using Generic Physical Timer</description>
2716       <files>
2717         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2718       </files>
2719     </component>
2720
2721     <!-- CMSIS-DSP component -->
2722     <component Cclass="CMSIS" Cgroup="DSP" Cvariant="Source"  Cversion="1.9.0-dev" isDefaultVariant="true" condition="CMSIS DSP">
2723       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2724       <files>
2725         <!-- CPU independent -->
2726         <file category="doc"      name="CMSIS/Documentation/DSP/html/index.html"/>
2727         <file category="header"   name="CMSIS/DSP/Include/arm_math.h"/>
2728         <file category="header"   name="CMSIS/DSP/Include/arm_math_f16.h"/>
2729         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables.h"/>
2730         <file category="header"   name="CMSIS/DSP/Include/arm_common_tables_f16.h"/>
2731         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs.h"/>
2732         <file category="header"   name="CMSIS/DSP/Include/arm_const_structs_f16.h"/>
2733
2734         <file category="include"  name="CMSIS/DSP/PrivateInclude/"/>
2735         <file category="include"  name="CMSIS/DSP/Include/"/>
2736
2737         <!-- DSP sources (core) -->
2738         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c"/>
2739
2740         <file category="source"   name="CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c"/>
2741
2742         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c"/>
2743         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTables.c"/>
2744         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c"/>
2745         <file category="source"   name="CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c"/>
2746         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c"/>
2747         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c"/>
2748         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c"/>
2749         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c"/>
2750         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c"/>
2751         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c"/>
2752         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c"/>
2753         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c"/>
2754
2755         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c"/>
2756
2757         <!-- DSP sources F16 versions -->
2758         <file category="source"   name="CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c"/>
2759         <file category="source"   name="CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c"/>
2760         <file category="source"   name="CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c"/>
2761         <file category="source"   name="CMSIS/DSP/Source/CommonTables/CommonTablesF16.c"/>
2762         <file category="source"   name="CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c"/>
2763         <file category="source"   name="CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c"/>
2764         <file category="source"   name="CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c"/>
2765         <file category="source"   name="CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c"/>
2766         <file category="source"   name="CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c"/>
2767         <file category="source"   name="CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c"/>
2768         <file category="source"   name="CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c"/>
2769         <file category="source"   name="CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c"/>
2770         <file category="source"   name="CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c"/>
2771
2772         <!-- Compute Library for Cortex-A -->
2773         <file category="header"   name="CMSIS/DSP/ComputeLibrary/Include/NEMath.h"        condition="ARMv7-A Device"/>
2774         <file category="source"   name="CMSIS/DSP/ComputeLibrary/Source/arm_cl_tables.c"  condition="ARMv7-A Device"/>
2775       </files>
2776     </component>
2777
2778     <!-- CMSIS-NN component -->
2779     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="3.0.0" condition="CMSIS NN">
2780       <description>CMSIS-NN Neural Network Library</description>
2781       <files>
2782         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2783         <file category="header" name="CMSIS/NN/Include/arm_nn_types.h"/>
2784         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2785         <file category="header" name="CMSIS/NN/Include/arm_nnsupportfunctions.h"/>
2786         <file category="header" name="CMSIS/NN/Include/arm_nn_tables.h"/>
2787
2788         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2789         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2790         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2791         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c"/>
2792         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c"/>
2793         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_u8_basic_ver1.c"/>
2794         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16_reordered.c"/>
2795         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2796         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c"/>
2797         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2798         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2799         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c"/>
2800         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c"/>
2801         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c"/>
2802         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_s8.c"/>
2803         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c"/>
2804         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c"/>
2805         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2806         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2807         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c"/>
2808         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c"/>
2809         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2810         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2811         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c"/>
2812         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c"/>
2813         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2814         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_x.c"/>
2815         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_w.c"/>
2816         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_y.c"/>
2817         <file category="source" name="CMSIS/NN/Source/ConcatenationFunctions/arm_concatenation_s8_z.c"/>
2818         <file category="source" name="CMSIS/NN/Source/SVDFunctions/arm_svdf_s8.c"/>
2819         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_max_pool_s8.c"/>
2820         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_avgpool_s8.c"/>
2821         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2822         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_mul_s8.c"/>
2823         <file category="source" name="CMSIS/NN/Source/BasicMathFunctions/arm_elementwise_add_s8.c"/>
2824         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c"/>
2825         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2826         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2827         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2828         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2829         <file category="source" name="CMSIS/NN/Source/ReshapeFunctions/arm_reshape_s8.c"/>
2830         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c"/>
2831         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2832         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c"/>
2833         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c"/>
2834         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c"/>
2835         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_accumulate_q7_to_q15.c"/>
2836         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c"/>
2837         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c"/>
2838         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_add_q7.c"/>
2839         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c"/>
2840         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2841         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c"/>
2842         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2843         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_with_offset.c"/>
2844         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c"/>
2845         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c"/>
2846         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_s8.c"/>
2847         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2848         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2849         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2850         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2851         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2852         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2853         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2854         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_s8.c"/>
2855         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_u8.c"/>
2856         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2857         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_with_batch_q7.c"/>
2858       </files>
2859     </component>
2860
2861     <!-- CMSIS-RTOS Keil RTX component -->
2862     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.82.0" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2863       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2864       <RTE_Components_h>
2865         <!-- the following content goes into file 'RTE_Components.h' -->
2866         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2867         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2868       </RTE_Components_h>
2869       <files>
2870         <!-- CPU independent -->
2871         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2872         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2873         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2874
2875         <!-- RTX templates -->
2876         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2877         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2878         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2879         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2880         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2881         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2882         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2883         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2884         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2885         <!-- tool-chain specific template file -->
2886         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2887         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2888         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2889
2890         <!-- CPU and Compiler dependent -->
2891         <!-- ARMCC -->
2892         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2893         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2894         <file category="library" condition="CM1_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2895         <file category="library" condition="CM1_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2896         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2897         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2898         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2899         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2900         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2901         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2902         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2903         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2904         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2905         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2906         <!-- GCC -->
2907         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2908         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2909         <file category="library" condition="CM1_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2910         <file category="library" condition="CM1_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2911         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2912         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2913         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2914         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2915         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2916         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2917         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2918         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2919         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2920         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2921         <!-- IAR -->
2922         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2923         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2924         <file category="library" condition="CM1_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2925         <file category="library" condition="CM1_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2926         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2927         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2928         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2929         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2930         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2931         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2932         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2933         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2934         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2935         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2936       </files>
2937     </component>
2938     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2939     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.82.0" Capiversion="1.0.0" condition="RTOS RTX IFX">
2940       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2941       <RTE_Components_h>
2942         <!-- the following content goes into file 'RTE_Components.h' -->
2943         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2944         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2945       </RTE_Components_h>
2946       <files>
2947         <!-- CPU independent -->
2948         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2949         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2950         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2951
2952         <!-- RTX templates -->
2953         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2954         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2955         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2956         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2957         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2958         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2959         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2960         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2961         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2962         <!-- tool-chain specific template file -->
2963         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2964         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2965         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2966
2967         <!-- CPU and Compiler dependent -->
2968         <!-- ARMCC -->
2969         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2970         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2971         <!-- GCC -->
2972         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2973         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2974         <!-- IAR -->
2975       </files>
2976     </component>
2977
2978     <!-- CMSIS-RTOS Keil RTX5 component -->
2979     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.5.3" Capiversion="1.0.0" condition="RTOS RTX5">
2980       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2981       <RTE_Components_h>
2982         <!-- the following content goes into file 'RTE_Components.h' -->
2983         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2984         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2985       </RTE_Components_h>
2986       <files>
2987         <!-- RTX header file -->
2988         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2989         <!-- RTX compatibility module for API V1 -->
2990         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2991       </files>
2992     </component>
2993
2994     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2995     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
2996       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Library)</description>
2997       <RTE_Components_h>
2998         <!-- the following content goes into file 'RTE_Components.h' -->
2999         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3000         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3001       </RTE_Components_h>
3002       <files>
3003         <!-- RTX documentation -->
3004         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3005
3006         <!-- RTX header files -->
3007         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3008
3009         <!-- RTX configuration -->
3010         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3011         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3012
3013         <!-- RTX templates -->
3014         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3015         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3016         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3017         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3018         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3019         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3020         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3021         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3022         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3023         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3024
3025         <!-- RTX library configuration -->
3026         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3027
3028         <!-- RTX libraries (CPU and Compiler dependent) -->
3029         <!-- ARMCC -->
3030         <file category="library" condition="CM0_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3031         <file category="library" condition="CM1_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3032         <file category="library" condition="CM3_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3033         <file category="library" condition="CM4_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3034         <file category="library" condition="CM4_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3035         <file category="library" condition="CM7_LE_ARMCC"              name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
3036         <file category="library" condition="CM7_FP_LE_ARMCC"           name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3037         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3038         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3039         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3040         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3041         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3042         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3043         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3044         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3045         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3046         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3047         <!-- GCC -->
3048         <file category="library" condition="CM0_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3049         <file category="library" condition="CM1_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
3050         <file category="library" condition="CM3_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3051         <file category="library" condition="CM4_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3052         <file category="library" condition="CM4_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3053         <file category="library" condition="CM7_LE_GCC"                name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
3054         <file category="library" condition="CM7_FP_LE_GCC"             name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
3055         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3056         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3057         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3058         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3059         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3060         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3061         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3062         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
3063         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
3064         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
3065         <!-- IAR -->
3066         <file category="library" condition="CM0_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3067         <file category="library" condition="CM1_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
3068         <file category="library" condition="CM3_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3069         <file category="library" condition="CM4_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3070         <file category="library" condition="CM4_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3071         <file category="library" condition="CM7_LE_IAR"                name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
3072         <file category="library" condition="CM7_FP_LE_IAR"             name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
3073         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3074         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3075         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3076         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3077         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3078         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3079         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3080         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MB.a"     src="CMSIS/RTOS2/RTX/Source"/>
3081         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MM.a"     src="CMSIS/RTOS2/RTX/Source"/>
3082         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMF.a"    src="CMSIS/RTOS2/RTX/Source"/>
3083       </files>
3084     </component>
3085     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3086       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Library)</description>
3087       <RTE_Components_h>
3088         <!-- the following content goes into file 'RTE_Components.h' -->
3089         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3090         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3091         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3092       </RTE_Components_h>
3093       <files>
3094         <!-- RTX documentation -->
3095         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3096
3097         <!-- RTX header files -->
3098         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3099
3100         <!-- RTX configuration -->
3101         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3102         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3103
3104         <!-- RTX templates -->
3105         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3106         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3107         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3108         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3109         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3110         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3111         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3112         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3113         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3114         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3115
3116         <!-- RTX library configuration -->
3117         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3118
3119         <!-- RTX libraries (CPU and Compiler dependent) -->
3120         <!-- ARMCC -->
3121         <file category="library" condition="CM23_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3122         <file category="library" condition="CM33_LE_ARMCC"             name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3123         <file category="library" condition="CM33_FP_LE_ARMCC"          name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3124         <file category="library" condition="CM35P_LE_ARMCC"            name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3125         <file category="library" condition="CM35P_FP_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3126         <file category="library" condition="CM55_NOFPU_NOMVE_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3127         <file category="library" condition="CM55_FPU_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3128         <file category="library" condition="ARMv8MBL_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3129         <file category="library" condition="ARMv8MML_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
3130         <file category="library" condition="ARMv8MML_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
3131         <!-- GCC -->
3132         <file category="library" condition="CM23_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3133         <file category="library" condition="CM33_LE_GCC"               name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3134         <file category="library" condition="CM33_FP_LE_GCC"            name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3135         <file category="library" condition="CM35P_LE_GCC"              name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3136         <file category="library" condition="CM35P_FP_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3137         <file category="library" condition="CM55_NOFPU_NOMVE_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3138         <file category="library" condition="CM55_FPU_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3139         <file category="library" condition="ARMv8MBL_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3140         <file category="library" condition="ARMv8MML_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
3141         <file category="library" condition="ARMv8MML_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
3142         <!-- IAR -->
3143         <file category="library" condition="CM23_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3144         <file category="library" condition="CM33_LE_IAR"               name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3145         <file category="library" condition="CM33_FP_LE_IAR"            name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3146         <file category="library" condition="CM35P_LE_IAR"              name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3147         <file category="library" condition="CM35P_FP_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3148         <file category="library" condition="CM55_NOFPU_NOMVE_LE_IAR"   name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3149         <file category="library" condition="CM55_FPU_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3150         <file category="library" condition="ARMv8MBL_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MBN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3151         <file category="library" condition="ARMv8MML_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMN.a"     src="CMSIS/RTOS2/RTX/Source"/>
3152         <file category="library" condition="ARMv8MML_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a"    src="CMSIS/RTOS2/RTX/Source"/>
3153       </files>
3154     </component>
3155     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5">
3156       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, SC300, ARMv8-M, ARMv8.1-M (Source)</description>
3157       <RTE_Components_h>
3158         <!-- the following content goes into file 'RTE_Components.h' -->
3159         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3160         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3161         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3162       </RTE_Components_h>
3163       <files>
3164         <!-- RTX documentation -->
3165         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3166
3167         <!-- RTX header files -->
3168         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3169
3170         <!-- RTX configuration -->
3171         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3172         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3173
3174         <!-- RTX templates -->
3175         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3176         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3177         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3178         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3179         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3180         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3181         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3182         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3183         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3184         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3185
3186         <!-- RTX sources (core) -->
3187         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3188         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3189         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3190         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3191         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3192         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3193         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3194         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3195         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3196         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3197         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3198         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3199         <!-- RTX sources (library configuration) -->
3200         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3201         <!-- RTX sources (handlers ARMCC) -->
3202         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM0_ARMCC5"/>
3203         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_ARMCC6"/>
3204         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv6m.s"   condition="CM1_ARMCC5"/>
3205         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_ARMCC6"/>
3206         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM3_ARMCC5"/>
3207         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_ARMCC6"/>
3208         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_ARMCC5"/>
3209         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_ARMCC6"/>
3210         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM4_FP_ARMCC5"/>
3211         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_ARMCC6"/>
3212         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_ARMCC5"/>
3213         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_ARMCC6"/>
3214         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7m.s"   condition="CM7_FP_ARMCC5"/>
3215         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_ARMCC6"/>
3216         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3217         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3218         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3219         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3220         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3221         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3222         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3223         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3224         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3225         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3226         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3227         <!-- RTX sources (handlers GCC) -->
3228         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM0_GCC"/>
3229         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv6m.S"   condition="CM1_GCC"/>
3230         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM3_GCC"/>
3231         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_GCC"/>
3232         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM4_FP_GCC"/>
3233         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_GCC"/>
3234         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7m.S"   condition="CM7_FP_GCC"/>
3235         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3236         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3237         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3238         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3239         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3240         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3241         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3242         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3243         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3244         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3245         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3246         <!-- RTX sources (handlers IAR) -->
3247         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM0_IAR"/>
3248         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv6m.s"   condition="CM1_IAR"/>
3249         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM3_IAR"/>
3250         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_IAR"/>
3251         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM4_FP_IAR"/>
3252         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_IAR"/>
3253         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7m.s"   condition="CM7_FP_IAR"/>
3254         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3255         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3256         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3257         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3258         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3259         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3260         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3261         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3262         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3263         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3264         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3265         <!-- OS Tick (SysTick) -->
3266         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3267       </files>
3268     </component>
3269     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 v7-A">
3270       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
3271       <RTE_Components_h>
3272         <!-- the following content goes into file 'RTE_Components.h' -->
3273         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3274         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3275         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3276       </RTE_Components_h>
3277       <files>
3278         <!-- RTX documentation -->
3279         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3280
3281         <!-- RTX header files -->
3282         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3283
3284         <!-- RTX configuration -->
3285         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3286         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3287
3288         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
3289
3290         <!-- RTX templates -->
3291         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3292         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3293         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3294         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3295         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3296         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3297         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3298         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3299         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3300         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3301
3302         <!-- RTX sources (core) -->
3303         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3304         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3305         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3306         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3307         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3308         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3309         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3310         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3311         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3312         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3313         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3314         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3315         <!-- RTX sources (library configuration) -->
3316         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3317         <!-- RTX sources (handlers ARMCC) -->
3318         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv7a.s" condition="CA_ARMCC5"/>
3319         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_ARMCC6"/>
3320         <!-- RTX sources (handlers GCC) -->
3321         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv7a.S" condition="CA_GCC"/>
3322         <!-- RTX sources (handlers IAR) -->
3323         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv7a.s" condition="CA_IAR"/>
3324       </files>
3325     </component>
3326     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.5.3" Capiversion="2.1.3" condition="RTOS2 RTX5 NS">
3327       <description>CMSIS-RTOS2 RTX5 for Armv8-M/Armv8.1-M Non-Secure Domain (Source)</description>
3328       <RTE_Components_h>
3329         <!-- the following content goes into file 'RTE_Components.h' -->
3330         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
3331         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
3332         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
3333         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
3334       </RTE_Components_h>
3335       <files>
3336         <!-- RTX documentation -->
3337         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
3338
3339         <!-- RTX header files -->
3340         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3341
3342         <!-- RTX configuration -->
3343         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.5.2"/>
3344         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.1"/>
3345
3346         <!-- RTX templates -->
3347         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.1.0" select="CMSIS-RTOS2 'main' function"/>
3348         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3349         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3350         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3351         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3352         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3353         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3354         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3355         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3356         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3357
3358         <!-- RTX sources (core) -->
3359         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3360         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3361         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3362         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3363         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3364         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3365         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3366         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3367         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3368         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3369         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3370         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3371         <!-- RTX sources (library configuration) -->
3372         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3373         <!-- RTX sources (ARMCC handlers) -->
3374         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_ARMCC"/>
3375         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_ARMCC"/>
3376         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_ARMCC"/>
3377         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_ARMCC"/>
3378         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_ARMCC"/>
3379         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_ARMCC"/>
3380         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_ARMCC"/>
3381         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_ARMCC"/>
3382         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_ARMCC"/>
3383         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_ARMCC"/>
3384         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_ARMCC"/>
3385         <!-- RTX sources (GCC handlers) -->
3386         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="CM23_GCC"/>
3387         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_GCC"/>
3388         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM33_FP_GCC"/>
3389         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_GCC"/>
3390         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM35P_FP_GCC"/>
3391         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_NOMVE_GCC"/>
3392         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_NOFPU_MVE_GCC"/>
3393         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="CM55_FPU_GCC"/>
3394         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S" condition="ARMv8MBL_GCC"/>
3395         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_GCC"/>
3396         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S" condition="ARMv8MML_FP_GCC"/>
3397         <!-- RTX sources (IAR handlers) -->
3398         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="CM23_IAR"/>
3399         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_IAR"/>
3400         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM33_FP_IAR"/>
3401         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_IAR"/>
3402         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM35P_FP_IAR"/>
3403         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_NOMVE_IAR"/>
3404         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_NOFPU_MVE_IAR"/>
3405         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="CM55_FPU_IAR"/>
3406         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s" condition="ARMv8MBL_IAR"/>
3407         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_IAR"/>
3408         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s" condition="ARMv8MML_FP_IAR"/>
3409         <!-- OS Tick (SysTick) -->
3410         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3411       </files>
3412     </component>
3413
3414     <!-- CMSIS-Driver Custom components -->
3415     <component Cclass="CMSIS Driver" Cgroup="USART" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3416       <description>Access to #include Driver_USART.h file and code template for custom implementation</description>
3417       <files>
3418         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
3419         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USART.c" select="USART Driver"/>
3420       </files>
3421     </component>
3422     <component Cclass="CMSIS Driver" Cgroup="SPI" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3423       <description>Access to #include Driver_SPI.h file and code template for custom implementation</description>
3424       <files>
3425         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
3426         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SPI.c" select="SPI Driver"/>
3427       </files>
3428     </component>
3429     <component Cclass="CMSIS Driver" Cgroup="SAI" Csub="Custom" Cversion="1.0.0" Capiversion="1.2.0" custom="1">
3430       <description>Access to #include Driver_SAI.h file and code template for custom implementation</description>
3431       <files>
3432         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
3433         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_SAI.c" select="SAI Driver"/>
3434       </files>
3435     </component>
3436     <component Cclass="CMSIS Driver" Cgroup="I2C" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3437       <description>Access to #include Driver_I2C.h file and code template for custom implementation</description>
3438       <files>
3439         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
3440         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_I2C.c" select="I2C Driver"/>
3441       </files>
3442     </component>
3443     <component Cclass="CMSIS Driver" Cgroup="CAN" Csub="Custom" Cversion="1.0.0" Capiversion="1.3.0" custom="1">
3444       <description>Access to #include Driver_CAN.h file and code template for custom implementation</description>
3445       <files>
3446         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
3447         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_CAN.c" select="CAN Driver"/>
3448       </files>
3449     </component>
3450     <component Cclass="CMSIS Driver" Cgroup="Flash" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3451       <description>Access to #include Driver_Flash.h file and code template for custom implementation</description>
3452       <files>
3453         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
3454         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_Flash.c" select="Flash Driver"/>
3455       </files>
3456     </component>
3457     <component Cclass="CMSIS Driver" Cgroup="MCI" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3458       <description>Access to #include Driver_MCI.h file and code template for custom implementation</description>
3459       <files>
3460         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
3461         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_MCI.c" select="MCI Driver"/>
3462       </files>
3463     </component>
3464     <component Cclass="CMSIS Driver" Cgroup="NAND" Csub="Custom" Cversion="1.0.0" Capiversion="2.4.0" custom="1">
3465       <description>Access to #include Driver_NAND.h file and code template for custom implementation</description>
3466       <files>
3467         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
3468         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_NAND.c" select="NAND Flash Driver"/>
3469       </files>
3470     </component>
3471     <component Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3472       <description>Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation</description>
3473       <files>
3474         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3475         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3476         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY and MAC Driver"/>
3477         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet PHY and MAC Driver"/>
3478       </files>
3479     </component>
3480     <component Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3481       <description>Access to #include Driver_ETH_MAC.h file and code template for custom implementation</description>
3482       <files>
3483         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
3484         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c" select="Ethernet MAC Driver"/>
3485       </files>
3486     </component>
3487     <component Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cversion="1.0.0" Capiversion="2.2.0" custom="1">
3488       <description>Access to #include Driver_ETH_PHY.h file and code template for custom implementation</description>
3489       <files>
3490         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
3491         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c" select="Ethernet PHY Driver"/>
3492       </files>
3493     </component>
3494     <component Cclass="CMSIS Driver" Cgroup="USB Device" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3495       <description>Access to #include Driver_USBD.h file and code template for custom implementation</description>
3496       <files>
3497         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
3498         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBD.c" select="USB Device Driver"/>
3499       </files>
3500     </component>
3501     <component Cclass="CMSIS Driver" Cgroup="USB Host" Csub="Custom" Cversion="1.0.0" Capiversion="2.3.0" custom="1">
3502       <description>Access to #include Driver_USBH.h file and code template for custom implementation</description>
3503       <files>
3504         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
3505         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_USBH.c" select="USB Host Driver"/>
3506       </files>
3507     </component>
3508     <component Cclass="CMSIS Driver" Cgroup="WiFi" Csub="Custom" Cversion="1.0.0" Capiversion="1.1.0" custom="1">
3509       <description>Access to #include Driver_WiFi.h file</description>
3510       <files>
3511         <file category="header" name="CMSIS/Driver/Include/Driver_WiFi.h"/>
3512         <file category="sourceC" attr="template" name="CMSIS/Driver/DriverTemplates/Driver_WiFi.c" select="WiFi Driver"/>
3513       </files>
3514     </component>
3515
3516     <!-- VIO components -->
3517     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Custom" Cversion="1.0.0" Capiversion="0.1.0" custom="1">
3518       <description>Virtual I/O custom implementation template</description>
3519       <files>
3520         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio.c" attr="template" select="Virtual I/O"/>
3521       </files>
3522     </component>
3523     <component Cclass="CMSIS Driver" Cgroup="VIO" Csub="Virtual" Cversion="1.0.0" Capiversion="0.1.0">
3524       <description>Virtual I/O implementation using memory only</description>
3525       <files>
3526         <file category="sourceC" name="CMSIS/Driver/VIO/Source/vio_memory.c"/>
3527       </files>
3528     </component>
3529
3530   </components>
3531
3532   <boards>
3533     <board name="uVision Simulator" vendor="Keil">
3534       <description>uVision Simulator</description>
3535       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3536       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3537       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3538       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3539       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3540       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3541       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3542       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3543       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3544       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3545       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3546       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3547       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3548       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3549       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3550       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3551       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3552       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3553       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3554       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3555       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3556       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3557       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3558       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3559       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3560       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3561     </board>
3562
3563     <board name="EWARM Simulator" vendor="IAR">
3564       <description>EWARM Simulator</description>
3565       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3566       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3567       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3568       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM1"/>
3569       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3570       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3571       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3572       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3573       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3574       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3575       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3576       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3577       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3578       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3579       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv81MML_DSP_DP_MVE_FP"/>
3580       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3581       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3582       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3583       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3584       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3585       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3586       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P"/>
3587       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_TZ"/>
3588       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP"/>
3589       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM35P_DSP_FP_TZ"/>
3590       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM55"/>
3591     </board>
3592   </boards>
3593
3594   <examples>
3595     <example name="DSP_Lib Bayes example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_bayes_example">
3596       <description>DSP_Lib Bayes example</description>
3597       <board name="uVision Simulator" vendor="Keil"/>
3598       <project>
3599         <environment name="uv" load="arm_bayes_example.uvprojx"/>
3600       </project>
3601       <attributes>
3602         <component Cclass="CMSIS" Cgroup="CORE"/>
3603         <component Cclass="CMSIS" Cgroup="DSP"/>
3604         <component Cclass="Device" Cgroup="Startup"/>
3605         <category>Getting Started</category>
3606       </attributes>
3607     </example>
3608
3609     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_class_marks_example">
3610       <description>DSP_Lib Class Marks example</description>
3611       <board name="uVision Simulator" vendor="Keil"/>
3612       <project>
3613         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3614       </project>
3615       <attributes>
3616         <component Cclass="CMSIS" Cgroup="CORE"/>
3617         <component Cclass="CMSIS" Cgroup="DSP"/>
3618         <component Cclass="Device" Cgroup="Startup"/>
3619         <category>Getting Started</category>
3620       </attributes>
3621     </example>
3622
3623     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_convolution_example">
3624       <description>DSP_Lib Convolution example</description>
3625       <board name="uVision Simulator" vendor="Keil"/>
3626       <project>
3627         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3628       </project>
3629       <attributes>
3630         <component Cclass="CMSIS" Cgroup="CORE"/>
3631         <component Cclass="CMSIS" Cgroup="DSP"/>
3632         <component Cclass="Device" Cgroup="Startup"/>
3633         <category>Getting Started</category>
3634       </attributes>
3635     </example>
3636
3637     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_dotproduct_example">
3638       <description>DSP_Lib Dotproduct example</description>
3639       <board name="uVision Simulator" vendor="Keil"/>
3640       <project>
3641         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3642       </project>
3643       <attributes>
3644         <component Cclass="CMSIS" Cgroup="CORE"/>
3645         <component Cclass="CMSIS" Cgroup="DSP"/>
3646         <component Cclass="Device" Cgroup="Startup"/>
3647         <category>Getting Started</category>
3648       </attributes>
3649     </example>
3650
3651     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fft_bin_example">
3652       <description>DSP_Lib FFT Bin example</description>
3653       <board name="uVision Simulator" vendor="Keil"/>
3654       <project>
3655         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3656       </project>
3657       <attributes>
3658         <component Cclass="CMSIS" Cgroup="CORE"/>
3659         <component Cclass="CMSIS" Cgroup="DSP"/>
3660         <component Cclass="Device" Cgroup="Startup"/>
3661         <category>Getting Started</category>
3662       </attributes>
3663     </example>
3664
3665     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_fir_example">
3666       <description>DSP_Lib FIR example</description>
3667       <board name="uVision Simulator" vendor="Keil"/>
3668       <project>
3669         <environment name="uv" load="arm_fir_example.uvprojx"/>
3670       </project>
3671       <attributes>
3672         <component Cclass="CMSIS" Cgroup="CORE"/>
3673         <component Cclass="CMSIS" Cgroup="DSP"/>
3674         <component Cclass="Device" Cgroup="Startup"/>
3675         <category>Getting Started</category>
3676       </attributes>
3677     </example>
3678
3679     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_graphic_equalizer_example">
3680       <description>DSP_Lib Graphic Equalizer example</description>
3681       <board name="uVision Simulator" vendor="Keil"/>
3682       <project>
3683         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3684       </project>
3685       <attributes>
3686         <component Cclass="CMSIS" Cgroup="CORE"/>
3687         <component Cclass="CMSIS" Cgroup="DSP"/>
3688         <component Cclass="Device" Cgroup="Startup"/>
3689         <category>Getting Started</category>
3690       </attributes>
3691     </example>
3692
3693     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_linear_interp_example">
3694       <description>DSP_Lib Linear Interpolation example</description>
3695       <board name="uVision Simulator" vendor="Keil"/>
3696       <project>
3697         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3698       </project>
3699       <attributes>
3700         <component Cclass="CMSIS" Cgroup="CORE"/>
3701         <component Cclass="CMSIS" Cgroup="DSP"/>
3702         <component Cclass="Device" Cgroup="Startup"/>
3703         <category>Getting Started</category>
3704       </attributes>
3705     </example>
3706
3707     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_matrix_example">
3708       <description>DSP_Lib Matrix example</description>
3709       <board name="uVision Simulator" vendor="Keil"/>
3710       <project>
3711         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3712       </project>
3713       <attributes>
3714         <component Cclass="CMSIS" Cgroup="CORE"/>
3715         <component Cclass="CMSIS" Cgroup="DSP"/>
3716         <component Cclass="Device" Cgroup="Startup"/>
3717         <category>Getting Started</category>
3718       </attributes>
3719     </example>
3720
3721     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_signal_converge_example">
3722       <description>DSP_Lib Signal Convergence example</description>
3723       <board name="uVision Simulator" vendor="Keil"/>
3724       <project>
3725         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3726       </project>
3727       <attributes>
3728         <component Cclass="CMSIS" Cgroup="CORE"/>
3729         <component Cclass="CMSIS" Cgroup="DSP"/>
3730         <component Cclass="Device" Cgroup="Startup"/>
3731         <category>Getting Started</category>
3732       </attributes>
3733     </example>
3734
3735     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_sin_cos_example">
3736       <description>DSP_Lib Sinus/Cosinus example</description>
3737       <board name="uVision Simulator" vendor="Keil"/>
3738       <project>
3739         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3740       </project>
3741       <attributes>
3742         <component Cclass="CMSIS" Cgroup="CORE"/>
3743         <component Cclass="CMSIS" Cgroup="DSP"/>
3744         <component Cclass="Device" Cgroup="Startup"/>
3745         <category>Getting Started</category>
3746       </attributes>
3747     </example>
3748
3749     <example name="DSP_Lib SVM example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_svm_example">
3750       <description>DSP_Lib SVM example</description>
3751       <board name="uVision Simulator" vendor="Keil"/>
3752       <project>
3753         <environment name="uv" load="arm_svm_example.uvprojx"/>
3754       </project>
3755       <attributes>
3756         <component Cclass="CMSIS" Cgroup="CORE"/>
3757         <component Cclass="CMSIS" Cgroup="DSP"/>
3758         <component Cclass="Device" Cgroup="Startup"/>
3759         <category>Getting Started</category>
3760       </attributes>
3761     </example>
3762
3763     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP/Examples/ARM/arm_variance_example">
3764       <description>DSP_Lib Variance example</description>
3765       <board name="uVision Simulator" vendor="Keil"/>
3766       <project>
3767         <environment name="uv" load="arm_variance_example.uvprojx"/>
3768       </project>
3769       <attributes>
3770         <component Cclass="CMSIS" Cgroup="CORE"/>
3771         <component Cclass="CMSIS" Cgroup="DSP"/>
3772         <component Cclass="Device" Cgroup="Startup"/>
3773         <category>Getting Started</category>
3774       </attributes>
3775     </example>
3776
3777     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3778       <description>Neural Network CIFAR10 example</description>
3779       <board name="uVision Simulator" vendor="Keil"/>
3780       <project>
3781         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3782       </project>
3783       <attributes>
3784         <component Cclass="CMSIS" Cgroup="CORE"/>
3785         <component Cclass="CMSIS" Cgroup="DSP"/>
3786         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3787         <component Cclass="Device" Cgroup="Startup"/>
3788         <category>Getting Started</category>
3789       </attributes>
3790     </example>
3791
3792     <example name="NN-example-cifar10" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-cifar10">
3793       <description>Neural Network CIFAR10 example</description>
3794       <board name="EWARM Simulator" vendor="IAR"/>
3795       <project>
3796         <environment name="iar" load="NN-example-cifar10.ewp"/>
3797       </project>
3798       <attributes>
3799         <component Cclass="CMSIS" Cgroup="CORE"/>
3800         <component Cclass="CMSIS" Cgroup="DSP"/>
3801         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3802         <component Cclass="Device" Cgroup="Startup"/>
3803         <category>Getting Started</category>
3804       </attributes>
3805     </example>
3806
3807     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3808       <description>Neural Network GRU example</description>
3809       <board name="uVision Simulator" vendor="Keil"/>
3810       <project>
3811         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3812       </project>
3813       <attributes>
3814         <component Cclass="CMSIS" Cgroup="CORE"/>
3815         <component Cclass="CMSIS" Cgroup="DSP"/>
3816         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3817         <component Cclass="Device" Cgroup="Startup"/>
3818         <category>Getting Started</category>
3819       </attributes>
3820     </example>
3821
3822     <example name="NN-example-gru" doc="readme_iar.txt" folder="CMSIS/NN/Examples/IAR/iar_nn_examples/NN-example-gru">
3823       <description>Neural Network GRU example</description>
3824       <board name="EWARM Simulator" vendor="IAR"/>
3825       <project>
3826         <environment name="iar" load="NN-example-gru.ewp"/>
3827       </project>
3828       <attributes>
3829         <component Cclass="CMSIS" Cgroup="CORE"/>
3830         <component Cclass="CMSIS" Cgroup="DSP"/>
3831         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3832         <component Cclass="Device" Cgroup="Startup"/>
3833         <category>Getting Started</category>
3834       </attributes>
3835     </example>
3836
3837     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3838       <description>CMSIS-RTOS2 Blinky example</description>
3839       <board name="uVision Simulator" vendor="Keil"/>
3840       <project>
3841         <environment name="uv" load="Blinky.uvprojx"/>
3842       </project>
3843       <attributes>
3844         <component Cclass="CMSIS" Cgroup="CORE"/>
3845         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3846         <component Cclass="Device" Cgroup="Startup"/>
3847         <category>Getting Started</category>
3848       </attributes>
3849     </example>
3850
3851     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3852       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3853       <board name="uVision Simulator" vendor="Keil"/>
3854       <project>
3855         <environment name="uv" load="Blinky.uvprojx"/>
3856       </project>
3857       <attributes>
3858         <component Cclass="CMSIS" Cgroup="CORE"/>
3859         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3860         <component Cclass="Device" Cgroup="Startup"/>
3861         <category>Getting Started</category>
3862       </attributes>
3863     </example>
3864
3865     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3866       <description>CMSIS-RTOS2 Message Queue Example</description>
3867       <board name="uVision Simulator" vendor="Keil"/>
3868       <project>
3869         <environment name="uv" load="MsqQueue.uvprojx"/>
3870       </project>
3871       <attributes>
3872         <component Cclass="CMSIS" Cgroup="CORE"/>
3873         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3874         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3875         <component Cclass="Device" Cgroup="Startup"/>
3876         <category>Getting Started</category>
3877       </attributes>
3878     </example>
3879
3880     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3881       <description>CMSIS-RTOS2 Memory Pool Example</description>
3882       <board name="uVision Simulator" vendor="Keil"/>
3883       <project>
3884         <environment name="uv" load="MemPool.uvprojx"/>
3885       </project>
3886       <attributes>
3887         <component Cclass="CMSIS" Cgroup="CORE"/>
3888         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3889         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3890         <component Cclass="Device" Cgroup="Startup"/>
3891         <category>Getting Started</category>
3892       </attributes>
3893     </example>
3894
3895     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3896       <description>Bare-metal secure/non-secure example without RTOS</description>
3897       <board name="uVision Simulator" vendor="Keil"/>
3898       <project>
3899         <environment name="uv" load="NoRTOS.uvmpw"/>
3900       </project>
3901       <attributes>
3902         <component Cclass="CMSIS" Cgroup="CORE"/>
3903         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3904         <component Cclass="Device" Cgroup="Startup"/>
3905         <category>Getting Started</category>
3906       </attributes>
3907     </example>
3908
3909     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3910       <description>Secure/non-secure RTOS example with thread context management</description>
3911       <board name="uVision Simulator" vendor="Keil"/>
3912       <project>
3913         <environment name="uv" load="RTOS.uvmpw"/>
3914       </project>
3915       <attributes>
3916         <component Cclass="CMSIS" Cgroup="CORE"/>
3917         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3918         <component Cclass="Device" Cgroup="Startup"/>
3919         <category>Getting Started</category>
3920       </attributes>
3921     </example>
3922
3923     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3924       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3925       <board name="uVision Simulator" vendor="Keil"/>
3926       <project>
3927         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3928       </project>
3929       <attributes>
3930         <component Cclass="CMSIS" Cgroup="CORE"/>
3931         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3932         <component Cclass="Device" Cgroup="Startup"/>
3933         <category>Getting Started</category>
3934       </attributes>
3935     </example>
3936
3937     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/Blinky">
3938       <description>CMSIS-RTOS2 Blinky example</description>
3939       <board name="EWARM Simulator" vendor="IAR"/>
3940       <project>
3941         <environment name="iar" load="Blinky/Blinky.ewp"/>
3942       </project>
3943       <attributes>
3944         <component Cclass="CMSIS" Cgroup="CORE"/>
3945         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3946         <component Cclass="Device" Cgroup="Startup"/>
3947         <category>Getting Started</category>
3948       </attributes>
3949     </example>
3950
3951     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples_IAR/MsgQueue">
3952       <description>CMSIS-RTOS2 Message Queue Example</description>
3953       <board name="EWARM Simulator" vendor="IAR"/>
3954       <project>
3955         <environment name="iar" load="MsgQueue/MsgQueue.ewp"/>
3956       </project>
3957       <attributes>
3958         <component Cclass="CMSIS" Cgroup="CORE"/>
3959         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3960         <component Cclass="Device" Cgroup="Startup"/>
3961         <category>Getting Started</category>
3962       </attributes>
3963     </example>
3964
3965   </examples>
3966
3967 </package>