begriffs open source - cmsis/blob - ARM.CMSIS.pdsc

   1 <?xml version="1.0" encoding="UTF-8"?>
   2
   3 <package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
   4   <name>CMSIS</name>
   5   <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
   6   <vendor>ARM</vendor>
   7   <!-- <license>license.txt</license> -->
   8   <url>http://www.keil.com/pack/</url>
   9
  10   <releases>
  11     <release version="5.3.1-dev0">
  12       Patch release scheduled for after EW18.
  13     </release>
  14     <release version="5.3.0" date="2018-02-22">
  15       Updated Arm company brand.
  16       CMSIS-Core(M): 5.1.1 (see revision history for details)
  17       CMSIS-Core(A): 1.1.1 (see revision history for details)
  18       CMSIS-DAP: 2.0.0 (see revision history for details)
  19       CMSIS-NN: 1.0.0
  20         - Initial contribution of the bare metal Neural Network Library.
  21       CMSIS-RTOS2:
  22         - RTX 5.3.0 (see revision history for details)
  23         - OS Tick API 1.0.1
  24     </release>
  25     <release version="5.2.0" date="2017-11-16">
  26       CMSIS-Core(M): 5.1.0 (see revision history for details)
  27         - Added MPU Functions for ARMv8-M for Cortex-M23/M33.
  28         - Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.
  29       CMSIS-Core(A): 1.1.0 (see revision history for details)
  30         - Added compiler_iccarm.h.
  31         - Added additional access functions for physical timer.
  32       CMSIS-DAP: 1.2.0 (see revision history for details)
  33       CMSIS-DSP: 1.5.2 (see revision history for details)
  34       CMSIS-Driver: 2.6.0 (see revision history for details)
  35         - CAN Driver API V1.2.0
  36         - NAND Driver API V2.3.0
  37       CMSIS-RTOS:
  38         - RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.
  39       CMSIS-RTOS2:
  40         - API 2.1.2 (see revision history for details)
  41         - RTX 5.2.3 (see revision history for details)
  42       Devices:
  43         - Added GCC startup and linker script for Cortex-A9.
  44         - Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
  45         - Added IAR startup code for Cortex-A9
  46     </release>
  47     <release version="5.1.1" date="2017-09-19">
  48       CMSIS-RTOS2:
  49       - RTX 5.2.1 (see revision history for details)
  50     </release>
  51     <release version="5.1.0" date="2017-08-04">
  52       CMSIS-Core(M): 5.0.2 (see revision history for details)
  53       - Changed Version Control macros to be core agnostic.
  54       - Added MPU Functions for ARMv7-M for Cortex-M0+/M3/M4/M7.
  55       CMSIS-Core(A): 1.0.0 (see revision history for details)
  56       - Initial release
  57       - IRQ Controller API 1.0.0
  58       CMSIS-Driver: 2.05 (see revision history for details)
  59       - All typedefs related to status have been made volatile.
  60       CMSIS-RTOS2:
  61       - API 2.1.1 (see revision history for details)
  62       - RTX 5.2.0 (see revision history for details)
  63       - OS Tick API 1.0.0
  64       CMSIS-DSP: 1.5.2 (see revision history for details)
  65       - Fixed GNU Compiler specific diagnostics.
  66       CMSIS-PACK: 1.5.0 (see revision history for details)
  67       - added System Description File (*.SDF) Format
  68       CMSIS-Zone: 0.0.1 (Preview)
  69       - Initial specification draft
  70     </release>
  71     <release version="5.0.1" date="2017-02-03">
  72       Package Description:
  73       - added taxonomy for Cclass RTOS
  74       CMSIS-RTOS2:
  75       - API 2.1   (see revision history for details)
  76       - RTX 5.1.0 (see revision history for details)
  77       CMSIS-Core: 5.0.1 (see revision history for details)
  78       - Added __PACKED_STRUCT macro
  79       - Added uVisior support
  80       - Updated cmsis_armcc.h: corrected macro __ARM_ARCH_6M__
  81       - Updated template for secure main function (main_s.c)
  82       - Updated template for Context Management for ARMv8-M TrustZone (tz_context.c)
  83       CMSIS-DSP: 1.5.1 (see revision history for details)
  84       - added ARMv8M DSP libraries.
  85       CMSIS-PACK:1.4.9 (see revision history for details)
  86       - added Pack Index File specification and schema file
  87     </release>
  88     <release version="5.0.0" date="2016-11-11">
  89       Changed open source license to Apache 2.0
  90       CMSIS_Core:
  91        - Added support for Cortex-M23 and Cortex-M33.
  92        - Added ARMv8-M device configurations for mainline and baseline.
  93        - Added CMSE support and thread context management for TrustZone for ARMv8-M
  94        - Added cmsis_compiler.h to unify compiler behaviour.
  95        - Updated function SCB_EnableICache (for Cortex-M7).
  96        - Added functions: NVIC_GetEnableIRQ, SCB_GetFPUType
  97       CMSIS-RTOS:
  98         - bug fix in RTX 4.82 (see revision history for details)
  99       CMSIS-RTOS2:
 100         - new API including compatibility layer to CMSIS-RTOS
 101         - reference implementation based on RTX5
 102         - supports all Cortex-M variants including TrustZone for ARMv8-M
 103       CMSIS-SVD:
 104        - reworked SVD format documentation
 105        - removed SVD file database documentation as SVD files are distributed in packs
 106        - updated SVDConv for Win32 and Linux
 107       CMSIS-DSP:
 108        - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
 109        - Added DSP libraries build projects to CMSIS pack.
 110     </release>
 111     <release version="4.5.0" date="2015-10-28">
 112       - CMSIS-Core     4.30.0  (see revision history for details)
 113       - CMSIS-DAP      1.1.0   (unchanged)
 114       - CMSIS-Driver   2.04.0  (see revision history for details)
 115       - CMSIS-DSP      1.4.7   (no source code change [still labeled 1.4.5], see revision history for details)
 116       - CMSIS-PACK     1.4.1   (see revision history for details)
 117       - CMSIS-RTOS     4.80.0  Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
 118       - CMSIS-SVD      1.3.1   (see revision history for details)
 119     </release>
 120     <release version="4.4.0" date="2015-09-11">
 121       - CMSIS-Core     4.20   (see revision history for details)
 122       - CMSIS-DSP      1.4.6  (no source code change [still labeled 1.4.5], see revision history for details)
 123       - CMSIS-PACK     1.4.0  (adding memory attributes, algorithm style)
 124       - CMSIS-Driver   2.03.0 (adding CAN [Controller Area Network] API)
 125       - CMSIS-RTOS
 126         -- API         1.02   (unchanged)
 127         -- RTX         4.79   (see revision history for details)
 128       - CMSIS-SVD      1.3.0  (see revision history for details)
 129       - CMSIS-DAP      1.1.0  (extended with SWO support)
 130     </release>
 131     <release version="4.3.0" date="2015-03-20">
 132       - CMSIS-Core     4.10   (Cortex-M7 extended Cache Maintenance functions)
 133       - CMSIS-DSP      1.4.5  (see revision history for details)
 134       - CMSIS-Driver   2.02   (adding SAI (Serial Audio Interface) API)
 135       - CMSIS-PACK     1.3.3  (Semantic Versioning, Generator extensions)
 136       - CMSIS-RTOS
 137         -- API         1.02   (unchanged)
 138         -- RTX         4.78   (see revision history for details)
 139       - CMSIS-SVD      1.2    (unchanged)
 140     </release>
 141     <release version="4.2.0" date="2014-09-24">
 142       Adding Cortex-M7 support
 143       - CMSIS-Core     4.00  (Cortex-M7 support, corrected C++ include guards in core header files)
 144       - CMSIS-DSP      1.4.4 (Cortex-M7 support and corrected out of bound issues)
 145       - CMSIS-PACK     1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
 146       - CMSIS-SVD      1.2   (Cortex-M7 extensions)
 147       - CMSIS-RTOS RTX 4.75  (see revision history for details)
 148     </release>
 149     <release version="4.1.1" date="2014-06-30">
 150       - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
 151     </release>
 152     <release version="4.1.0" date="2014-06-12">
 153       - CMSIS-Driver   2.02  (incompatible update)
 154       - CMSIS-Pack     1.3   (see revision history for details)
 155       - CMSIS-DSP      1.4.2 (unchanged)
 156       - CMSIS-Core     3.30  (unchanged)
 157       - CMSIS-RTOS RTX 4.74  (unchanged)
 158       - CMSIS-RTOS API 1.02  (unchanged)
 159       - CMSIS-SVD      1.10  (unchanged)
 160       PACK:
 161       - removed G++ specific files from PACK
 162       - added Component Startup variant "C Startup"
 163       - added Pack Checking Utility
 164       - updated conditions to reflect tool-chain dependency
 165       - added Taxonomy for Graphics
 166       - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
 167     </release>
 168     <release version="4.0.0">
 169       - CMSIS-Driver   2.00  Preliminary (incompatible update)
 170       - CMSIS-Pack     1.1   Preliminary
 171       - CMSIS-DSP      1.4.2 (see revision history for details)
 172       - CMSIS-Core     3.30  (see revision history for details)
 173       - CMSIS-RTOS RTX 4.74  (see revision history for details)
 174       - CMSIS-RTOS API 1.02  (unchanged)
 175       - CMSIS-SVD      1.10  (unchanged)
 176     </release>
 177     <release version="3.20.4">
 178       - CMSIS-RTOS 4.74 (see revision history for details)
 179       - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
 180     </release>
 181     <release version="3.20.3">
 182       - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
 183       - CMSIS-RTOS 4.73 (see revision history for details)
 184     </release>
 185     <release version="3.20.2">
 186       - CMSIS-Pack documentation has been added
 187       - CMSIS-Drivers header and documentation have been added to PACK
 188       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 189     </release>
 190     <release version="3.20.1">
 191       - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
 192       - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
 193     </release>
 194     <release version="3.20.0">
 195       The software portions that are deployed in the application program are now under a BSD license which allows usage
 196       of CMSIS components in any commercial or open source projects.  The Pack Description file Arm.CMSIS.pdsc describes the use cases
 197       The individual components have been update as listed below:
 198       - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
 199       - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
 200       - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
 201       - CMSIS-SVD is unchanged.
 202     </release>
 203   </releases>
 204
 205   <taxonomy>
 206     <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
 207     <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
 208     <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
 209     <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
 210     <description Cclass="File System">File Drive Support and File System</description>
 211     <description Cclass="Graphics">Graphical User Interface</description>
 212     <description Cclass="Network">Network Stack using Internet Protocols</description>
 213     <description Cclass="USB">Universal Serial Bus Stack</description>
 214     <description Cclass="Compiler">Compiler Software Extensions</description>
 215     <description Cclass="RTOS">Real-time Operating System</description>
 216   </taxonomy>
 217
 218   <devices>
 219     <!-- ******************************  Cortex-M0  ****************************** -->
 220     <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
 221       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
 222       <description>
 223 The Cortex-M0 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 224 - simple, easy-to-use programmers model
 225 - highly efficient ultra-low power operation
 226 - excellent code density
 227 - deterministic, high-performance interrupt handling
 228 - upward compatibility with the rest of the Cortex-M processor family.
 229       </description>
 230       <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
 231       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 232       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 233       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 234
 235       <device Dname="ARMCM0">
 236         <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 237         <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
 238       </device>
 239     </family>
 240
 241     <!-- ******************************  Cortex-M0P  ****************************** -->
 242     <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
 243       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
 244       <description>
 245 The Cortex-M0+ processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 246 - simple, easy-to-use programmers model
 247 - highly efficient ultra-low power operation
 248 - excellent code density
 249 - deterministic, high-performance interrupt handling
 250 - upward compatibility with the rest of the Cortex-M processor family.
 251       </description>
 252       <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
 253       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 254       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 255       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 256
 257       <device Dname="ARMCM0P">
 258         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 259         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
 260       </device>
 261
 262       <device Dname="ARMCM0P_MPU">
 263         <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 264         <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h" define="ARMCM0P_MPU"/>
 265       </device>
 266     </family>
 267
 268     <!-- ******************************  Cortex-M3  ****************************** -->
 269     <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
 270       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
 271       <description>
 272 The Cortex-M3 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 273 - simple, easy-to-use programmers model
 274 - highly efficient ultra-low power operation
 275 - excellent code density
 276 - deterministic, high-performance interrupt handling
 277 - upward compatibility with the rest of the Cortex-M processor family.
 278       </description>
 279       <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
 280       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 281       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 282       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 283
 284       <device Dname="ARMCM3">
 285         <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 286         <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
 287       </device>
 288     </family>
 289
 290     <!-- ******************************  Cortex-M4  ****************************** -->
 291     <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
 292       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
 293       <description>
 294 The Cortex-M4 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 295 - simple, easy-to-use programmers model
 296 - highly efficient ultra-low power operation
 297 - excellent code density
 298 - deterministic, high-performance interrupt handling
 299 - upward compatibility with the rest of the Cortex-M processor family.
 300       </description>
 301       <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
 302       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 303       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 304       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 305
 306       <device Dname="ARMCM4">
 307         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 308         <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h"    define="ARMCM4"/>
 309       </device>
 310
 311       <device Dname="ARMCM4_FP">
 312         <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 313         <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
 314       </device>
 315     </family>
 316
 317     <!-- ******************************  Cortex-M7  ****************************** -->
 318     <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
 319       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
 320       <description>
 321 The Cortex-M7 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
 322 - simple, easy-to-use programmers model
 323 - highly efficient ultra-low power operation
 324 - excellent code density
 325 - deterministic, high-performance interrupt handling
 326 - upward compatibility with the rest of the Cortex-M processor family.
 327       </description>
 328       <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
 329       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 330       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 331       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 332
 333       <device Dname="ARMCM7">
 334         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 335         <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
 336       </device>
 337
 338       <device Dname="ARMCM7_SP">
 339         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 340         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
 341       </device>
 342
 343       <device Dname="ARMCM7_DP">
 344         <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable" Dclock="10000000"/>
 345         <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
 346       </device>
 347     </family>
 348
 349     <!-- ******************************  Cortex-M23  ********************** -->
 350     <family Dfamily="ARM Cortex M23" Dvendor="ARM:82">
 351       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 352       <description>
 353 The Arm Cortex-M23 is based on the Armv8-M baseline architecture.
 354 It is the smallest and most energy efficient Arm processor with Arm TrustZone technology.
 355 Cortex-M23 is the ideal processor for constrained embedded applications requiring efficient security.
 356       </description>
 357       <debug svd="Device/ARM/SVD/ARMCM23.svd"/>
 358       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 359       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 360       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 361       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 362       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 363
 364       <device Dname="ARMCM23">
 365         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 366         <compile header="Device/ARM/ARMCM23/Include/ARMCM23.h" define="ARMCM23"/>
 367       </device>
 368
 369       <device Dname="ARMCM23_TZ">
 370         <processor Dcore="Cortex-M23" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 371         <compile header="Device/ARM/ARMCM23/Include/ARMCM23_TZ.h" define="ARMCM23_TZ"/>
 372       </device>
 373     </family>
 374
 375     <!-- ******************************  Cortex-M33  ****************************** -->
 376     <family Dfamily="ARM Cortex M33" Dvendor="ARM:82">
 377       <!--book name="Device/ARM/Documents/??_dgug.pdf"       title="?? Device Generic Users Guide"/-->
 378       <description>
 379 The Arm Cortex-M33 is the most configurable of all Cortex-M processors. It is a full featured microcontroller
 380 class processor based on the Armv8-M mainline architecture with Arm TrustZone security.
 381       </description>
 382       <debug svd="Device/ARM/SVD/ARMCM33.svd"/>
 383       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 384       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 385       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 386       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 387       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"          default="1"/-->
 388
 389       <device Dname="ARMCM33">
 390         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 391         <description>
 392           no DSP Instructions, no Floating Point Unit, no TrustZone
 393         </description>
 394         <compile header="Device/ARM/ARMCM33/Include/ARMCM33.h" define="ARMCM33"/>
 395       </device>
 396
 397       <device Dname="ARMCM33_TZ">
 398         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 399         <description>
 400           no DSP Instructions, no Floating Point Unit, TrustZone
 401         </description>
 402         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_TZ.h" define="ARMCM33_TZ"/>
 403       </device>
 404
 405       <device Dname="ARMCM33_DSP_FP">
 406         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="NO_TZ" Dendian="Configurable" Dclock="10000000"/>
 407         <description>
 408           DSP Instructions, Single Precision Floating Point Unit, no TrustZone
 409         </description>
 410         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h" define="ARMCM33_DSP_FP"/>
 411       </device>
 412
 413       <device Dname="ARMCM33_DSP_FP_TZ">
 414         <processor Dcore="Cortex-M33" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 415         <description>
 416           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 417         </description>
 418         <compile header="Device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h" define="ARMCM33_DSP_FP_TZ"/>
 419       </device>
 420     </family>
 421
 422     <!-- ******************************  ARMSC000  ****************************** -->
 423     <family Dfamily="ARM SC000" Dvendor="ARM:82">
 424       <description>
 425 The Arm SC000 processor is an entry-level 32-bit Arm Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 426 - simple, easy-to-use programmers model
 427 - highly efficient ultra-low power operation
 428 - excellent code density
 429 - deterministic, high-performance interrupt handling
 430       </description>
 431       <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
 432       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 433       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 434       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 435
 436       <device Dname="ARMSC000">
 437         <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 438         <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
 439       </device>
 440     </family>
 441
 442     <!-- ******************************  ARMSC300  ****************************** -->
 443     <family Dfamily="ARM SC300" Dvendor="ARM:82">
 444       <description>
 445 The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
 446 - simple, easy-to-use programmers model
 447 - highly efficient ultra-low power operation
 448 - excellent code density
 449 - deterministic, high-performance interrupt handling
 450       </description>
 451       <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
 452       <memory id="IROM1"                                start="0x00000000" size="0x00040000" startup="1" default="1"/>
 453       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 454       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 455
 456       <device Dname="ARMSC300">
 457         <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="NO_FPU" Dmpu="NO_MPU" Dendian="Configurable" Dclock="10000000"/>
 458         <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
 459       </device>
 460     </family>
 461
 462     <!-- ******************************  ARMv8-M Baseline  ********************** -->
 463     <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
 464       <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf"       title="ARMv8MBL Device Generic Users Guide"/-->
 465       <description>
 466 Armv8-M Baseline based device with TrustZone
 467       </description>
 468       <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
 469       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 470       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 471       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 472       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 473       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 474
 475       <device Dname="ARMv8MBL">
 476         <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 477         <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
 478       </device>
 479     </family>
 480
 481     <!-- ******************************  ARMv8-M Mainline  ****************************** -->
 482     <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
 483       <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf"       title="ARMv8MML Device Generic Users Guide"/-->
 484       <description>
 485 Armv8-M Mainline based device with TrustZone
 486       </description>
 487       <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
 488       <memory id="IROM1"                                start="0x00000000" size="0x00200000" startup="1" default="1"/>
 489       <memory id="IROM2"                                start="0x00200000" size="0x00200000" startup="0" default="0"/>
 490       <memory id="IRAM1"                                start="0x20000000" size="0x00020000" init   ="0" default="1"/>
 491       <memory id="IRAM2"                                start="0x20200000" size="0x00020000" init   ="0" default="0"/>
 492       <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000"             default="1"/-->
 493
 494       <device Dname="ARMv8MML">
 495         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 496         <description>
 497           no DSP Instructions, no Floating Point Unit, TrustZone
 498         </description>
 499         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
 500       </device>
 501
 502       <device Dname="ARMv8MML_DSP">
 503         <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="NO_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 504         <description>
 505           DSP Instructions, no Floating Point Unit, TrustZone
 506         </description>
 507         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h" define="ARMv8MML_DSP"/>
 508       </device>
 509
 510       <device Dname="ARMv8MML_SP">
 511         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 512         <description>
 513           no DSP Instructions, Single Precision Floating Point Unit, TrustZone
 514         </description>
 515         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
 516       </device>
 517
 518       <device Dname="ARMv8MML_DSP_SP">
 519         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 520         <description>
 521           DSP Instructions, Single Precision Floating Point Unit, TrustZone
 522         </description>
 523         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h" define="ARMv8MML_DSP_SP"/>
 524       </device>
 525
 526       <device Dname="ARMv8MML_DP">
 527         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="NO_DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 528         <description>
 529           no DSP Instructions, Double Precision Floating Point Unit, TrustZone
 530         </description>
 531         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
 532       </device>
 533
 534       <device Dname="ARMv8MML_DSP_DP">
 535         <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Ddsp="DSP" Dtz="TZ" Dendian="Configurable" Dclock="10000000"/>
 536         <description>
 537           DSP Instructions, Double Precision Floating Point Unit, TrustZone
 538         </description>
 539         <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h" define="ARMv8MML_DSP_DP"/>
 540       </device>
 541     </family>
 542
 543     <!-- ******************************  Cortex-A5  ****************************** -->
 544     <family Dfamily="ARM Cortex A5" Dvendor="ARM:82">
 545       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/index.html" title="Cortex-A5 Technical Reference Manual"/>
 546       <description>
 547 The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full
 548 virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit
 549 Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.
 550       </description>
 551
 552       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 553       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 554
 555       <device Dname="ARMCA5">
 556         <processor Dcore="Cortex-A5" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 557         <compile header="Device/ARM/ARMCA5/Include/ARMCA5.h" define="ARMCA5"/>
 558       </device>
 559     </family>
 560
 561     <!-- ******************************  Cortex-A7  ****************************** -->
 562     <family Dfamily="ARM Cortex A7" Dvendor="ARM:82">
 563       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/index.html" title="Cortex-A7 MPCore Technical Reference Manual"/>
 564       <description>
 565 The Cortex-A7 MPCore processor is a high-performance, low-power processor that implements the Armv7-A architecture.
 566 The Cortex-A7 MPCore processor has one to four processors in a single multiprocessor device with a L1 cache subsystem,
 567 an optional integrated GIC, and an optional L2 cache controller.
 568       </description>
 569
 570       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 571       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 572
 573       <device Dname="ARMCA7">
 574         <processor Dcore="Cortex-A7" DcoreVersion="r0p5" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 575         <compile header="Device/ARM/ARMCA7/Include/ARMCA7.h" define="ARMCA7"/>
 576       </device>
 577     </family>
 578
 579     <!-- ******************************  Cortex-A9  ****************************** -->
 580     <family Dfamily="ARM Cortex A9" Dvendor="ARM:82">
 581       <book name="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/index.html" title="Cortex-A9 Technical Reference Manual"/>
 582       <description>
 583 The Cortex-A9 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities.
 584 The Cortex-A9 processor implements the Armv7-A architecture and runs 32-bit Arm instructions, 16-bit and 32-bit Thumb instructions,
 585 and 8-bit Java bytecodes in Jazelle state.
 586       </description>
 587
 588       <memory id="IROM1"                                start="0x80000000" size="0x00200000" startup="1" default="1"/>
 589       <memory id="IRAM1"                                start="0x80200000" size="0x00200000" init   ="0" default="1"/>
 590
 591       <device Dname="ARMCA9">
 592         <processor Dcore="Cortex-A9" DcoreVersion="r4p1" Dfpu="DP_FPU" Dmpu="MPU" Dendian="Configurable"/>
 593         <compile header="Device/ARM/ARMCA9/Include/ARMCA9.h" define="ARMCA9"/>
 594       </device>
 595     </family>
 596   </devices>
 597
 598
 599   <apis>
 600     <!-- CMSIS Device API -->
 601     <api Cclass="Device" Cgroup="IRQ Controller" Capiversion="1.0.0" exclusive="1">
 602       <description>Device interrupt controller interface</description>
 603       <files>
 604         <file category="header" name="CMSIS/Core_A/Include/irq_ctrl.h"/>
 605       </files>
 606     </api>
 607     <api Cclass="Device" Cgroup="OS Tick" Capiversion="1.0.1" exclusive="1">
 608       <description>RTOS Kernel system tick timer interface</description>
 609       <files>
 610         <file category="header" name="CMSIS/RTOS2/Include/os_tick.h"/>
 611       </files>
 612     </api>
 613     <!-- CMSIS-RTOS API -->
 614     <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0.0" exclusive="1">
 615       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 616       <files>
 617         <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
 618       </files>
 619     </api>
 620     <api Cclass="CMSIS" Cgroup="RTOS2" Capiversion="2.1.2" exclusive="1">
 621       <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
 622       <files>
 623         <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
 624         <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
 625       </files>
 626     </api>
 627     <!-- CMSIS Driver API -->
 628     <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.3.0" exclusive="0">
 629       <description>USART Driver API for Cortex-M</description>
 630       <files>
 631         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
 632         <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
 633       </files>
 634     </api>
 635     <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.2.0" exclusive="0">
 636       <description>SPI Driver API for Cortex-M</description>
 637       <files>
 638         <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
 639         <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
 640       </files>
 641     </api>
 642     <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.1.0" exclusive="0">
 643       <description>SAI Driver API for Cortex-M</description>
 644       <files>
 645         <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
 646         <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
 647       </files>
 648     </api>
 649     <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.3.0" exclusive="0">
 650       <description>I2C Driver API for Cortex-M</description>
 651       <files>
 652         <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
 653         <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
 654       </files>
 655     </api>
 656     <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.2.0" exclusive="0">
 657       <description>CAN Driver API for Cortex-M</description>
 658       <files>
 659         <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
 660         <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
 661       </files>
 662     </api>
 663     <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.1.0" exclusive="0">
 664       <description>Flash Driver API for Cortex-M</description>
 665       <files>
 666         <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
 667         <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
 668       </files>
 669     </api>
 670     <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.3.0" exclusive="0">
 671       <description>MCI Driver API for Cortex-M</description>
 672       <files>
 673         <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
 674         <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
 675       </files>
 676     </api>
 677     <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.3.0" exclusive="0">
 678       <description>NAND Flash Driver API for Cortex-M</description>
 679       <files>
 680         <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
 681         <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
 682       </files>
 683     </api>
 684     <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.1.0" exclusive="0">
 685       <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
 686       <files>
 687         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
 688         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 689         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 690       </files>
 691     </api>
 692     <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.1.0" exclusive="0">
 693       <description>Ethernet MAC Driver API for Cortex-M</description>
 694       <files>
 695         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
 696         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
 697       </files>
 698     </api>
 699     <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.1.0" exclusive="0">
 700       <description>Ethernet PHY Driver API for Cortex-M</description>
 701       <files>
 702         <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
 703         <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
 704       </files>
 705     </api>
 706     <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.2.0" exclusive="0">
 707       <description>USB Device Driver API for Cortex-M</description>
 708       <files>
 709         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
 710         <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
 711       </files>
 712     </api>
 713     <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.2.0" exclusive="0">
 714       <description>USB Host Driver API for Cortex-M</description>
 715       <files>
 716         <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
 717         <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
 718       </files>
 719     </api>
 720   </apis>
 721
 722   <!-- conditions are dependency rules that can apply to a component or an individual file -->
 723   <conditions>
 724     <!-- compiler -->
 725     <condition id="ARMCC6">
 726       <accept Tcompiler="ARMCC" Toptions="AC6"/>
 727       <accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
 728     </condition>
 729     <condition id="ARMCC5">
 730       <require Tcompiler="ARMCC" Toptions="AC5"/>
 731     </condition>
 732     <condition id="ARMCC">
 733       <require Tcompiler="ARMCC"/>
 734     </condition>
 735     <condition id="GCC">
 736       <require Tcompiler="GCC"/>
 737     </condition>
 738     <condition id="IAR">
 739       <require Tcompiler="IAR"/>
 740     </condition>
 741     <condition id="ARMCC GCC">
 742       <accept Tcompiler="ARMCC"/>
 743       <accept Tcompiler="GCC"/>
 744     </condition>
 745     <condition id="ARMCC GCC IAR">
 746       <accept Tcompiler="ARMCC"/>
 747       <accept Tcompiler="GCC"/>
 748       <accept Tcompiler="IAR"/>
 749     </condition>
 750
 751     <!-- Arm architecture -->
 752     <condition id="ARMv6-M Device">
 753       <description>Armv6-M architecture based device</description>
 754       <accept Dcore="Cortex-M0"/>
 755       <accept Dcore="Cortex-M0+"/>
 756       <accept Dcore="SC000"/>
 757     </condition>
 758     <condition id="ARMv7-M Device">
 759       <description>Armv7-M architecture based device</description>
 760       <accept Dcore="Cortex-M3"/>
 761       <accept Dcore="Cortex-M4"/>
 762       <accept Dcore="Cortex-M7"/>
 763       <accept Dcore="SC300"/>
 764     </condition>
 765     <condition id="ARMv8-M Device">
 766       <description>Armv8-M architecture based device</description>
 767       <accept Dcore="ARMV8MBL"/>
 768       <accept Dcore="ARMV8MML"/>
 769       <accept Dcore="Cortex-M23"/>
 770       <accept Dcore="Cortex-M33"/>
 771     </condition>
 772     <condition id="ARMv8-M TZ Device">
 773       <description>Armv8-M architecture based device with TrustZone</description>
 774       <require condition="ARMv8-M Device"/>
 775       <require Dtz="TZ"/>
 776     </condition>
 777     <condition id="ARMv6_7-M Device">
 778       <description>Armv6_7-M architecture based device</description>
 779       <accept condition="ARMv6-M Device"/>
 780       <accept condition="ARMv7-M Device"/>
 781     </condition>
 782     <condition id="ARMv6_7_8-M Device">
 783       <description>Armv6_7_8-M architecture based device</description>
 784       <accept condition="ARMv6-M Device"/>
 785       <accept condition="ARMv7-M Device"/>
 786       <accept condition="ARMv8-M Device"/>
 787     </condition>
 788     <condition id="ARMv7-A Device">
 789       <description>Armv7-A architecture based device</description>
 790       <accept Dcore="Cortex-A5"/>
 791       <accept Dcore="Cortex-A7"/>
 792       <accept Dcore="Cortex-A9"/>
 793     </condition>
 794
 795     <!-- ARM core -->
 796     <condition id="CM0">
 797       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device</description>
 798       <accept Dcore="Cortex-M0"/>
 799       <accept Dcore="Cortex-M0+"/>
 800       <accept Dcore="SC000"/>
 801     </condition>
 802     <condition id="CM3">
 803       <description>Cortex-M3 or SC300 processor based device</description>
 804       <accept Dcore="Cortex-M3"/>
 805       <accept Dcore="SC300"/>
 806     </condition>
 807     <condition id="CM4">
 808       <description>Cortex-M4 processor based device</description>
 809       <require Dcore="Cortex-M4" Dfpu="NO_FPU"/>
 810     </condition>
 811     <condition id="CM4_FP">
 812       <description>Cortex-M4 processor based device using Floating Point Unit</description>
 813       <accept Dcore="Cortex-M4" Dfpu="FPU"/>
 814       <accept Dcore="Cortex-M4" Dfpu="SP_FPU"/>
 815       <accept Dcore="Cortex-M4" Dfpu="DP_FPU"/>
 816     </condition>
 817     <condition id="CM7">
 818       <description>Cortex-M7 processor based device</description>
 819       <require Dcore="Cortex-M7" Dfpu="NO_FPU"/>
 820     </condition>
 821     <condition id="CM7_FP">
 822       <description>Cortex-M7 processor based device using Floating Point Unit</description>
 823       <accept Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 824       <accept Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 825     </condition>
 826     <condition id="CM7_SP">
 827       <description>Cortex-M7 processor based device using Floating Point Unit (SP)</description>
 828       <require Dcore="Cortex-M7" Dfpu="SP_FPU"/>
 829     </condition>
 830     <condition id="CM7_DP">
 831       <description>Cortex-M7 processor based device using Floating Point Unit (DP)</description>
 832       <require Dcore="Cortex-M7" Dfpu="DP_FPU"/>
 833     </condition>
 834     <condition id="CM23">
 835       <description>Cortex-M23 processor based device</description>
 836       <require Dcore="Cortex-M23"/>
 837     </condition>
 838     <condition id="CM33">
 839       <description>Cortex-M33 processor based device</description>
 840       <require Dcore="Cortex-M33" Dfpu="NO_FPU"/>
 841     </condition>
 842     <condition id="CM33_FP">
 843       <description>Cortex-M33 processor based device using Floating Point Unit</description>
 844       <require Dcore="Cortex-M33" Dfpu="SP_FPU"/>
 845     </condition>
 846     <condition id="ARMv8MBL">
 847       <description>Armv8-M Baseline processor based device</description>
 848       <require Dcore="ARMV8MBL"/>
 849     </condition>
 850     <condition id="ARMv8MML">
 851       <description>Armv8-M Mainline processor based device</description>
 852       <require Dcore="ARMV8MML" Dfpu="NO_FPU"/>
 853     </condition>
 854     <condition id="ARMv8MML_FP">
 855       <description>Armv8-M Mainline processor based device using Floating Point Unit</description>
 856       <accept Dcore="ARMV8MML" Dfpu="SP_FPU"/>
 857       <accept Dcore="ARMV8MML" Dfpu="DP_FPU"/>
 858     </condition>
 859
 860     <condition id="CM33_NODSP_NOFPU">
 861       <description>CM33, no DSP, no FPU</description>
 862       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 863     </condition>
 864     <condition id="CM33_DSP_NOFPU">
 865       <description>CM33, DSP, no FPU</description>
 866       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="NO_FPU"/>
 867     </condition>
 868     <condition id="CM33_NODSP_SP">
 869       <description>CM33, no DSP, SP FPU</description>
 870       <require Dcore="Cortex-M33" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 871     </condition>
 872     <condition id="CM33_DSP_SP">
 873       <description>CM33, DSP, SP FPU</description>
 874       <require Dcore="Cortex-M33" Ddsp="DSP" Dfpu="SP_FPU"/>
 875     </condition>
 876
 877     <condition id="ARMv8MML_NODSP_NOFPU">
 878       <description>Armv8-M Mainline, no DSP, no FPU</description>
 879       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="NO_FPU"/>
 880     </condition>
 881     <condition id="ARMv8MML_DSP_NOFPU">
 882       <description>Armv8-M Mainline, DSP, no FPU</description>
 883       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="NO_FPU"/>
 884     </condition>
 885     <condition id="ARMv8MML_NODSP_SP">
 886       <description>Armv8-M Mainline, no DSP, SP FPU</description>
 887       <require Dcore="ARMV8MML" Ddsp="NO_DSP" Dfpu="SP_FPU"/>
 888     </condition>
 889     <condition id="ARMv8MML_DSP_SP">
 890       <description>Armv8-M Mainline, DSP, SP FPU</description>
 891       <require Dcore="ARMV8MML" Ddsp="DSP" Dfpu="SP_FPU"/>
 892     </condition>
 893
 894     <condition id="CA5_CA9">
 895       <description>Cortex-A5 or Cortex-A9 processor based device</description>
 896       <accept Dcore="Cortex-A5"/>
 897       <accept Dcore="Cortex-A9"/>
 898     </condition>
 899
 900     <condition id="CA7">
 901       <description>Cortex-A7 processor based device</description>
 902       <accept Dcore="Cortex-A7"/>
 903     </condition>
 904
 905     <!-- ARMCC compiler -->
 906     <condition id="CA_ARMCC5">
 907       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 5</description>
 908       <require condition="ARMv7-A Device"/>
 909       <require condition="ARMCC5"/>
 910     </condition>
 911     <condition id="CA_ARMCC6">
 912       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the Arm Compiler 6</description>
 913       <require condition="ARMv7-A Device"/>
 914       <require condition="ARMCC6"/>
 915     </condition>
 916
 917     <condition id="CM0_ARMCC">
 918       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the Arm Compiler</description>
 919       <require condition="CM0"/>
 920       <require Tcompiler="ARMCC"/>
 921     </condition>
 922     <condition id="CM0_LE_ARMCC">
 923       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the Arm Compiler</description>
 924       <require condition="CM0_ARMCC"/>
 925       <require Dendian="Little-endian"/>
 926     </condition>
 927     <condition id="CM0_BE_ARMCC">
 928       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the Arm Compiler</description>
 929       <require condition="CM0_ARMCC"/>
 930       <require Dendian="Big-endian"/>
 931     </condition>
 932
 933     <condition id="CM3_ARMCC">
 934       <description>Cortex-M3 or SC300 processor based device for the Arm Compiler</description>
 935       <require condition="CM3"/>
 936       <require Tcompiler="ARMCC"/>
 937     </condition>
 938     <condition id="CM3_LE_ARMCC">
 939       <description>Cortex-M3 or SC300 processor based device in little endian mode for the Arm Compiler</description>
 940       <require condition="CM3_ARMCC"/>
 941       <require Dendian="Little-endian"/>
 942     </condition>
 943     <condition id="CM3_BE_ARMCC">
 944       <description>Cortex-M3 or SC300 processor based device in big endian mode for the Arm Compiler</description>
 945       <require condition="CM3_ARMCC"/>
 946       <require Dendian="Big-endian"/>
 947     </condition>
 948
 949     <condition id="CM4_ARMCC">
 950       <description>Cortex-M4 processor based device for the Arm Compiler</description>
 951       <require condition="CM4"/>
 952       <require Tcompiler="ARMCC"/>
 953     </condition>
 954     <condition id="CM4_LE_ARMCC">
 955       <description>Cortex-M4 processor based device in little endian mode for the Arm Compiler</description>
 956       <require condition="CM4_ARMCC"/>
 957       <require Dendian="Little-endian"/>
 958     </condition>
 959     <condition id="CM4_BE_ARMCC">
 960       <description>Cortex-M4 processor based device in big endian mode for the Arm Compiler</description>
 961       <require condition="CM4_ARMCC"/>
 962       <require Dendian="Big-endian"/>
 963     </condition>
 964
 965     <condition id="CM4_FP_ARMCC">
 966       <description>Cortex-M4 processor based device using Floating Point Unit for the Arm Compiler</description>
 967       <require condition="CM4_FP"/>
 968       <require Tcompiler="ARMCC"/>
 969     </condition>
 970     <condition id="CM4_FP_LE_ARMCC">
 971       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
 972       <require condition="CM4_FP_ARMCC"/>
 973       <require Dendian="Little-endian"/>
 974     </condition>
 975     <condition id="CM4_FP_BE_ARMCC">
 976       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
 977       <require condition="CM4_FP_ARMCC"/>
 978       <require Dendian="Big-endian"/>
 979     </condition>
 980
 981     <condition id="CM7_ARMCC">
 982       <description>Cortex-M7 processor based device for the Arm Compiler</description>
 983       <require condition="CM7"/>
 984       <require Tcompiler="ARMCC"/>
 985     </condition>
 986     <condition id="CM7_LE_ARMCC">
 987       <description>Cortex-M7 processor based device in little endian mode for the Arm Compiler</description>
 988       <require condition="CM7_ARMCC"/>
 989       <require Dendian="Little-endian"/>
 990     </condition>
 991     <condition id="CM7_BE_ARMCC">
 992       <description>Cortex-M7 processor based device in big endian mode for the Arm Compiler</description>
 993       <require condition="CM7_ARMCC"/>
 994       <require Dendian="Big-endian"/>
 995     </condition>
 996
 997     <condition id="CM7_FP_ARMCC">
 998       <description>Cortex-M7 processor based device using Floating Point Unit for the Arm Compiler</description>
 999       <require condition="CM7_FP"/>
1000       <require Tcompiler="ARMCC"/>
1001     </condition>
1002     <condition id="CM7_FP_LE_ARMCC">
1003       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1004       <require condition="CM7_FP_ARMCC"/>
1005       <require Dendian="Little-endian"/>
1006     </condition>
1007     <condition id="CM7_FP_BE_ARMCC">
1008       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1009       <require condition="CM7_FP_ARMCC"/>
1010       <require Dendian="Big-endian"/>
1011     </condition>
1012
1013     <condition id="CM7_SP_ARMCC">
1014       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the Arm Compiler</description>
1015       <require condition="CM7_SP"/>
1016       <require Tcompiler="ARMCC"/>
1017     </condition>
1018     <condition id="CM7_SP_LE_ARMCC">
1019       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the Arm Compiler</description>
1020       <require condition="CM7_SP_ARMCC"/>
1021       <require Dendian="Little-endian"/>
1022     </condition>
1023     <condition id="CM7_SP_BE_ARMCC">
1024       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the Arm Compiler</description>
1025       <require condition="CM7_SP_ARMCC"/>
1026       <require Dendian="Big-endian"/>
1027     </condition>
1028
1029     <condition id="CM7_DP_ARMCC">
1030       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the Arm Compiler</description>
1031       <require condition="CM7_DP"/>
1032       <require Tcompiler="ARMCC"/>
1033     </condition>
1034     <condition id="CM7_DP_LE_ARMCC">
1035       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the Arm Compiler</description>
1036       <require condition="CM7_DP_ARMCC"/>
1037       <require Dendian="Little-endian"/>
1038     </condition>
1039     <condition id="CM7_DP_BE_ARMCC">
1040       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the Arm Compiler</description>
1041       <require condition="CM7_DP_ARMCC"/>
1042       <require Dendian="Big-endian"/>
1043     </condition>
1044
1045     <condition id="CM23_ARMCC">
1046       <description>Cortex-M23 processor based device for the Arm Compiler</description>
1047       <require condition="CM23"/>
1048       <require Tcompiler="ARMCC"/>
1049     </condition>
1050     <condition id="CM23_LE_ARMCC">
1051       <description>Cortex-M23 processor based device in little endian mode for the Arm Compiler</description>
1052       <require condition="CM23_ARMCC"/>
1053       <require Dendian="Little-endian"/>
1054     </condition>
1055     <condition id="CM23_BE_ARMCC">
1056       <description>Cortex-M23 processor based device in big endian mode for the Arm Compiler</description>
1057       <require condition="CM23_ARMCC"/>
1058       <require Dendian="Big-endian"/>
1059     </condition>
1060
1061     <condition id="CM33_ARMCC">
1062       <description>Cortex-M33 processor based device for the Arm Compiler</description>
1063       <require condition="CM33"/>
1064       <require Tcompiler="ARMCC"/>
1065     </condition>
1066     <condition id="CM33_LE_ARMCC">
1067       <description>Cortex-M33 processor based device in little endian mode for the Arm Compiler</description>
1068       <require condition="CM33_ARMCC"/>
1069       <require Dendian="Little-endian"/>
1070     </condition>
1071     <condition id="CM33_BE_ARMCC">
1072       <description>Cortex-M33 processor based device in big endian mode for the Arm Compiler</description>
1073       <require condition="CM33_ARMCC"/>
1074       <require Dendian="Big-endian"/>
1075     </condition>
1076
1077     <condition id="CM33_FP_ARMCC">
1078       <description>Cortex-M33 processor based device using Floating Point Unit for the Arm Compiler</description>
1079       <require condition="CM33_FP"/>
1080       <require Tcompiler="ARMCC"/>
1081     </condition>
1082     <condition id="CM33_FP_LE_ARMCC">
1083       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1084       <require condition="CM33_FP_ARMCC"/>
1085       <require Dendian="Little-endian"/>
1086     </condition>
1087     <condition id="CM33_FP_BE_ARMCC">
1088       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1089       <require condition="CM33_FP_ARMCC"/>
1090       <require Dendian="Big-endian"/>
1091     </condition>
1092
1093     <condition id="CM33_NODSP_NOFPU_ARMCC">
1094       <description>Cortex-M33 processor, no DSP, no FPU, Arm Compiler</description>
1095       <require condition="CM33_NODSP_NOFPU"/>
1096       <require Tcompiler="ARMCC"/>
1097     </condition>
1098     <condition id="CM33_DSP_NOFPU_ARMCC">
1099       <description>Cortex-M33 processor, DSP, no FPU, Arm Compiler</description>
1100       <require condition="CM33_DSP_NOFPU"/>
1101       <require Tcompiler="ARMCC"/>
1102     </condition>
1103     <condition id="CM33_NODSP_SP_ARMCC">
1104       <description>Cortex-M33 processor, no DSP, SP FPU, Arm Compiler</description>
1105       <require condition="CM33_NODSP_SP"/>
1106       <require Tcompiler="ARMCC"/>
1107     </condition>
1108     <condition id="CM33_DSP_SP_ARMCC">
1109       <description>Cortex-M33 processor, DSP, SP FPU, Arm Compiler</description>
1110       <require condition="CM33_DSP_SP"/>
1111       <require Tcompiler="ARMCC"/>
1112     </condition>
1113     <condition id="CM33_NODSP_NOFPU_LE_ARMCC">
1114       <description>Cortex-M33 processor, little endian, no DSP, no FPU, Arm Compiler</description>
1115       <require condition="CM33_NODSP_NOFPU_ARMCC"/>
1116       <require Dendian="Little-endian"/>
1117     </condition>
1118     <condition id="CM33_DSP_NOFPU_LE_ARMCC">
1119       <description>Cortex-M33 processor, little endian, DSP, no FPU, Arm Compiler</description>
1120       <require condition="CM33_DSP_NOFPU_ARMCC"/>
1121       <require Dendian="Little-endian"/>
1122     </condition>
1123     <condition id="CM33_NODSP_SP_LE_ARMCC">
1124       <description>Cortex-M33 processor, little endian, no DSP, SP FPU, Arm Compiler</description>
1125       <require condition="CM33_NODSP_SP_ARMCC"/>
1126       <require Dendian="Little-endian"/>
1127     </condition>
1128     <condition id="CM33_DSP_SP_LE_ARMCC">
1129       <description>Cortex-M33 processor, little endian, DSP, SP FPU, Arm Compiler</description>
1130       <require condition="CM33_DSP_SP_ARMCC"/>
1131       <require Dendian="Little-endian"/>
1132     </condition>
1133
1134     <condition id="ARMv8MBL_ARMCC">
1135       <description>Armv8-M Baseline processor based device for the Arm Compiler</description>
1136       <require condition="ARMv8MBL"/>
1137       <require Tcompiler="ARMCC"/>
1138     </condition>
1139     <condition id="ARMv8MBL_LE_ARMCC">
1140       <description>Armv8-M Baseline processor based device in little endian mode for the Arm Compiler</description>
1141       <require condition="ARMv8MBL_ARMCC"/>
1142       <require Dendian="Little-endian"/>
1143     </condition>
1144     <condition id="ARMv8MBL_BE_ARMCC">
1145       <description>Armv8-M Baseline processor based device in big endian mode for the Arm Compiler</description>
1146       <require condition="ARMv8MBL_ARMCC"/>
1147       <require Dendian="Big-endian"/>
1148     </condition>
1149
1150     <condition id="ARMv8MML_ARMCC">
1151       <description>Armv8-M Mainline processor based device for the Arm Compiler</description>
1152       <require condition="ARMv8MML"/>
1153       <require Tcompiler="ARMCC"/>
1154     </condition>
1155     <condition id="ARMv8MML_LE_ARMCC">
1156       <description>Armv8-M Mainline processor based device in little endian mode for the Arm Compiler</description>
1157       <require condition="ARMv8MML_ARMCC"/>
1158       <require Dendian="Little-endian"/>
1159     </condition>
1160     <condition id="ARMv8MML_BE_ARMCC">
1161       <description>Armv8-M Mainline processor based device in big endian mode for the Arm Compiler</description>
1162       <require condition="ARMv8MML_ARMCC"/>
1163       <require Dendian="Big-endian"/>
1164     </condition>
1165
1166     <condition id="ARMv8MML_FP_ARMCC">
1167       <description>Armv8-M Mainline processor based device using Floating Point Unit for the Arm Compiler</description>
1168       <require condition="ARMv8MML_FP"/>
1169       <require Tcompiler="ARMCC"/>
1170     </condition>
1171     <condition id="ARMv8MML_FP_LE_ARMCC">
1172       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the Arm Compiler</description>
1173       <require condition="ARMv8MML_FP_ARMCC"/>
1174       <require Dendian="Little-endian"/>
1175     </condition>
1176     <condition id="ARMv8MML_FP_BE_ARMCC">
1177       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the Arm Compiler</description>
1178       <require condition="ARMv8MML_FP_ARMCC"/>
1179       <require Dendian="Big-endian"/>
1180     </condition>
1181
1182     <condition id="ARMv8MML_NODSP_NOFPU_ARMCC">
1183       <description>Armv8-M Mainline, no DSP, no FPU, Arm Compiler</description>
1184       <require condition="ARMv8MML_NODSP_NOFPU"/>
1185       <require Tcompiler="ARMCC"/>
1186     </condition>
1187     <condition id="ARMv8MML_DSP_NOFPU_ARMCC">
1188       <description>Armv8-M Mainline, DSP, no FPU, Arm Compiler</description>
1189       <require condition="ARMv8MML_DSP_NOFPU"/>
1190       <require Tcompiler="ARMCC"/>
1191     </condition>
1192     <condition id="ARMv8MML_NODSP_SP_ARMCC">
1193       <description>Armv8-M Mainline, no DSP, SP FPU, Arm Compiler</description>
1194       <require condition="ARMv8MML_NODSP_SP"/>
1195       <require Tcompiler="ARMCC"/>
1196     </condition>
1197     <condition id="ARMv8MML_DSP_SP_ARMCC">
1198       <description>Armv8-M Mainline, DSP, SP FPU, Arm Compiler</description>
1199       <require condition="ARMv8MML_DSP_SP"/>
1200       <require Tcompiler="ARMCC"/>
1201     </condition>
1202     <condition id="ARMv8MML_NODSP_NOFPU_LE_ARMCC">
1203       <description>Armv8-M Mainline, little endian, no DSP, no FPU, Arm Compiler</description>
1204       <require condition="ARMv8MML_NODSP_NOFPU_ARMCC"/>
1205       <require Dendian="Little-endian"/>
1206     </condition>
1207     <condition id="ARMv8MML_DSP_NOFPU_LE_ARMCC">
1208       <description>Armv8-M Mainline, little endian, DSP, no FPU, Arm Compiler</description>
1209       <require condition="ARMv8MML_DSP_NOFPU_ARMCC"/>
1210       <require Dendian="Little-endian"/>
1211     </condition>
1212     <condition id="ARMv8MML_NODSP_SP_LE_ARMCC">
1213       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, Arm Compiler</description>
1214       <require condition="ARMv8MML_NODSP_SP_ARMCC"/>
1215       <require Dendian="Little-endian"/>
1216     </condition>
1217     <condition id="ARMv8MML_DSP_SP_LE_ARMCC">
1218       <description>Armv8-M Mainline, little endian, DSP, SP FPU, Arm Compiler</description>
1219       <require condition="ARMv8MML_DSP_SP_ARMCC"/>
1220       <require Dendian="Little-endian"/>
1221     </condition>
1222
1223     <!-- GCC compiler -->
1224     <condition id="CA_GCC">
1225       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the GCC Compiler</description>
1226       <require condition="ARMv7-A Device"/>
1227       <require Tcompiler="GCC"/>
1228     </condition>
1229
1230     <condition id="CM0_GCC">
1231       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the GCC Compiler</description>
1232       <require condition="CM0"/>
1233       <require Tcompiler="GCC"/>
1234     </condition>
1235     <condition id="CM0_LE_GCC">
1236       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
1237       <require condition="CM0_GCC"/>
1238       <require Dendian="Little-endian"/>
1239     </condition>
1240     <condition id="CM0_BE_GCC">
1241       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
1242       <require condition="CM0_GCC"/>
1243       <require Dendian="Big-endian"/>
1244     </condition>
1245
1246     <condition id="CM3_GCC">
1247       <description>Cortex-M3 or SC300 processor based device for the GCC Compiler</description>
1248       <require condition="CM3"/>
1249       <require Tcompiler="GCC"/>
1250     </condition>
1251     <condition id="CM3_LE_GCC">
1252       <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
1253       <require condition="CM3_GCC"/>
1254       <require Dendian="Little-endian"/>
1255     </condition>
1256     <condition id="CM3_BE_GCC">
1257       <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
1258       <require condition="CM3_GCC"/>
1259       <require Dendian="Big-endian"/>
1260     </condition>
1261
1262     <condition id="CM4_GCC">
1263       <description>Cortex-M4 processor based device for the GCC Compiler</description>
1264       <require condition="CM4"/>
1265       <require Tcompiler="GCC"/>
1266     </condition>
1267     <condition id="CM4_LE_GCC">
1268       <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
1269       <require condition="CM4_GCC"/>
1270       <require Dendian="Little-endian"/>
1271     </condition>
1272     <condition id="CM4_BE_GCC">
1273       <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
1274       <require condition="CM4_GCC"/>
1275       <require Dendian="Big-endian"/>
1276     </condition>
1277
1278     <condition id="CM4_FP_GCC">
1279       <description>Cortex-M4 processor based device using Floating Point Unit for the GCC Compiler</description>
1280       <require condition="CM4_FP"/>
1281       <require Tcompiler="GCC"/>
1282     </condition>
1283     <condition id="CM4_FP_LE_GCC">
1284       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1285       <require condition="CM4_FP_GCC"/>
1286       <require Dendian="Little-endian"/>
1287     </condition>
1288     <condition id="CM4_FP_BE_GCC">
1289       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1290       <require condition="CM4_FP_GCC"/>
1291       <require Dendian="Big-endian"/>
1292     </condition>
1293
1294     <condition id="CM7_GCC">
1295       <description>Cortex-M7 processor based device for the GCC Compiler</description>
1296       <require condition="CM7"/>
1297       <require Tcompiler="GCC"/>
1298     </condition>
1299     <condition id="CM7_LE_GCC">
1300       <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
1301       <require condition="CM7_GCC"/>
1302       <require Dendian="Little-endian"/>
1303     </condition>
1304     <condition id="CM7_BE_GCC">
1305       <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
1306       <require condition="CM7_GCC"/>
1307       <require Dendian="Big-endian"/>
1308     </condition>
1309
1310     <condition id="CM7_FP_GCC">
1311       <description>Cortex-M7 processor based device using Floating Point Unit for the GCC Compiler</description>
1312       <require condition="CM7_FP"/>
1313       <require Tcompiler="GCC"/>
1314     </condition>
1315     <condition id="CM7_FP_LE_GCC">
1316       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1317       <require condition="CM7_FP_GCC"/>
1318       <require Dendian="Little-endian"/>
1319     </condition>
1320     <condition id="CM7_FP_BE_GCC">
1321       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1322       <require condition="CM7_FP_GCC"/>
1323       <require Dendian="Big-endian"/>
1324     </condition>
1325
1326     <condition id="CM7_SP_GCC">
1327       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the GCC Compiler</description>
1328       <require condition="CM7_SP"/>
1329       <require Tcompiler="GCC"/>
1330     </condition>
1331     <condition id="CM7_SP_LE_GCC">
1332       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the GCC Compiler</description>
1333       <require condition="CM7_SP_GCC"/>
1334       <require Dendian="Little-endian"/>
1335     </condition>
1336     <condition id="CM7_SP_BE_GCC">
1337       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the GCC Compiler</description>
1338       <require condition="CM7_SP_GCC"/>
1339       <require Dendian="Big-endian"/>
1340     </condition>
1341
1342     <condition id="CM7_DP_GCC">
1343       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the GCC Compiler</description>
1344       <require condition="CM7_DP"/>
1345       <require Tcompiler="GCC"/>
1346     </condition>
1347     <condition id="CM7_DP_LE_GCC">
1348       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the GCC Compiler</description>
1349       <require condition="CM7_DP_GCC"/>
1350       <require Dendian="Little-endian"/>
1351     </condition>
1352     <condition id="CM7_DP_BE_GCC">
1353       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the GCC Compiler</description>
1354       <require condition="CM7_DP_GCC"/>
1355       <require Dendian="Big-endian"/>
1356     </condition>
1357
1358     <condition id="CM23_GCC">
1359       <description>Cortex-M23 processor based device for the GCC Compiler</description>
1360       <require condition="CM23"/>
1361       <require Tcompiler="GCC"/>
1362     </condition>
1363     <condition id="CM23_LE_GCC">
1364       <description>Cortex-M23 processor based device in little endian mode for the GCC Compiler</description>
1365       <require condition="CM23_GCC"/>
1366       <require Dendian="Little-endian"/>
1367     </condition>
1368     <condition id="CM23_BE_GCC">
1369       <description>Cortex-M23 processor based device in big endian mode for the GCC Compiler</description>
1370       <require condition="CM23_GCC"/>
1371       <require Dendian="Big-endian"/>
1372     </condition>
1373
1374     <condition id="CM33_GCC">
1375       <description>Cortex-M33 processor based device for the GCC Compiler</description>
1376       <require condition="CM33"/>
1377       <require Tcompiler="GCC"/>
1378     </condition>
1379     <condition id="CM33_LE_GCC">
1380       <description>Cortex-M33 processor based device in little endian mode for the GCC Compiler</description>
1381       <require condition="CM33_GCC"/>
1382       <require Dendian="Little-endian"/>
1383     </condition>
1384     <condition id="CM33_BE_GCC">
1385       <description>Cortex-M33 processor based device in big endian mode for the GCC Compiler</description>
1386       <require condition="CM33_GCC"/>
1387       <require Dendian="Big-endian"/>
1388     </condition>
1389
1390     <condition id="CM33_FP_GCC">
1391       <description>Cortex-M33 processor based device using Floating Point Unit for the GCC Compiler</description>
1392       <require condition="CM33_FP"/>
1393       <require Tcompiler="GCC"/>
1394     </condition>
1395     <condition id="CM33_FP_LE_GCC">
1396       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1397       <require condition="CM33_FP_GCC"/>
1398       <require Dendian="Little-endian"/>
1399     </condition>
1400     <condition id="CM33_FP_BE_GCC">
1401       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1402       <require condition="CM33_FP_GCC"/>
1403       <require Dendian="Big-endian"/>
1404     </condition>
1405
1406     <condition id="CM33_NODSP_NOFPU_GCC">
1407       <description>CM33, no DSP, no FPU, GCC Compiler</description>
1408       <require condition="CM33_NODSP_NOFPU"/>
1409       <require Tcompiler="GCC"/>
1410     </condition>
1411     <condition id="CM33_DSP_NOFPU_GCC">
1412       <description>CM33, DSP, no FPU, GCC Compiler</description>
1413       <require condition="CM33_DSP_NOFPU"/>
1414       <require Tcompiler="GCC"/>
1415     </condition>
1416     <condition id="CM33_NODSP_SP_GCC">
1417       <description>CM33, no DSP, SP FPU, GCC Compiler</description>
1418       <require condition="CM33_NODSP_SP"/>
1419       <require Tcompiler="GCC"/>
1420     </condition>
1421     <condition id="CM33_DSP_SP_GCC">
1422       <description>CM33, DSP, SP FPU, GCC Compiler</description>
1423       <require condition="CM33_DSP_SP"/>
1424       <require Tcompiler="GCC"/>
1425     </condition>
1426     <condition id="CM33_NODSP_NOFPU_LE_GCC">
1427       <description>CM33, little endian, no DSP, no FPU, GCC Compiler</description>
1428       <require condition="CM33_NODSP_NOFPU_GCC"/>
1429       <require Dendian="Little-endian"/>
1430     </condition>
1431     <condition id="CM33_DSP_NOFPU_LE_GCC">
1432       <description>CM33, little endian, DSP, no FPU, GCC Compiler</description>
1433       <require condition="CM33_DSP_NOFPU_GCC"/>
1434       <require Dendian="Little-endian"/>
1435     </condition>
1436     <condition id="CM33_NODSP_SP_LE_GCC">
1437       <description>CM33, little endian, no DSP, SP FPU, GCC Compiler</description>
1438       <require condition="CM33_NODSP_SP_GCC"/>
1439       <require Dendian="Little-endian"/>
1440     </condition>
1441     <condition id="CM33_DSP_SP_LE_GCC">
1442       <description>CM33, little endian, DSP, SP FPU, GCC Compiler</description>
1443       <require condition="CM33_DSP_SP_GCC"/>
1444       <require Dendian="Little-endian"/>
1445     </condition>
1446
1447     <condition id="ARMv8MBL_GCC">
1448       <description>Armv8-M Baseline processor based device for the GCC Compiler</description>
1449       <require condition="ARMv8MBL"/>
1450       <require Tcompiler="GCC"/>
1451     </condition>
1452     <condition id="ARMv8MBL_LE_GCC">
1453       <description>Armv8-M Baseline processor based device in little endian mode for the GCC Compiler</description>
1454       <require condition="ARMv8MBL_GCC"/>
1455       <require Dendian="Little-endian"/>
1456     </condition>
1457     <condition id="ARMv8MBL_BE_GCC">
1458       <description>Armv8-M Baseline processor based device in big endian mode for the GCC Compiler</description>
1459       <require condition="ARMv8MBL_GCC"/>
1460       <require Dendian="Big-endian"/>
1461     </condition>
1462
1463     <condition id="ARMv8MML_GCC">
1464       <description>Armv8-M Mainline processor based device for the GCC Compiler</description>
1465       <require condition="ARMv8MML"/>
1466       <require Tcompiler="GCC"/>
1467     </condition>
1468     <condition id="ARMv8MML_LE_GCC">
1469       <description>Armv8-M Mainline processor based device in little endian mode for the GCC Compiler</description>
1470       <require condition="ARMv8MML_GCC"/>
1471       <require Dendian="Little-endian"/>
1472     </condition>
1473     <condition id="ARMv8MML_BE_GCC">
1474       <description>Armv8-M Mainline processor based device in big endian mode for the GCC Compiler</description>
1475       <require condition="ARMv8MML_GCC"/>
1476       <require Dendian="Big-endian"/>
1477     </condition>
1478
1479     <condition id="ARMv8MML_FP_GCC">
1480       <description>Armv8-M Mainline processor based device using Floating Point Unit for the GCC Compiler</description>
1481       <require condition="ARMv8MML_FP"/>
1482       <require Tcompiler="GCC"/>
1483     </condition>
1484     <condition id="ARMv8MML_FP_LE_GCC">
1485       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
1486       <require condition="ARMv8MML_FP_GCC"/>
1487       <require Dendian="Little-endian"/>
1488     </condition>
1489     <condition id="ARMv8MML_FP_BE_GCC">
1490       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
1491       <require condition="ARMv8MML_FP_GCC"/>
1492       <require Dendian="Big-endian"/>
1493     </condition>
1494
1495     <condition id="ARMv8MML_NODSP_NOFPU_GCC">
1496       <description>Armv8-M Mainline, no DSP, no FPU, GCC Compiler</description>
1497       <require condition="ARMv8MML_NODSP_NOFPU"/>
1498       <require Tcompiler="GCC"/>
1499     </condition>
1500     <condition id="ARMv8MML_DSP_NOFPU_GCC">
1501       <description>Armv8-M Mainline, DSP, no FPU, GCC Compiler</description>
1502       <require condition="ARMv8MML_DSP_NOFPU"/>
1503       <require Tcompiler="GCC"/>
1504     </condition>
1505     <condition id="ARMv8MML_NODSP_SP_GCC">
1506       <description>Armv8-M Mainline, no DSP, SP FPU, GCC Compiler</description>
1507       <require condition="ARMv8MML_NODSP_SP"/>
1508       <require Tcompiler="GCC"/>
1509     </condition>
1510     <condition id="ARMv8MML_DSP_SP_GCC">
1511       <description>Armv8-M Mainline, DSP, SP FPU, GCC Compiler</description>
1512       <require condition="ARMv8MML_DSP_SP"/>
1513       <require Tcompiler="GCC"/>
1514     </condition>
1515     <condition id="ARMv8MML_NODSP_NOFPU_LE_GCC">
1516       <description>Armv8-M Mainline, little endian, no DSP, no FPU, GCC Compiler</description>
1517       <require condition="ARMv8MML_NODSP_NOFPU_GCC"/>
1518       <require Dendian="Little-endian"/>
1519     </condition>
1520     <condition id="ARMv8MML_DSP_NOFPU_LE_GCC">
1521       <description>Armv8-M Mainline, little endian, DSP, no FPU, GCC Compiler</description>
1522       <require condition="ARMv8MML_DSP_NOFPU_GCC"/>
1523       <require Dendian="Little-endian"/>
1524     </condition>
1525     <condition id="ARMv8MML_NODSP_SP_LE_GCC">
1526       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, GCC Compiler</description>
1527       <require condition="ARMv8MML_NODSP_SP_GCC"/>
1528       <require Dendian="Little-endian"/>
1529     </condition>
1530     <condition id="ARMv8MML_DSP_SP_LE_GCC">
1531       <description>Armv8-M Mainline, little endian, DSP, SP FPU, GCC Compiler</description>
1532       <require condition="ARMv8MML_DSP_SP_GCC"/>
1533       <require Dendian="Little-endian"/>
1534     </condition>
1535
1536     <!-- IAR compiler -->
1537     <condition id="CA_IAR">
1538       <description>Cortex-A5, Cortex-A7 or Cortex-A9 processor based device for the IAR Compiler</description>
1539       <require condition="ARMv7-A Device"/>
1540       <require Tcompiler="IAR"/>
1541     </condition>
1542
1543     <condition id="CM0_IAR">
1544       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device for the IAR Compiler</description>
1545       <require condition="CM0"/>
1546       <require Tcompiler="IAR"/>
1547     </condition>
1548     <condition id="CM0_LE_IAR">
1549       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
1550       <require condition="CM0_IAR"/>
1551       <require Dendian="Little-endian"/>
1552     </condition>
1553     <condition id="CM0_BE_IAR">
1554       <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
1555       <require condition="CM0_IAR"/>
1556       <require Dendian="Big-endian"/>
1557     </condition>
1558
1559     <condition id="CM3_IAR">
1560       <description>Cortex-M3 or SC300 processor based device for the IAR Compiler</description>
1561       <require condition="CM3"/>
1562       <require Tcompiler="IAR"/>
1563     </condition>
1564     <condition id="CM3_LE_IAR">
1565       <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
1566       <require condition="CM3_IAR"/>
1567       <require Dendian="Little-endian"/>
1568     </condition>
1569     <condition id="CM3_BE_IAR">
1570       <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
1571       <require condition="CM3_IAR"/>
1572       <require Dendian="Big-endian"/>
1573     </condition>
1574
1575     <condition id="CM4_IAR">
1576       <description>Cortex-M4 processor based device for the IAR Compiler</description>
1577       <require condition="CM4"/>
1578       <require Tcompiler="IAR"/>
1579     </condition>
1580     <condition id="CM4_LE_IAR">
1581       <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
1582       <require condition="CM4_IAR"/>
1583       <require Dendian="Little-endian"/>
1584     </condition>
1585     <condition id="CM4_BE_IAR">
1586       <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
1587       <require condition="CM4_IAR"/>
1588       <require Dendian="Big-endian"/>
1589     </condition>
1590
1591     <condition id="CM4_FP_IAR">
1592       <description>Cortex-M4 processor based device using Floating Point Unit for the IAR Compiler</description>
1593       <require condition="CM4_FP"/>
1594       <require Tcompiler="IAR"/>
1595     </condition>
1596     <condition id="CM4_FP_LE_IAR">
1597       <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1598       <require condition="CM4_FP_IAR"/>
1599       <require Dendian="Little-endian"/>
1600     </condition>
1601     <condition id="CM4_FP_BE_IAR">
1602       <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1603       <require condition="CM4_FP_IAR"/>
1604       <require Dendian="Big-endian"/>
1605     </condition>
1606
1607     <condition id="CM7_IAR">
1608       <description>Cortex-M7 processor based device for the IAR Compiler</description>
1609       <require condition="CM7"/>
1610       <require Tcompiler="IAR"/>
1611     </condition>
1612     <condition id="CM7_LE_IAR">
1613       <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
1614       <require condition="CM7_IAR"/>
1615       <require Dendian="Little-endian"/>
1616     </condition>
1617     <condition id="CM7_BE_IAR">
1618       <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1619       <require condition="CM7_IAR"/>
1620       <require Dendian="Big-endian"/>
1621     </condition>
1622
1623     <condition id="CM7_FP_IAR">
1624       <description>Cortex-M7 processor based device using Floating Point Unit for the IAR Compiler</description>
1625       <require condition="CM7_FP"/>
1626       <require Tcompiler="IAR"/>
1627     </condition>
1628     <condition id="CM7_FP_LE_IAR">
1629       <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1630       <require condition="CM7_FP_IAR"/>
1631       <require Dendian="Little-endian"/>
1632     </condition>
1633     <condition id="CM7_FP_BE_IAR">
1634       <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1635       <require condition="CM7_FP_IAR"/>
1636       <require Dendian="Big-endian"/>
1637     </condition>
1638
1639     <condition id="CM7_SP_IAR">
1640       <description>Cortex-M7 processor based device using Floating Point Unit (SP) for the IAR Compiler</description>
1641       <require condition="CM7_SP"/>
1642       <require Tcompiler="IAR"/>
1643     </condition>
1644     <condition id="CM7_SP_LE_IAR">
1645       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in little endian mode for the IAR Compiler</description>
1646       <require condition="CM7_SP_IAR"/>
1647       <require Dendian="Little-endian"/>
1648     </condition>
1649     <condition id="CM7_SP_BE_IAR">
1650       <description>Cortex-M7 processor based device using Floating Point Unit (SP) in big endian mode for the IAR Compiler</description>
1651       <require condition="CM7_SP_IAR"/>
1652       <require Dendian="Big-endian"/>
1653     </condition>
1654
1655     <condition id="CM7_DP_IAR">
1656       <description>Cortex-M7 processor based device using Floating Point Unit (DP) for the IAR Compiler</description>
1657       <require condition="CM7_DP"/>
1658       <require Tcompiler="IAR"/>
1659     </condition>
1660     <condition id="CM7_DP_LE_IAR">
1661       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in little endian mode for the IAR Compiler</description>
1662       <require condition="CM7_DP_IAR"/>
1663       <require Dendian="Little-endian"/>
1664     </condition>
1665     <condition id="CM7_DP_BE_IAR">
1666       <description>Cortex-M7 processor based device using Floating Point Unit (DP) in big endian mode for the IAR Compiler</description>
1667       <require condition="CM7_DP_IAR"/>
1668       <require Dendian="Big-endian"/>
1669     </condition>
1670
1671     <condition id="CM23_IAR">
1672       <description>Cortex-M23 processor based device for the IAR Compiler</description>
1673       <require condition="CM23"/>
1674       <require Tcompiler="IAR"/>
1675     </condition>
1676     <condition id="CM23_LE_IAR">
1677       <description>Cortex-M23 processor based device in little endian mode for the IAR Compiler</description>
1678       <require condition="CM23_IAR"/>
1679       <require Dendian="Little-endian"/>
1680     </condition>
1681     <condition id="CM23_BE_IAR">
1682       <description>Cortex-M23 processor based device in big endian mode for the IAR Compiler</description>
1683       <require condition="CM23_IAR"/>
1684       <require Dendian="Big-endian"/>
1685     </condition>
1686
1687     <condition id="CM33_IAR">
1688       <description>Cortex-M33 processor based device for the IAR Compiler</description>
1689       <require condition="CM33"/>
1690       <require Tcompiler="IAR"/>
1691     </condition>
1692     <condition id="CM33_LE_IAR">
1693       <description>Cortex-M33 processor based device in little endian mode for the IAR Compiler</description>
1694       <require condition="CM33_IAR"/>
1695       <require Dendian="Little-endian"/>
1696     </condition>
1697     <condition id="CM33_BE_IAR">
1698       <description>Cortex-M33 processor based device in big endian mode for the IAR Compiler</description>
1699       <require condition="CM33_IAR"/>
1700       <require Dendian="Big-endian"/>
1701     </condition>
1702
1703     <condition id="CM33_FP_IAR">
1704       <description>Cortex-M33 processor based device using Floating Point Unit for the IAR Compiler</description>
1705       <require condition="CM33_FP"/>
1706       <require Tcompiler="IAR"/>
1707     </condition>
1708     <condition id="CM33_FP_LE_IAR">
1709       <description>Cortex-M33 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1710       <require condition="CM33_FP_IAR"/>
1711       <require Dendian="Little-endian"/>
1712     </condition>
1713     <condition id="CM33_FP_BE_IAR">
1714       <description>Cortex-M33 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1715       <require condition="CM33_FP_IAR"/>
1716       <require Dendian="Big-endian"/>
1717     </condition>
1718
1719     <condition id="CM33_NODSP_NOFPU_IAR">
1720       <description>CM33, no DSP, no FPU, IAR Compiler</description>
1721       <require condition="CM33_NODSP_NOFPU"/>
1722       <require Tcompiler="IAR"/>
1723     </condition>
1724     <condition id="CM33_DSP_NOFPU_IAR">
1725       <description>CM33, DSP, no FPU, IAR Compiler</description>
1726       <require condition="CM33_DSP_NOFPU"/>
1727       <require Tcompiler="IAR"/>
1728     </condition>
1729     <condition id="CM33_NODSP_SP_IAR">
1730       <description>CM33, no DSP, SP FPU, IAR Compiler</description>
1731       <require condition="CM33_NODSP_SP"/>
1732       <require Tcompiler="IAR"/>
1733     </condition>
1734     <condition id="CM33_DSP_SP_IAR">
1735       <description>CM33, DSP, SP FPU, IAR Compiler</description>
1736       <require condition="CM33_DSP_SP"/>
1737       <require Tcompiler="IAR"/>
1738     </condition>
1739     <condition id="CM33_NODSP_NOFPU_LE_IAR">
1740       <description>CM33, little endian, no DSP, no FPU, IAR Compiler</description>
1741       <require condition="CM33_NODSP_NOFPU_IAR"/>
1742       <require Dendian="Little-endian"/>
1743     </condition>
1744     <condition id="CM33_DSP_NOFPU_LE_IAR">
1745       <description>CM33, little endian, DSP, no FPU, IAR Compiler</description>
1746       <require condition="CM33_DSP_NOFPU_IAR"/>
1747       <require Dendian="Little-endian"/>
1748     </condition>
1749     <condition id="CM33_NODSP_SP_LE_IAR">
1750       <description>CM33, little endian, no DSP, SP FPU, IAR Compiler</description>
1751       <require condition="CM33_NODSP_SP_IAR"/>
1752       <require Dendian="Little-endian"/>
1753     </condition>
1754     <condition id="CM33_DSP_SP_LE_IAR">
1755       <description>CM33, little endian, DSP, SP FPU, IAR Compiler</description>
1756       <require condition="CM33_DSP_SP_IAR"/>
1757       <require Dendian="Little-endian"/>
1758     </condition>
1759
1760     <condition id="ARMv8MBL_IAR">
1761       <description>Armv8-M Baseline processor based device for the IAR Compiler</description>
1762       <require condition="ARMv8MBL"/>
1763       <require Tcompiler="IAR"/>
1764     </condition>
1765     <condition id="ARMv8MBL_LE_IAR">
1766       <description>Armv8-M Baseline processor based device in little endian mode for the IAR Compiler</description>
1767       <require condition="ARMv8MBL_IAR"/>
1768       <require Dendian="Little-endian"/>
1769     </condition>
1770     <condition id="ARMv8MBL_BE_IAR">
1771       <description>Armv8-M Baseline processor based device in big endian mode for the IAR Compiler</description>
1772       <require condition="ARMv8MBL_IAR"/>
1773       <require Dendian="Big-endian"/>
1774     </condition>
1775
1776     <condition id="ARMv8MML_IAR">
1777       <description>Armv8-M Mainline processor based device for the IAR Compiler</description>
1778       <require condition="ARMv8MML"/>
1779       <require Tcompiler="IAR"/>
1780     </condition>
1781     <condition id="ARMv8MML_LE_IAR">
1782       <description>Armv8-M Mainline processor based device in little endian mode for the IAR Compiler</description>
1783       <require condition="ARMv8MML_IAR"/>
1784       <require Dendian="Little-endian"/>
1785     </condition>
1786     <condition id="ARMv8MML_BE_IAR">
1787       <description>Armv8-M Mainline processor based device in big endian mode for the IAR Compiler</description>
1788       <require condition="ARMv8MML_IAR"/>
1789       <require Dendian="Big-endian"/>
1790     </condition>
1791
1792     <condition id="ARMv8MML_FP_IAR">
1793       <description>Armv8-M Mainline processor based device using Floating Point Unit for the IAR Compiler</description>
1794       <require condition="ARMv8MML_FP"/>
1795       <require Tcompiler="IAR"/>
1796     </condition>
1797     <condition id="ARMv8MML_FP_LE_IAR">
1798       <description>Armv8-M Mainline processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1799       <require condition="ARMv8MML_FP_IAR"/>
1800       <require Dendian="Little-endian"/>
1801     </condition>
1802     <condition id="ARMv8MML_FP_BE_IAR">
1803       <description>Armv8-M Mainline processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1804       <require condition="ARMv8MML_FP_IAR"/>
1805       <require Dendian="Big-endian"/>
1806     </condition>
1807
1808     <condition id="ARMv8MML_NODSP_NOFPU_IAR">
1809       <description>Armv8-M Mainline, no DSP, no FPU, IAR Compiler</description>
1810       <require condition="ARMv8MML_NODSP_NOFPU"/>
1811       <require Tcompiler="IAR"/>
1812     </condition>
1813     <condition id="ARMv8MML_DSP_NOFPU_IAR">
1814       <description>Armv8-M Mainline, DSP, no FPU, IAR Compiler</description>
1815       <require condition="ARMv8MML_DSP_NOFPU"/>
1816       <require Tcompiler="IAR"/>
1817     </condition>
1818     <condition id="ARMv8MML_NODSP_SP_IAR">
1819       <description>Armv8-M Mainline, no DSP, SP FPU, IAR Compiler</description>
1820       <require condition="ARMv8MML_NODSP_SP"/>
1821       <require Tcompiler="IAR"/>
1822     </condition>
1823     <condition id="ARMv8MML_DSP_SP_IAR">
1824       <description>Armv8-M Mainline, DSP, SP FPU, IAR Compiler</description>
1825       <require condition="ARMv8MML_DSP_SP"/>
1826       <require Tcompiler="IAR"/>
1827     </condition>
1828     <condition id="ARMv8MML_NODSP_NOFPU_LE_IAR">
1829       <description>Armv8-M Mainline, little endian, no DSP, no FPU, IAR Compiler</description>
1830       <require condition="ARMv8MML_NODSP_NOFPU_IAR"/>
1831       <require Dendian="Little-endian"/>
1832     </condition>
1833     <condition id="ARMv8MML_DSP_NOFPU_LE_IAR">
1834       <description>Armv8-M Mainline, little endian, DSP, no FPU, IAR Compiler</description>
1835       <require condition="ARMv8MML_DSP_NOFPU_IAR"/>
1836       <require Dendian="Little-endian"/>
1837     </condition>
1838     <condition id="ARMv8MML_NODSP_SP_LE_IAR">
1839       <description>Armv8-M Mainline, little endian, no DSP, SP FPU, IAR Compiler</description>
1840       <require condition="ARMv8MML_NODSP_SP_IAR"/>
1841       <require Dendian="Little-endian"/>
1842     </condition>
1843     <condition id="ARMv8MML_DSP_SP_LE_IAR">
1844       <description>Armv8-M Mainline, little endian, DSP, SP FPU, IAR Compiler</description>
1845       <require condition="ARMv8MML_DSP_SP_IAR"/>
1846       <require Dendian="Little-endian"/>
1847     </condition>
1848
1849     <!-- conditions selecting single devices and CMSIS Core -->
1850     <!-- used for component startup, GCC version is used for C-Startup -->
1851     <condition id="ARMCM0 CMSIS">
1852       <description>Generic Arm Cortex-M0 device startup and depends on CMSIS Core</description>
1853       <require Dvendor="ARM:82" Dname="ARMCM0"/>
1854       <require Cclass="CMSIS" Cgroup="CORE"/>
1855     </condition>
1856     <condition id="ARMCM0 CMSIS GCC">
1857       <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
1858       <require condition="ARMCM0 CMSIS"/>
1859       <require condition="GCC"/>
1860     </condition>
1861
1862     <condition id="ARMCM0+ CMSIS">
1863       <description>Generic Arm Cortex-M0+ device startup and depends on CMSIS Core</description>
1864       <require Dvendor="ARM:82" Dname="ARMCM0P*"/>
1865       <require Cclass="CMSIS" Cgroup="CORE"/>
1866     </condition>
1867     <condition id="ARMCM0+ CMSIS GCC">
1868       <description>Generic Arm Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
1869       <require condition="ARMCM0+ CMSIS"/>
1870       <require condition="GCC"/>
1871     </condition>
1872
1873     <condition id="ARMCM3 CMSIS">
1874       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core</description>
1875       <require Dvendor="ARM:82" Dname="ARMCM3"/>
1876       <require Cclass="CMSIS" Cgroup="CORE"/>
1877     </condition>
1878     <condition id="ARMCM3 CMSIS GCC">
1879       <description>Generic Arm Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
1880       <require condition="ARMCM3 CMSIS"/>
1881       <require condition="GCC"/>
1882     </condition>
1883
1884     <condition id="ARMCM4 CMSIS">
1885       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core</description>
1886       <require Dvendor="ARM:82" Dname="ARMCM4*"/>
1887       <require Cclass="CMSIS" Cgroup="CORE"/>
1888     </condition>
1889     <condition id="ARMCM4 CMSIS GCC">
1890       <description>Generic Arm Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
1891       <require condition="ARMCM4 CMSIS"/>
1892       <require condition="GCC"/>
1893     </condition>
1894
1895     <condition id="ARMCM7 CMSIS">
1896       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core</description>
1897       <require Dvendor="ARM:82" Dname="ARMCM7*"/>
1898       <require Cclass="CMSIS" Cgroup="CORE"/>
1899     </condition>
1900     <condition id="ARMCM7 CMSIS GCC">
1901       <description>Generic Arm Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
1902       <require condition="ARMCM7 CMSIS"/>
1903       <require condition="GCC"/>
1904     </condition>
1905
1906     <condition id="ARMCM23 CMSIS">
1907       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core</description>
1908       <require Dvendor="ARM:82" Dname="ARMCM23*"/>
1909       <require Cclass="CMSIS" Cgroup="CORE"/>
1910     </condition>
1911     <condition id="ARMCM23 CMSIS GCC">
1912       <description>Generic Arm Cortex-M23 device startup and depends on CMSIS Core requiring GCC</description>
1913       <require condition="ARMCM23 CMSIS"/>
1914       <require condition="GCC"/>
1915     </condition>
1916
1917     <condition id="ARMCM33 CMSIS">
1918       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core</description>
1919       <require Dvendor="ARM:82" Dname="ARMCM33*"/>
1920       <require Cclass="CMSIS" Cgroup="CORE"/>
1921     </condition>
1922     <condition id="ARMCM33 CMSIS GCC">
1923       <description>Generic Arm Cortex-M33 device startup and depends on CMSIS Core requiring GCC</description>
1924       <require condition="ARMCM33 CMSIS"/>
1925       <require condition="GCC"/>
1926     </condition>
1927
1928     <condition id="ARMSC000 CMSIS">
1929       <description>Generic Arm SC000 device startup and depends on CMSIS Core</description>
1930       <require Dvendor="ARM:82" Dname="ARMSC000"/>
1931       <require Cclass="CMSIS" Cgroup="CORE"/>
1932     </condition>
1933     <condition id="ARMSC000 CMSIS GCC">
1934       <description>Generic Arm SC000 device startup and depends on CMSIS Core requiring GCC</description>
1935       <require condition="ARMSC000 CMSIS"/>
1936       <require condition="GCC"/>
1937     </condition>
1938
1939     <condition id="ARMSC300 CMSIS">
1940       <description>Generic Arm SC300 device startup and depends on CMSIS Core</description>
1941       <require Dvendor="ARM:82" Dname="ARMSC300"/>
1942       <require Cclass="CMSIS" Cgroup="CORE"/>
1943     </condition>
1944     <condition id="ARMSC300 CMSIS GCC">
1945       <description>Generic Arm SC300 device startup and dependson CMSIS Core requiring GCC</description>
1946       <require condition="ARMSC300 CMSIS"/>
1947       <require condition="GCC"/>
1948     </condition>
1949
1950     <condition id="ARMv8MBL CMSIS">
1951       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core</description>
1952       <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
1953       <require Cclass="CMSIS" Cgroup="CORE"/>
1954     </condition>
1955     <condition id="ARMv8MBL CMSIS GCC">
1956       <description>Generic Armv8-M Baseline device startup and depends on CMSIS Core requiring GCC</description>
1957       <require condition="ARMv8MBL CMSIS"/>
1958       <require condition="GCC"/>
1959     </condition>
1960
1961     <condition id="ARMv8MML CMSIS">
1962       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core</description>
1963       <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
1964       <require Cclass="CMSIS" Cgroup="CORE"/>
1965     </condition>
1966     <condition id="ARMv8MML CMSIS GCC">
1967       <description>Generic Armv8-M Mainline device startup and depends on CMSIS Core requiring GCC</description>
1968       <require condition="ARMv8MML CMSIS"/>
1969       <require condition="GCC"/>
1970     </condition>
1971
1972     <condition id="ARMCA5 CMSIS">
1973       <description>Generic Arm Cortex-A5 device startup and depends on CMSIS Core</description>
1974       <require Dvendor="ARM:82" Dname="ARMCA5"/>
1975       <require Cclass="CMSIS" Cgroup="CORE"/>
1976     </condition>
1977
1978     <condition id="ARMCA7 CMSIS">
1979       <description>Generic Arm Cortex-A7 device startup and depends on CMSIS Core</description>
1980       <require Dvendor="ARM:82" Dname="ARMCA7"/>
1981       <require Cclass="CMSIS" Cgroup="CORE"/>
1982     </condition>
1983
1984     <condition id="ARMCA9 CMSIS">
1985       <description>Generic Arm Cortex-A9 device startup and depends on CMSIS Core</description>
1986       <require Dvendor="ARM:82" Dname="ARMCA9"/>
1987       <require Cclass="CMSIS" Cgroup="CORE"/>
1988     </condition>
1989
1990     <!-- CMSIS DSP -->
1991     <condition id="CMSIS DSP">
1992       <description>Components required for DSP</description>
1993       <require condition="ARMv6_7_8-M Device"/>
1994       <require condition="ARMCC GCC"/>
1995       <require Cclass="CMSIS" Cgroup="CORE"/>
1996     </condition>
1997
1998     <!-- CMSIS NN -->
1999     <condition id="CMSIS NN">
2000       <description>Components required for NN</description>
2001       <require condition="CMSIS DSP"/>
2002     </condition>
2003
2004     <!-- RTOS RTX -->
2005     <condition id="RTOS RTX">
2006       <description>Components required for RTOS RTX</description>
2007       <require condition="ARMv6_7-M Device"/>
2008       <require condition="ARMCC GCC IAR"/>
2009       <require Cclass="Device" Cgroup="Startup"/>
2010       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2011     </condition>
2012     <condition id="RTOS RTX IFX">
2013       <description>Components required for RTOS RTX IFX</description>
2014       <require condition="ARMv6_7-M Device"/>
2015       <require condition="ARMCC GCC IAR"/>
2016       <require Dvendor="Infineon:7" Dname="XMC4*"/>
2017       <require Cclass="Device" Cgroup="Startup"/>
2018       <deny    Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2019     </condition>
2020     <condition id="RTOS RTX5">
2021       <description>Components required for RTOS RTX5</description>
2022       <require condition="ARMv6_7_8-M Device"/>
2023       <require condition="ARMCC GCC IAR"/>
2024       <require Cclass="CMSIS"  Cgroup="RTOS2" Csub="Keil RTX5"/>
2025     </condition>
2026     <condition id="RTOS2 RTX5">
2027       <description>Components required for RTOS2 RTX5</description>
2028       <require condition="ARMv6_7_8-M Device"/>
2029       <require condition="ARMCC GCC IAR"/>
2030       <require Cclass="CMSIS"  Cgroup="CORE"/>
2031       <require Cclass="Device" Cgroup="Startup"/>
2032     </condition>
2033     <condition id="RTOS2 RTX5 v7-A">
2034       <description>Components required for RTOS2 RTX5 on Armv7-A</description>
2035       <require condition="ARMv7-A Device"/>
2036       <require condition="ARMCC GCC IAR"/>
2037       <require Cclass="CMSIS"  Cgroup="CORE"/>
2038       <require Cclass="Device" Cgroup="Startup"/>
2039       <require Cclass="Device" Cgroup="OS Tick"/>
2040       <require Cclass="Device" Cgroup="IRQ Controller"/>
2041     </condition>
2042     <condition id="RTOS2 RTX5 Lib">
2043       <description>Components required for RTOS2 RTX5 Library</description>
2044       <require condition="ARMv6_7_8-M Device"/>
2045       <require condition="ARMCC GCC IAR"/>
2046       <require Cclass="CMSIS"  Cgroup="CORE"/>
2047       <require Cclass="Device" Cgroup="Startup"/>
2048     </condition>
2049     <condition id="RTOS2 RTX5 NS">
2050       <description>Components required for RTOS2 RTX5 in Non-Secure Domain</description>
2051       <require condition="ARMv8-M TZ Device"/>
2052       <require condition="ARMCC GCC IAR"/>
2053       <require Cclass="CMSIS"  Cgroup="CORE"/>
2054       <require Cclass="Device" Cgroup="Startup"/>
2055     </condition>
2056
2057     <!-- OS Tick -->
2058     <condition id="OS Tick PTIM">
2059       <description>Components required for OS Tick Private Timer</description>
2060       <require condition="CA5_CA9"/>
2061       <require Cclass="Device" Cgroup="IRQ Controller"/>
2062     </condition>
2063
2064     <condition id="OS Tick GTIM">
2065       <description>Components required for OS Tick Generic Physical Timer</description>
2066       <require condition="CA7"/>
2067       <require Cclass="Device" Cgroup="IRQ Controller"/>
2068     </condition>
2069
2070   </conditions>
2071
2072   <components>
2073     <!-- CMSIS-Core component -->
2074     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.1.1"  condition="ARMv6_7_8-M Device" >
2075       <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
2076       <files>
2077         <!-- CPU independent -->
2078         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
2079         <file category="include" name="CMSIS/Include/"/>
2080         <file category="header"  name="CMSIS/Include/tz_context.h" condition="ARMv8-M TZ Device"/>
2081         <!-- Code template -->
2082         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.0" select="Secure mode 'main' module for ARMv8-M"/>
2083         <file category="sourceC" attr="template" condition="ARMv8-M TZ Device" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.0" select="RTOS Context Management (TrustZone for ARMv8-M)" />
2084       </files>
2085     </component>
2086
2087     <component Cclass="CMSIS" Cgroup="CORE" Cversion="1.1.1"  condition="ARMv7-A Device" >
2088       <description>CMSIS-CORE for Cortex-A</description>
2089       <files>
2090         <!-- CPU independent -->
2091         <file category="doc"     name="CMSIS/Documentation/Core_A/html/index.html"/>
2092         <file category="include" name="CMSIS/Core_A/Include/"/>
2093       </files>
2094     </component>
2095
2096     <!-- CMSIS-Startup components -->
2097     <!-- Cortex-M0 -->
2098     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0 CMSIS">
2099       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2100       <files>
2101         <!-- include folder / device header file -->
2102         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2103         <!-- startup / system file -->
2104         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
2105         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
2106         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2107         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
2108         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2109       </files>
2110     </component>
2111     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
2112       <description>System and Startup for Generic Arm Cortex-M0 device</description>
2113       <files>
2114         <!-- include folder / device header file -->
2115         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
2116         <!-- startup / system file -->
2117         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
2118         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2119         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
2120       </files>
2121     </component>
2122
2123     <!-- Cortex-M0+ -->
2124     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM0+ CMSIS">
2125       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2126       <files>
2127         <!-- include folder / device header file -->
2128         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2129         <!-- startup / system file -->
2130         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
2131         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
2132         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2133         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
2134         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2135       </files>
2136     </component>
2137     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
2138       <description>System and Startup for Generic Arm Cortex-M0+ device</description>
2139       <files>
2140         <!-- include folder / device header file -->
2141         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
2142         <!-- startup / system file -->
2143         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
2144         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="1.0.0" attr="config" condition="GCC"/>
2145         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
2146       </files>
2147     </component>
2148
2149     <!-- Cortex-M3 -->
2150     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM3 CMSIS">
2151       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2152       <files>
2153         <!-- include folder / device header file -->
2154         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2155         <!-- startup / system file -->
2156         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
2157         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
2158         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2159         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
2160         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2161       </files>
2162     </component>
2163     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
2164       <description>System and Startup for Generic Arm Cortex-M3 device</description>
2165       <files>
2166         <!-- include folder / device header file -->
2167         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
2168         <!-- startup / system file -->
2169         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
2170         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2171         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.0" attr="config"/>
2172       </files>
2173     </component>
2174
2175     <!-- Cortex-M4 -->
2176     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM4 CMSIS">
2177       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2178       <files>
2179         <!-- include folder / device header file -->
2180         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2181         <!-- startup / system file -->
2182         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
2183         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
2184         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2185         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
2186         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2187       </files>
2188     </component>
2189     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
2190       <description>System and Startup for Generic Arm Cortex-M4 device</description>
2191       <files>
2192         <!-- include folder / device header file -->
2193         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
2194         <!-- startup / system file -->
2195         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
2196         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2197         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.0" attr="config"/>
2198       </files>
2199     </component>
2200
2201     <!-- Cortex-M7 -->
2202     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCM7 CMSIS">
2203       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2204       <files>
2205         <!-- include folder / device header file -->
2206         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2207         <!-- startup / system file -->
2208         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
2209         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
2210         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2211         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
2212         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2213       </files>
2214     </component>
2215     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
2216       <description>System and Startup for Generic Arm Cortex-M7 device</description>
2217       <files>
2218         <!-- include folder / device header file -->
2219         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
2220         <!-- startup / system file -->
2221         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
2222         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="1.0.0" attr="config" condition="GCC"/>
2223         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.0" attr="config"/>
2224       </files>
2225     </component>
2226
2227     <!-- Cortex-M23 -->
2228     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCM23 CMSIS">
2229       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2230       <files>
2231         <!-- include folder / device header file -->
2232         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
2233         <!-- startup / system file -->
2234         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.0" attr="config" condition="ARMCC"/>
2235         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="1.0.0" attr="config" condition="GCC"/>
2236         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2237         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
2238         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2239         <!-- SAU configuration -->
2240         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2241       </files>
2242     </component>
2243     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMCM23 CMSIS GCC">
2244       <description>System and Startup for Generic Arm Cortex-M23 device</description>
2245       <files>
2246         <!-- include folder / device header file -->
2247         <file category="include"  name="Device/ARM/ARMCM23/Include/"/>
2248         <!-- startup / system file -->
2249         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.c" version="1.0.0" attr="config" condition="GCC"/>
2250         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="1.0.0" attr="config" condition="GCC"/>
2251         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.0" attr="config"/>
2252         <!-- SAU configuration -->
2253         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2254       </files>
2255     </component>
2256
2257     <!-- Cortex-M33 -->
2258     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMCM33 CMSIS">
2259       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2260       <files>
2261         <!-- include folder / device header file -->
2262         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
2263         <!-- startup / system file -->
2264         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2265         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="1.0.0" attr="config" condition="GCC"/>
2266         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2267         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
2268         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2269         <!-- SAU configuration -->
2270         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2271       </files>
2272     </component>
2273     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMCM33 CMSIS GCC">
2274       <description>System and Startup for Generic Arm Cortex-M33 device</description>
2275       <files>
2276         <!-- include folder / device header file -->
2277         <file category="include"  name="Device/ARM/ARMCM33/Include/"/>
2278         <!-- startup / system file -->
2279         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.c"         version="1.0.0" attr="config" condition="GCC"/>
2280         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
2281         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.0" attr="config"/>
2282         <!-- SAU configuration -->
2283         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2284       </files>
2285     </component>
2286
2287     <!-- Cortex-SC000 -->
2288     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC000 CMSIS">
2289       <description>System and Startup for Generic Arm SC000 device</description>
2290       <files>
2291         <!-- include folder / device header file -->
2292         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2293         <!-- startup / system file -->
2294         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
2295         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
2296         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2297         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
2298         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2299       </files>
2300     </component>
2301     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
2302       <description>System and Startup for Generic Arm SC000 device</description>
2303       <files>
2304         <!-- include folder / device header file -->
2305         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
2306         <!-- startup / system file -->
2307         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
2308         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2309         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
2310       </files>
2311     </component>
2312
2313     <!-- Cortex-SC300 -->
2314     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMSC300 CMSIS">
2315       <description>System and Startup for Generic Arm SC300 device</description>
2316       <files>
2317         <!-- include folder / device header file -->
2318         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2319         <!-- startup / system file -->
2320         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
2321         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
2322         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2323         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
2324         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2325       </files>
2326     </component>
2327     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
2328       <description>System and Startup for Generic Arm SC300 device</description>
2329       <files>
2330         <!-- include folder / device header file -->
2331         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
2332         <!-- startup / system file -->
2333         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
2334         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2335         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.0" attr="config"/>
2336       </files>
2337     </component>
2338
2339     <!-- ARMv8MBL -->
2340     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMv8MBL CMSIS">
2341       <description>System and Startup for Generic Armv8-M Baseline device</description>
2342       <files>
2343         <!-- include folder / device header file -->
2344         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
2345         <!-- startup / system file -->
2346         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
2347         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
2348         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2349         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config" condition="ARMCC GCC"/>
2350         <!-- SAU configuration -->
2351         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
2352       </files>
2353     </component>
2354     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
2355       <description>System and Startup for Generic Armv8-M Baseline device</description>
2356       <files>
2357         <!-- include folder / device header file -->
2358         <file category="include"  name="Device/ARM/ARMv8MBL/Include/"/>
2359         <!-- startup / system file -->
2360         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
2361         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="1.0.0" attr="config" condition="GCC"/>
2362         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.0" attr="config"/>
2363         <!-- SAU configuration -->
2364         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="ARMv8-M TZ Device"/>
2365       </files>
2366     </component>
2367
2368     <!-- ARMv8MML -->
2369     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.1.0" condition="ARMv8MML CMSIS">
2370       <description>System and Startup for Generic Armv8-M Mainline device</description>
2371       <files>
2372         <!-- include folder / device header file -->
2373         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2374         <!-- startup / system file -->
2375         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.0" attr="config" condition="ARMCC"/>
2376         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="1.0.0" attr="config" condition="GCC"/>
2377         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2378         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config" condition="ARMCC GCC"/>
2379         <!-- SAU configuration -->
2380         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2381       </files>
2382     </component>
2383     <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.1.0" condition="ARMv8MML CMSIS GCC">
2384       <description>System and Startup for Generic Armv8-M Mainline device</description>
2385       <files>
2386         <!-- include folder / device header file -->
2387         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
2388         <!-- startup / system file -->
2389         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c"         version="1.0.0" attr="config" condition="GCC"/>
2390         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="1.0.0" attr="config" condition="GCC"/>
2391         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.0" attr="config"/>
2392         <!-- SAU configuration -->
2393         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.0" attr="config" condition="ARMv8-M TZ Device"/>
2394       </files>
2395     </component>
2396
2397     <!-- Cortex-A5 -->
2398     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA5 CMSIS">
2399       <description>System and Startup for Generic Arm Cortex-A5 device</description>
2400       <files>
2401         <!-- include folder / device header file -->
2402         <file category="include"      name="Device/ARM/ARMCA5/Include/"/>
2403         <!-- startup / system / mmu files -->
2404         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2405         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC5/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2406         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2407         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/AC6/ARMCA5.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2408         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c" version="1.0.0" attr="config" condition="GCC"/>
2409         <file category="other"        name="Device/ARM/ARMCA5/Source/GCC/ARMCA5.ld"        version="1.0.0" attr="config" condition="GCC"/>
2410         <file category="sourceAsm"    name="Device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s" version="1.0.0" attr="config" condition="IAR"/>
2411         <file category="linkerScript" name="Device/ARM/ARMCA5/Source/IAR/ARMCA5.icf"       version="1.0.0" attr="config" condition="IAR"/>
2412         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/system_ARMCA5.c"      version="1.0.0" attr="config"/>
2413         <file category="sourceC"      name="Device/ARM/ARMCA5/Source/mmu_ARMCA5.c"         version="1.0.0" attr="config"/>
2414         <file category="header"       name="Device/ARM/ARMCA5/Include/system_ARMCA5.h"     version="1.0.0" attr="config"/>
2415         <file category="header"       name="Device/ARM/ARMCA5/Include/mem_ARMCA5.h"        version="1.0.0" attr="config"/>
2416
2417       </files>
2418     </component>
2419
2420     <!-- Cortex-A7 -->
2421     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.0" condition="ARMCA7 CMSIS">
2422       <description>System and Startup for Generic Arm Cortex-A7 device</description>
2423       <files>
2424         <!-- include folder / device header file -->
2425         <file category="include"      name="Device/ARM/ARMCA7/Include/"/>
2426         <!-- startup / system / mmu files -->
2427         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2428         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC5/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2429         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2430         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/AC6/ARMCA7.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2431         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c" version="1.0.0" attr="config" condition="GCC"/>
2432         <file category="other"        name="Device/ARM/ARMCA7/Source/GCC/ARMCA7.ld"        version="1.0.0" attr="config" condition="GCC"/>
2433         <file category="sourceAsm"    name="Device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s" version="1.0.0" attr="config" condition="IAR"/>
2434         <file category="linkerScript" name="Device/ARM/ARMCA7/Source/IAR/ARMCA7.icf"       version="1.0.0" attr="config" condition="IAR"/>
2435         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/system_ARMCA7.c"      version="1.0.0" attr="config"/>
2436         <file category="sourceC"      name="Device/ARM/ARMCA7/Source/mmu_ARMCA7.c"         version="1.0.0" attr="config"/>
2437         <file category="header"       name="Device/ARM/ARMCA7/Include/system_ARMCA7.h"     version="1.0.0" attr="config"/>
2438         <file category="header"       name="Device/ARM/ARMCA7/Include/mem_ARMCA7.h"        version="1.0.0" attr="config"/>
2439       </files>
2440     </component>
2441
2442     <!-- Cortex-A9 -->
2443     <component Cclass="Device" Cgroup="Startup"                      Cversion="1.0.1" condition="ARMCA9 CMSIS">
2444       <description>System and Startup for Generic Arm Cortex-A9 device</description>
2445       <files>
2446         <!-- include folder / device header file -->
2447         <file category="include"  name="Device/ARM/ARMCA9/Include/"/>
2448         <!-- startup / system / mmu files -->
2449         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC5"/>
2450         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC5/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC5"/>
2451         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c" version="1.0.0" attr="config" condition="ARMCC6"/>
2452         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/AC6/ARMCA9.sct"       version="1.0.0" attr="config" condition="ARMCC6"/>
2453         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c" version="1.0.0" attr="config" condition="GCC"/>
2454         <file category="other"        name="Device/ARM/ARMCA9/Source/GCC/ARMCA9.ld"        version="1.0.0" attr="config" condition="GCC"/>
2455         <file category="sourceAsm"    name="Device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s" version="1.0.0" attr="config" condition="IAR"/>
2456         <file category="linkerScript" name="Device/ARM/ARMCA9/Source/IAR/ARMCA9.icf"       version="1.0.0" attr="config" condition="IAR"/>
2457         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/system_ARMCA9.c"      version="1.0.0" attr="config"/>
2458         <file category="sourceC"      name="Device/ARM/ARMCA9/Source/mmu_ARMCA9.c"         version="1.0.0" attr="config"/>
2459         <file category="header"       name="Device/ARM/ARMCA9/Include/system_ARMCA9.h"     version="1.0.0" attr="config"/>
2460         <file category="header"       name="Device/ARM/ARMCA9/Include/mem_ARMCA9.h"        version="1.0.0" attr="config"/>
2461       </files>
2462     </component>
2463
2464     <!-- IRQ Controller -->
2465     <component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.0.0" condition="ARMv7-A Device">
2466       <description>IRQ Controller implementation using GIC</description>
2467       <files>
2468         <file category="sourceC" name="CMSIS/Core_A/Source/irq_ctrl_gic.c"/>
2469       </files>
2470     </component>
2471
2472     <!-- OS Tick -->
2473     <component Cclass="Device" Cgroup="OS Tick" Csub="Private Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick PTIM">
2474       <description>OS Tick implementation using Private Timer</description>
2475       <files>
2476         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_ptim.c"/>
2477       </files>
2478     </component>
2479
2480     <component Cclass="Device" Cgroup="OS Tick" Csub="Generic Physical Timer" Capiversion="1.0.1" Cversion="1.0.1" condition="OS Tick GTIM">
2481       <description>OS Tick implementation using Generic Physical Timer</description>
2482       <files>
2483         <file category="sourceC" name="CMSIS/RTOS2/Source/os_tick_gtim.c"/>
2484       </files>
2485     </component>
2486
2487     <!-- CMSIS-DSP component -->
2488     <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.5.2" condition="CMSIS DSP">
2489       <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
2490       <files>
2491         <!-- CPU independent -->
2492         <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
2493         <file category="header" name="CMSIS/Include/arm_math.h"/>
2494
2495         <!-- CPU and Compiler dependent -->
2496         <!-- ARMCC -->
2497         <file category="library" condition="CM0_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2498         <file category="library" condition="CM0_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2499         <file category="library" condition="CM3_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2500         <file category="library" condition="CM3_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2501         <file category="library" condition="CM4_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2502         <file category="library" condition="CM4_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2503         <file category="library" condition="CM4_FP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2504         <file category="library" condition="CM4_FP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2505         <file category="library" condition="CM7_LE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2506         <file category="library" condition="CM7_BE_ARMCC"             name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2507         <file category="library" condition="CM7_SP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2508         <file category="library" condition="CM7_SP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2509         <file category="library" condition="CM7_DP_LE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2510         <file category="library" condition="CM7_DP_BE_ARMCC"          name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2511
2512         <file category="library" condition="CM23_LE_ARMCC"                  name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2513         <file category="library" condition="CM33_NODSP_NOFPU_LE_ARMCC"      name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2514         <file category="library" condition="CM33_DSP_NOFPU_LE_ARMCC"        name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2515         <file category="library" condition="CM33_NODSP_SP_LE_ARMCC"         name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2516         <file category="library" condition="CM33_DSP_SP_LE_ARMCC"           name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2517         <file category="library" condition="ARMv8MBL_LE_ARMCC"              name="CMSIS/Lib/ARM/arm_ARMv8MBLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2518         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_ARMCC"  name="CMSIS/Lib/ARM/arm_ARMv8MMLl_math.lib"      src="CMSIS/DSP_Lib/Source/ARM"/>
2519         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_ARMCC"    name="CMSIS/Lib/ARM/arm_ARMv8MMLld_math.lib"     src="CMSIS/DSP_Lib/Source/ARM"/>
2520         <file category="library" condition="ARMv8MML_NODSP_SP_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfsp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/>
2521         <file category="library" condition="ARMv8MML_DSP_SP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfsp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/>
2522         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_ARMCC"     name="CMSIS/Lib/ARM/arm_ARMv8MMLlfdp_math.lib"   src="CMSIS/DSP_Lib/Source/ARM"/-->
2523         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_ARMCC"       name="CMSIS/Lib/ARM/arm_ARMv8MMLldfdp_math.lib"  src="CMSIS/DSP_Lib/Source/ARM"/-->
2524
2525         <!-- GCC -->
2526         <file category="library" condition="CM0_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2527         <file category="library" condition="CM3_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2528         <file category="library" condition="CM4_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2529         <file category="library" condition="CM4_FP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2530         <file category="library" condition="CM7_LE_GCC"               name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2531         <file category="library" condition="CM7_SP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2532         <file category="library" condition="CM7_DP_LE_GCC"            name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2533
2534         <file category="library" condition="CM23_LE_GCC"                    name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2535         <file category="library" condition="CM33_NODSP_NOFPU_LE_GCC"        name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2536         <file category="library" condition="CM33_DSP_NOFPU_LE_GCC"          name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2537         <file category="library" condition="CM33_NODSP_SP_LE_GCC"           name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2538         <file category="library" condition="CM33_DSP_SP_LE_GCC"             name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2539         <file category="library" condition="ARMv8MBL_LE_GCC"                name="CMSIS/Lib/GCC/libarm_ARMv8MBLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2540         <file category="library" condition="ARMv8MML_NODSP_NOFPU_LE_GCC"    name="CMSIS/Lib/GCC/libarm_ARMv8MMLl_math.a"     src="CMSIS/DSP_Lib/Source/GCC"/>
2541         <file category="library" condition="ARMv8MML_DSP_NOFPU_LE_GCC"      name="CMSIS/Lib/GCC/libarm_ARMv8MMLld_math.a"    src="CMSIS/DSP_Lib/Source/GCC"/>
2542         <file category="library" condition="ARMv8MML_NODSP_SP_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfsp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/>
2543         <file category="library" condition="ARMv8MML_DSP_SP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
2544         <!--file category="library" condition="ARMv8MML_DP_NOFPU_LE_GCC"       name="CMSIS/Lib/GCC/libarm_ARMv8MMLlfdp_math.a"  src="CMSIS/DSP_Lib/Source/GCC"/-->
2545         <!--file category="library" condition="ARMv8MML_DSP_DP_LE_GCC"         name="CMSIS/Lib/GCC/libarm_ARMv8MMLldfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/-->
2546
2547       </files>
2548     </component>
2549
2550     <!-- CMSIS-NN component -->
2551     <component Cclass="CMSIS" Cgroup="NN Lib" Cversion="1.0.0" condition="CMSIS NN">
2552       <description>CMSIS-NN Neural Network Library</description>
2553       <files>
2554         <file category="doc" name="CMSIS/Documentation/NN/html/index.html"/>
2555         <file category="header" name="CMSIS/NN/Include/arm_nnfunctions.h"/>
2556
2557         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c"/>
2558         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c"/>
2559         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c"/>
2560         <file category="source" name="CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c"/>
2561
2562         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c"/>
2563         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c"/>
2564         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c"/>
2565         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c"/>
2566         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c"/>
2567         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c"/>
2568         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c"/>
2569         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c"/>
2570         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c"/>
2571         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c"/>
2572         <file category="source" name="CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c"/>
2573
2574         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c"/>
2575         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c"/>
2576         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c"/>
2577         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c"/>
2578         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c"/>
2579         <file category="source" name="CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c"/>
2580
2581         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c"/>
2582         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c"/>
2583         <file category="source" name="CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c"/>
2584
2585         <file category="source" name="CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c"/>
2586
2587         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c"/>
2588         <file category="source" name="CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c"/>
2589       </files>
2590     </component>
2591
2592     <!-- CMSIS-RTOS Keil RTX component -->
2593     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.1" Capiversion="1.0.0" isDefaultVariant="1" condition="RTOS RTX">
2594       <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
2595       <RTE_Components_h>
2596         <!-- the following content goes into file 'RTE_Components.h' -->
2597         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2598         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2599       </RTE_Components_h>
2600       <files>
2601         <!-- CPU independent -->
2602         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2603         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2604         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2605
2606         <!-- RTX templates -->
2607         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2608         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2609         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2610         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2611         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2612         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2613         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2614         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2615         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2616         <!-- tool-chain specific template file -->
2617         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2618         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2619         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2620
2621         <!-- CPU and Compiler dependent -->
2622         <!-- ARMCC -->
2623         <file category="library" condition="CM0_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2624         <file category="library" condition="CM0_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2625         <file category="library" condition="CM3_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2626         <file category="library" condition="CM3_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2627         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2628         <file category="library" condition="CM4_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2629         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2630         <file category="library" condition="CM4_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2631         <file category="library" condition="CM7_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2632         <file category="library" condition="CM7_BE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2633         <file category="library" condition="CM7_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib"    src="CMSIS/RTOS/RTX/SRC/ARM"/>
2634         <file category="library" condition="CM7_FP_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2635         <!-- GCC -->
2636         <file category="library" condition="CM0_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2637         <file category="library" condition="CM0_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2638         <file category="library" condition="CM3_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2639         <file category="library" condition="CM3_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2640         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2641         <file category="library" condition="CM4_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2642         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2643         <file category="library" condition="CM4_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2644         <file category="library" condition="CM7_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2645         <file category="library" condition="CM7_BE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2646         <file category="library" condition="CM7_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a"   src="CMSIS/RTOS/RTX/SRC/GCC"/>
2647         <file category="library" condition="CM7_FP_BE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2648         <!-- IAR -->
2649         <file category="library" condition="CM0_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2650         <file category="library" condition="CM0_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2651         <file category="library" condition="CM3_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2652         <file category="library" condition="CM3_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2653         <file category="library" condition="CM4_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2654         <file category="library" condition="CM4_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2655         <file category="library" condition="CM4_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2656         <file category="library" condition="CM4_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2657         <file category="library" condition="CM7_LE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2658         <file category="library" condition="CM7_BE_IAR"      name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2659         <file category="library" condition="CM7_FP_LE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a"      src="CMSIS/RTOS/RTX/SRC/IAR"/>
2660         <file category="library" condition="CM7_FP_BE_IAR"   name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a"    src="CMSIS/RTOS/RTX/SRC/IAR"/>
2661       </files>
2662     </component>
2663     <!-- CMSIS-RTOS Keil RTX component (IFX variant) -->
2664     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cvariant="IFX" Cversion="4.81.1" Capiversion="1.0.0" condition="RTOS RTX IFX">
2665       <description>CMSIS-RTOS RTX implementation for Infineon XMC4 series affected by PMU_CM.001 errata</description>
2666       <RTE_Components_h>
2667         <!-- the following content goes into file 'RTE_Components.h' -->
2668         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2669         #define RTE_CMSIS_RTOS_RTX              /* CMSIS-RTOS Keil RTX */
2670       </RTE_Components_h>
2671       <files>
2672         <!-- CPU independent -->
2673         <file category="doc" name="CMSIS/Documentation/RTOS/html/rtxImplementation.html"/>
2674         <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
2675         <file category="source" attr="config"   name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
2676
2677         <!-- RTX templates -->
2678         <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
2679         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c"      select="CMSIS-RTOS 'main' function"/>
2680         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
2681         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c"   select="CMSIS-RTOS Memory Pool"/>
2682         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c"  select="CMSIS-RTOS Message Queue"/>
2683         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c"     select="CMSIS-RTOS Mutex"/>
2684         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
2685         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c"    select="CMSIS-RTOS Thread"/>
2686         <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c"     select="CMSIS-RTOS Timer"/>
2687         <!-- tool-chain specific template file -->
2688         <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2689         <file category="source" attr="template" condition="GCC"   name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
2690         <file category="source" attr="template" condition="IAR"   name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
2691
2692         <!-- CPU and Compiler dependent -->
2693         <!-- ARMCC -->
2694         <file category="library" condition="CM4_LE_ARMCC"    name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2695         <file category="library" condition="CM4_FP_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib"  src="CMSIS/RTOS/RTX/SRC/ARM"/>
2696         <!-- GCC -->
2697         <file category="library" condition="CM4_LE_GCC"      name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2698         <file category="library" condition="CM4_FP_LE_GCC"   name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
2699         <!-- IAR -->
2700       </files>
2701     </component>
2702
2703     <!-- CMSIS-RTOS Keil RTX5 component -->
2704     <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.3.0" Capiversion="1.0.0" condition="RTOS RTX5">
2705       <description>CMSIS-RTOS RTX5 implementation for Cortex-M, SC000, and SC300</description>
2706       <RTE_Components_h>
2707         <!-- the following content goes into file 'RTE_Components.h' -->
2708         #define RTE_CMSIS_RTOS                  /* CMSIS-RTOS */
2709         #define RTE_CMSIS_RTOS_RTX5             /* CMSIS-RTOS Keil RTX5 */
2710       </RTE_Components_h>
2711       <files>
2712         <!-- RTX header file -->
2713         <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
2714         <!-- RTX compatibility module for API V1 -->
2715         <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
2716       </files>
2717     </component>
2718
2719     <!-- CMSIS-RTOS2 Keil RTX5 component -->
2720     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 Lib">
2721       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Library)</description>
2722       <RTE_Components_h>
2723         <!-- the following content goes into file 'RTE_Components.h' -->
2724         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2725         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2726       </RTE_Components_h>
2727       <files>
2728         <!-- RTX documentation -->
2729         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2730
2731         <!-- RTX header files -->
2732         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2733
2734         <!-- RTX configuration -->
2735         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2736         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2737
2738         <!-- RTX templates -->
2739         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2740         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2741         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2742         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2743         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2744         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2745         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2746         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2747         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2748         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2749
2750         <!-- RTX library configuration -->
2751         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2752
2753         <!-- RTX libraries (CPU and Compiler dependent) -->
2754         <!-- ARMCC -->
2755         <file category="library" condition="CM0_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2756         <file category="library" condition="CM3_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2757         <file category="library" condition="CM4_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2758         <file category="library" condition="CM4_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2759         <file category="library" condition="CM7_LE_ARMCC"         name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib"    src="CMSIS/RTOS2/RTX/Source"/>
2760         <file category="library" condition="CM7_FP_LE_ARMCC"      name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2761         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2762         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2763         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2764         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MB.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2765         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MM.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2766         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMF.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2767         <!-- GCC -->
2768         <file category="library" condition="CM0_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a"   src="CMSIS/RTOS2/RTX/Source"/>
2769         <file category="library" condition="CM3_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2770         <file category="library" condition="CM4_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2771         <file category="library" condition="CM4_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2772         <file category="library" condition="CM7_LE_GCC"           name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a"   src="CMSIS/RTOS2/RTX/Source"/>
2773         <file category="library" condition="CM7_FP_LE_GCC"        name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a"  src="CMSIS/RTOS2/RTX/Source"/>
2774         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2775         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2776         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2777         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MB.a"  src="CMSIS/RTOS2/RTX/Source"/>
2778         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MM.a"  src="CMSIS/RTOS2/RTX/Source"/>
2779         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMF.a" src="CMSIS/RTOS2/RTX/Source"/>
2780         <!-- IAR -->
2781         <file category="library" condition="CM0_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM0.a"      src="CMSIS/RTOS2/RTX/Source"/>
2782         <file category="library" condition="CM3_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2783         <file category="library" condition="CM4_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2784         <file category="library" condition="CM4_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2785         <file category="library" condition="CM7_LE_IAR"           name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM3.a"      src="CMSIS/RTOS2/RTX/Source"/>
2786         <file category="library" condition="CM7_FP_LE_IAR"        name="CMSIS/RTOS2/RTX/Library/IAR/RTX_CM4F.a"     src="CMSIS/RTOS2/RTX/Source"/>
2787       </files>
2788     </component>
2789     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Library_NS" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2790       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Library)</description>
2791       <RTE_Components_h>
2792         <!-- the following content goes into file 'RTE_Components.h' -->
2793         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2794         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2795         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2796       </RTE_Components_h>
2797       <files>
2798         <!-- RTX documentation -->
2799         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2800
2801         <!-- RTX header files -->
2802         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2803
2804         <!-- RTX configuration -->
2805         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2806         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2807
2808         <!-- RTX templates -->
2809         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2810         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2811         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2812         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2813         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2814         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2815         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2816         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2817         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2818         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2819
2820         <!-- RTX library configuration -->
2821         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2822
2823         <!-- RTX libraries (CPU and Compiler dependent) -->
2824         <!-- ARMCC -->
2825         <file category="library" condition="CM23_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2826         <file category="library" condition="CM33_LE_ARMCC"        name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2827         <file category="library" condition="CM33_FP_LE_ARMCC"     name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2828         <file category="library" condition="ARMv8MBL_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MBN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2829         <file category="library" condition="ARMv8MML_LE_ARMCC"    name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMN.lib"   src="CMSIS/RTOS2/RTX/Source"/>
2830         <file category="library" condition="ARMv8MML_FP_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_V8MMFN.lib"  src="CMSIS/RTOS2/RTX/Source"/>
2831         <!-- GCC -->
2832         <file category="library" condition="CM23_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2833         <file category="library" condition="CM33_LE_GCC"          name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2834         <file category="library" condition="CM33_FP_LE_GCC"       name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2835         <file category="library" condition="ARMv8MBL_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MBN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2836         <file category="library" condition="ARMv8MML_LE_GCC"      name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMN.a"  src="CMSIS/RTOS2/RTX/Source"/>
2837         <file category="library" condition="ARMv8MML_FP_LE_GCC"   name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_V8MMFN.a" src="CMSIS/RTOS2/RTX/Source"/>
2838       </files>
2839     </component>
2840     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5">
2841       <description>CMSIS-RTOS2 RTX5 for Cortex-M, SC000, C300 and Armv8-M (Source)</description>
2842       <RTE_Components_h>
2843         <!-- the following content goes into file 'RTE_Components.h' -->
2844         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2845         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2846         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2847       </RTE_Components_h>
2848       <files>
2849         <!-- RTX documentation -->
2850         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2851
2852         <!-- RTX header files -->
2853         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2854
2855         <!-- RTX configuration -->
2856         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2857         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2858
2859         <!-- RTX templates -->
2860         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2861         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2862         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2863         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2864         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2865         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2866         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2867         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2868         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2869         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2870
2871         <!-- RTX sources (core) -->
2872         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2873         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2874         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2875         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2876         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2877         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2878         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2879         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2880         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2881         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2882         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2883         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2884         <!-- RTX sources (library configuration) -->
2885         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2886         <!-- RTX sources (handlers ARMCC) -->
2887         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s"         condition="CM0_ARMCC"/>
2888         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM3_ARMCC"/>
2889         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM4_ARMCC"/>
2890         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM4_FP_ARMCC"/>
2891         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s"         condition="CM7_ARMCC"/>
2892         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s"        condition="CM7_FP_ARMCC"/>
2893         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="CM23_ARMCC"/>
2894         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_ARMCC"/>
2895         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="CM33_FP_ARMCC"/>
2896         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl.s"    condition="ARMv8MBL_ARMCC"/>
2897         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_ARMCC"/>
2898         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml.s"    condition="ARMv8MML_FP_ARMCC"/>
2899         <!-- RTX sources (handlers GCC) -->
2900         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.S"         condition="CM0_GCC"/>
2901         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM3_GCC"/>
2902         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM4_GCC"/>
2903         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM4_FP_GCC"/>
2904         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.S"         condition="CM7_GCC"/>
2905         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.S"        condition="CM7_FP_GCC"/>
2906         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="CM23_GCC"/>
2907         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="CM33_GCC"/>
2908         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="CM33_FP_GCC"/>
2909         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl.S"    condition="ARMv8MBL_GCC"/>
2910         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml.S"    condition="ARMv8MML_GCC"/>
2911         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp.S" condition="ARMv8MML_FP_GCC"/>
2912         <!-- RTX sources (handlers IAR) -->
2913         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s"         condition="CM0_IAR"/>
2914         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM3_IAR"/>
2915         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM4_IAR"/>
2916         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM4_FP_IAR"/>
2917         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s"         condition="CM7_IAR"/>
2918         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s"        condition="CM7_FP_IAR"/>
2919         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="CM23_IAR"/>
2920         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_IAR"/>
2921         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="CM33_FP_IAR"/>
2922         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl.s"    condition="ARMv8MBL_IAR"/>
2923         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_IAR"/>
2924         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml.s"    condition="ARMv8MML_FP_IAR"/>
2925         <!-- OS Tick (SysTick) -->
2926         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
2927       </files>
2928     </component>
2929     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 v7-A">
2930       <description>CMSIS-RTOS2 RTX5 for Armv7-A (Source)</description>
2931       <RTE_Components_h>
2932         <!-- the following content goes into file 'RTE_Components.h' -->
2933         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2934         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2935         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2936       </RTE_Components_h>
2937       <files>
2938         <!-- RTX documentation -->
2939         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2940
2941         <!-- RTX header files -->
2942         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
2943
2944         <!-- RTX configuration -->
2945         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
2946         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
2947
2948         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/handlers.c"    version="5.1.0"/>
2949
2950         <!-- RTX templates -->
2951         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
2952         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
2953         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
2954         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
2955         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
2956         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
2957         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
2958         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
2959         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
2960         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
2961
2962         <!-- RTX sources (core) -->
2963         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
2964         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
2965         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
2966         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
2967         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
2968         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
2969         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
2970         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
2971         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
2972         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
2973         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
2974         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
2975         <!-- RTX sources (library configuration) -->
2976         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
2977         <!-- RTX sources (handlers ARMCC) -->
2978         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_ca.s"          condition="CA_ARMCC5"/>
2979         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_ARMCC6"/>
2980         <!-- RTX sources (handlers GCC) -->
2981         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_ca.S"          condition="CA_GCC"/>
2982         <!-- RTX sources (handlers IAR) -->
2983         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_ca.s"          condition="CA_IAR"/>
2984       </files>
2985     </component>
2986     <component Cclass="CMSIS" Cgroup="RTOS2" Csub="Keil RTX5" Cvariant="Source_NS" Cversion="5.3.0" Capiversion="2.1.2" condition="RTOS2 RTX5 NS">
2987       <description>CMSIS-RTOS2 RTX5 for Armv8-M Non-Secure Domain (Source)</description>
2988       <RTE_Components_h>
2989         <!-- the following content goes into file 'RTE_Components.h' -->
2990         #define RTE_CMSIS_RTOS2                 /* CMSIS-RTOS2 */
2991         #define RTE_CMSIS_RTOS2_RTX5            /* CMSIS-RTOS2 Keil RTX5 */
2992         #define RTE_CMSIS_RTOS2_RTX5_SOURCE     /* CMSIS-RTOS2 Keil RTX5 Source */
2993         #define RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS  /* CMSIS-RTOS2 Keil RTX5 Armv8-M Non-secure domain */
2994       </RTE_Components_h>
2995       <files>
2996         <!-- RTX documentation -->
2997         <file category="doc"    name="CMSIS/Documentation/RTOS2/html/rtx5_impl.html"/>
2998
2999         <!-- RTX header files -->
3000         <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
3001
3002         <!-- RTX configuration -->
3003         <file category="header" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.h"  version="5.3.0"/>
3004         <file category="source" attr="config"   name="CMSIS/RTOS2/RTX/Config/RTX_Config.c"  version="5.1.0"/>
3005
3006         <!-- RTX templates -->
3007         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c"      version="2.0.0" select="CMSIS-RTOS2 'main' function"/>
3008         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Events.c"    version="2.0.0" select="CMSIS-RTOS2 Events"/>
3009         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MemPool.c"   version="2.0.0" select="CMSIS-RTOS2 Memory Pool"/>
3010         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/MsgQueue.c"  version="2.0.0" select="CMSIS-RTOS2 Message Queue"/>
3011         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Mutex.c"     version="2.0.0" select="CMSIS-RTOS2 Mutex"/>
3012         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Semaphore.c" version="2.0.0" select="CMSIS-RTOS2 Semaphore"/>
3013         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Thread.c"    version="2.0.0" select="CMSIS-RTOS2 Thread"/>
3014         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/Timer.c"     version="2.0.1" select="CMSIS-RTOS2 Timer"/>
3015         <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/svc_user.c"  version="1.0.0" select="CMSIS-RTOS2 SVC User Table"/>
3016         <file category="other"  name="CMSIS/RTOS2/RTX/RTX5.scvd"/>
3017
3018         <!-- RTX sources (core) -->
3019         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_kernel.c"/>
3020         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_thread.c"/>
3021         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_delay.c"/>
3022         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_timer.c"/>
3023         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evflags.c"/>
3024         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mutex.c"/>
3025         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_semaphore.c"/>
3026         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_memory.c"/>
3027         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_mempool.c"/>
3028         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_msgqueue.c"/>
3029         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_system.c"/>
3030         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_evr.c"/>
3031         <!-- RTX sources (library configuration) -->
3032         <file category="source" name="CMSIS/RTOS2/RTX/Source/rtx_lib.c"/>
3033         <!-- RTX sources (ARMCC handlers) -->
3034         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="CM23_ARMCC"/>
3035         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_ARMCC"/>
3036         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="CM33_FP_ARMCC"/>
3037         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mbl_ns.s"    condition="ARMv8MBL_ARMCC"/>
3038         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_ARMCC"/>
3039         <file category="source" name="CMSIS/RTOS2/RTX/Source/ARM/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_ARMCC"/>
3040         <!-- RTX sources (GCC handlers) -->
3041         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="CM23_GCC"/>
3042         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="CM33_GCC"/>
3043         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="CM33_FP_GCC"/>
3044         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mbl_ns.S"    condition="ARMv8MBL_GCC"/>
3045         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_ns.S"    condition="ARMv8MML_GCC"/>
3046         <file category="source" name="CMSIS/RTOS2/RTX/Source/GCC/irq_armv8mml_fp_ns.S" condition="ARMv8MML_FP_GCC"/>
3047         <!-- RTX sources (IAR handlers) -->
3048         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="CM23_IAR"/>
3049         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_IAR"/>
3050         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="CM33_FP_IAR"/>
3051         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mbl_ns.s"    condition="ARMv8MBL_IAR"/>
3052         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_IAR"/>
3053         <file category="source" name="CMSIS/RTOS2/RTX/Source/IAR/irq_armv8mml_ns.s"    condition="ARMv8MML_FP_IAR"/>
3054         <!-- OS Tick (SysTick) -->
3055         <file category="source" name="CMSIS/RTOS2/Source/os_systick.c"/>
3056       </files>
3057     </component>
3058
3059   </components>
3060
3061   <boards>
3062     <board name="uVision Simulator" vendor="Keil">
3063       <description>uVision Simulator</description>
3064       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
3065       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
3066       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P_MPU"/>
3067       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
3068       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4"/>
3069       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
3070       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7"/>
3071       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_SP"/>
3072       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
3073       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MBL"/>
3074       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML"/>
3075       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_SP"/>
3076       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMv8MML_DP"/>
3077       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23"/>
3078       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM23_TZ"/>
3079       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33"/>
3080       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_TZ"/>
3081       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP"/>
3082       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM33_DSP_FP_TZ"/>
3083     </board>
3084
3085     <board name="Fixed Virtual Platform" vendor="ARM">
3086       <description>Fixed Virtual Platform</description>
3087       <mountedDevice    deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA5"/>
3088       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA7"/>
3089       <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCA9"/>
3090     </board>
3091   </boards>
3092
3093   <examples>
3094     <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
3095       <description>DSP_Lib Class Marks example</description>
3096       <board name="uVision Simulator" vendor="Keil"/>
3097       <project>
3098         <environment name="uv" load="arm_class_marks_example.uvprojx"/>
3099       </project>
3100       <attributes>
3101         <component Cclass="CMSIS" Cgroup="CORE"/>
3102         <component Cclass="CMSIS" Cgroup="DSP"/>
3103         <component Cclass="Device" Cgroup="Startup"/>
3104         <category>Getting Started</category>
3105       </attributes>
3106     </example>
3107
3108     <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
3109       <description>DSP_Lib Convolution example</description>
3110       <board name="uVision Simulator" vendor="Keil"/>
3111       <project>
3112         <environment name="uv" load="arm_convolution_example.uvprojx"/>
3113       </project>
3114       <attributes>
3115         <component Cclass="CMSIS" Cgroup="CORE"/>
3116         <component Cclass="CMSIS" Cgroup="DSP"/>
3117         <component Cclass="Device" Cgroup="Startup"/>
3118         <category>Getting Started</category>
3119       </attributes>
3120     </example>
3121
3122     <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
3123       <description>DSP_Lib Dotproduct example</description>
3124       <board name="uVision Simulator" vendor="Keil"/>
3125       <project>
3126         <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
3127       </project>
3128       <attributes>
3129         <component Cclass="CMSIS" Cgroup="CORE"/>
3130         <component Cclass="CMSIS" Cgroup="DSP"/>
3131         <component Cclass="Device" Cgroup="Startup"/>
3132         <category>Getting Started</category>
3133       </attributes>
3134     </example>
3135
3136     <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
3137       <description>DSP_Lib FFT Bin example</description>
3138       <board name="uVision Simulator" vendor="Keil"/>
3139       <project>
3140         <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
3141       </project>
3142       <attributes>
3143         <component Cclass="CMSIS" Cgroup="CORE"/>
3144         <component Cclass="CMSIS" Cgroup="DSP"/>
3145         <component Cclass="Device" Cgroup="Startup"/>
3146         <category>Getting Started</category>
3147       </attributes>
3148     </example>
3149
3150     <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
3151       <description>DSP_Lib FIR example</description>
3152       <board name="uVision Simulator" vendor="Keil"/>
3153       <project>
3154         <environment name="uv" load="arm_fir_example.uvprojx"/>
3155       </project>
3156       <attributes>
3157         <component Cclass="CMSIS" Cgroup="CORE"/>
3158         <component Cclass="CMSIS" Cgroup="DSP"/>
3159         <component Cclass="Device" Cgroup="Startup"/>
3160         <category>Getting Started</category>
3161       </attributes>
3162     </example>
3163
3164     <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
3165       <description>DSP_Lib Graphic Equalizer example</description>
3166       <board name="uVision Simulator" vendor="Keil"/>
3167       <project>
3168         <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
3169       </project>
3170       <attributes>
3171         <component Cclass="CMSIS" Cgroup="CORE"/>
3172         <component Cclass="CMSIS" Cgroup="DSP"/>
3173         <component Cclass="Device" Cgroup="Startup"/>
3174         <category>Getting Started</category>
3175       </attributes>
3176     </example>
3177
3178     <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
3179       <description>DSP_Lib Linear Interpolation example</description>
3180       <board name="uVision Simulator" vendor="Keil"/>
3181       <project>
3182         <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
3183       </project>
3184       <attributes>
3185         <component Cclass="CMSIS" Cgroup="CORE"/>
3186         <component Cclass="CMSIS" Cgroup="DSP"/>
3187         <component Cclass="Device" Cgroup="Startup"/>
3188         <category>Getting Started</category>
3189       </attributes>
3190     </example>
3191
3192     <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
3193       <description>DSP_Lib Matrix example</description>
3194       <board name="uVision Simulator" vendor="Keil"/>
3195       <project>
3196         <environment name="uv" load="arm_matrix_example.uvprojx"/>
3197       </project>
3198       <attributes>
3199         <component Cclass="CMSIS" Cgroup="CORE"/>
3200         <component Cclass="CMSIS" Cgroup="DSP"/>
3201         <component Cclass="Device" Cgroup="Startup"/>
3202         <category>Getting Started</category>
3203       </attributes>
3204     </example>
3205
3206     <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
3207       <description>DSP_Lib Signal Convergence example</description>
3208       <board name="uVision Simulator" vendor="Keil"/>
3209       <project>
3210         <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
3211       </project>
3212       <attributes>
3213         <component Cclass="CMSIS" Cgroup="CORE"/>
3214         <component Cclass="CMSIS" Cgroup="DSP"/>
3215         <component Cclass="Device" Cgroup="Startup"/>
3216         <category>Getting Started</category>
3217       </attributes>
3218     </example>
3219
3220     <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
3221       <description>DSP_Lib Sinus/Cosinus example</description>
3222       <board name="uVision Simulator" vendor="Keil"/>
3223       <project>
3224         <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
3225       </project>
3226       <attributes>
3227         <component Cclass="CMSIS" Cgroup="CORE"/>
3228         <component Cclass="CMSIS" Cgroup="DSP"/>
3229         <component Cclass="Device" Cgroup="Startup"/>
3230         <category>Getting Started</category>
3231       </attributes>
3232     </example>
3233
3234     <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
3235       <description>DSP_Lib Variance example</description>
3236       <board name="uVision Simulator" vendor="Keil"/>
3237       <project>
3238         <environment name="uv" load="arm_variance_example.uvprojx"/>
3239       </project>
3240       <attributes>
3241         <component Cclass="CMSIS" Cgroup="CORE"/>
3242         <component Cclass="CMSIS" Cgroup="DSP"/>
3243         <component Cclass="Device" Cgroup="Startup"/>
3244         <category>Getting Started</category>
3245       </attributes>
3246     </example>
3247
3248     <example name="NN Library CIFAR10" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10">
3249       <description>Neural Network CIFAR10 example</description>
3250       <board name="uVision Simulator" vendor="Keil"/>
3251       <project>
3252         <environment name="uv" load="arm_nnexamples_cifar10.uvprojx"/>
3253       </project>
3254       <attributes>
3255         <component Cclass="CMSIS" Cgroup="CORE"/>
3256         <component Cclass="CMSIS" Cgroup="DSP"/>
3257         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3258         <component Cclass="Device" Cgroup="Startup"/>
3259         <category>Getting Started</category>
3260       </attributes>
3261     </example>
3262
3263     <example name="NN Library GRU" doc="readme.txt" folder="CMSIS/NN/Examples/ARM/arm_nn_examples/gru">
3264       <description>Neural Network GRU example</description>
3265       <board name="uVision Simulator" vendor="Keil"/>
3266       <project>
3267         <environment name="uv" load="arm_nnexamples_gru.uvprojx"/>
3268       </project>
3269       <attributes>
3270         <component Cclass="CMSIS" Cgroup="CORE"/>
3271         <component Cclass="CMSIS" Cgroup="DSP"/>
3272         <component Cclass="CMSIS" Cgroup="NN Lib"/>
3273         <component Cclass="Device" Cgroup="Startup"/>
3274         <category>Getting Started</category>
3275       </attributes>
3276     </example>
3277
3278     <example name="CMSIS-RTOS2 Blinky" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Blinky">
3279       <description>CMSIS-RTOS2 Blinky example</description>
3280       <board name="uVision Simulator" vendor="Keil"/>
3281       <project>
3282         <environment name="uv" load="Blinky.uvprojx"/>
3283       </project>
3284       <attributes>
3285         <component Cclass="CMSIS" Cgroup="CORE"/>
3286         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3287         <component Cclass="Device" Cgroup="Startup"/>
3288         <category>Getting Started</category>
3289       </attributes>
3290     </example>
3291
3292     <example name="CMSIS-RTOS2 RTX5 Migration" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/Migration">
3293       <description>CMSIS-RTOS2 mixed API v1 and v2</description>
3294       <board name="uVision Simulator" vendor="Keil"/>
3295       <project>
3296         <environment name="uv" load="Blinky.uvprojx"/>
3297       </project>
3298       <attributes>
3299         <component Cclass="CMSIS" Cgroup="CORE"/>
3300         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3301         <component Cclass="Device" Cgroup="Startup"/>
3302         <category>Getting Started</category>
3303       </attributes>
3304     </example>
3305
3306     <example name="CMSIS-RTOS2 RTX5 Message Queue" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MsgQueue">
3307       <description>CMSIS-RTOS2 Message Queue Example</description>
3308       <board name="uVision Simulator" vendor="Keil"/>
3309       <project>
3310         <environment name="uv" load="MsqQueue.uvprojx"/>
3311       </project>
3312       <attributes>
3313         <component Cclass="CMSIS" Cgroup="CORE"/>
3314         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3315         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3316         <component Cclass="Device" Cgroup="Startup"/>
3317         <category>Getting Started</category>
3318       </attributes>
3319     </example>
3320
3321     <example name="CMSIS-RTOS2 RTX5 Memory Pool" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/MemPool">
3322       <description>CMSIS-RTOS2 Memory Pool Example</description>
3323       <board name="Fixed Virtual Platform" vendor="ARM"/>
3324       <project>
3325         <environment name="uv" load="MemPool.uvprojx"/>
3326       </project>
3327       <attributes>
3328         <component Cclass="CMSIS" Cgroup="CORE"/>
3329         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3330         <component Cclass="Compiler" Cgroup="EventRecorder"/>
3331         <component Cclass="Device" Cgroup="Startup"/>
3332         <category>Getting Started</category>
3333       </attributes>
3334     </example>
3335
3336     <example name="TrustZone for ARMv8-M No RTOS" doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/NoRTOS">
3337       <description>Bare-metal secure/non-secure example without RTOS</description>
3338       <board name="uVision Simulator" vendor="Keil"/>
3339       <project>
3340         <environment name="uv" load="NoRTOS.uvmpw"/>
3341       </project>
3342       <attributes>
3343         <component Cclass="CMSIS" Cgroup="CORE"/>
3344         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3345         <component Cclass="Device" Cgroup="Startup"/>
3346         <category>Getting Started</category>
3347       </attributes>
3348     </example>
3349
3350     <example name="TrustZone for ARMv8-M RTOS"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS">
3351       <description>Secure/non-secure RTOS example with thread context management</description>
3352       <board name="uVision Simulator" vendor="Keil"/>
3353       <project>
3354         <environment name="uv" load="RTOS.uvmpw"/>
3355       </project>
3356       <attributes>
3357         <component Cclass="CMSIS" Cgroup="CORE"/>
3358         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3359         <component Cclass="Device" Cgroup="Startup"/>
3360         <category>Getting Started</category>
3361       </attributes>
3362     </example>
3363
3364     <example name="TrustZone for ARMv8-M RTOS Security Tests"  doc="Abstract.txt" folder="CMSIS/RTOS2/RTX/Examples/TrustZoneV8M/RTOS_Faults">
3365       <description>Secure/non-secure RTOS example with security test cases and system recovery</description>
3366       <board name="uVision Simulator" vendor="Keil"/>
3367       <project>
3368         <environment name="uv" load="RTOS_Faults.uvmpw"/>
3369       </project>
3370       <attributes>
3371         <component Cclass="CMSIS" Cgroup="CORE"/>
3372         <component Cclass="CMSIS" Cgroup="RTOS2"/>
3373         <component Cclass="Device" Cgroup="Startup"/>
3374         <category>Getting Started</category>
3375       </attributes>
3376     </example>
3377
3378   </examples>
3379
3380 </package>